1 // 2 // Copyright 2011,2014,2015 Ettus Research LLC 3 // Copyright 2018 Ettus Research, a National Instruments Company 4 // 5 // SPDX-License-Identifier: GPL-3.0-or-later 6 // 7 8 #pragma once 9 10 #include <uhd/config.hpp> 11 #include <uhd/types/wb_iface.hpp> 12 #include <uhd/usrp/dboard_iface.hpp> 13 #include <uhd/usrp/gpio_defs.hpp> 14 #include <uhd/utils/noncopyable.hpp> 15 #include <uhdlib/usrp/gpio_defs.hpp> 16 #include <memory> 17 18 namespace uhd { namespace usrp { namespace gpio_atr { 19 20 class gpio_atr_3000 : uhd::noncopyable 21 { 22 public: 23 typedef std::shared_ptr<gpio_atr_3000> sptr; 24 25 static const uint32_t MASK_SET_ALL = 0xFFFFFFFF; 26 ~gpio_atr_3000(void)27 virtual ~gpio_atr_3000(void) {} 28 29 /*! 30 * Create a read-write GPIO ATR interface object 31 * 32 * \param iface register iface to GPIO ATR registers 33 * \param base base settings offset for GPIO ATR registers 34 * \param rb_addr readback offset for GPIO ATR registers 35 * \param reg_offset Delta between the register addresses 36 */ 37 static sptr make(uhd::wb_iface::sptr iface, 38 const uhd::wb_iface::wb_addr_type base, 39 const uhd::wb_iface::wb_addr_type rb_addr, 40 const size_t reg_offset = 4); 41 42 /*! 43 * Create a write-only GPIO ATR interface object 44 * 45 * \param iface register iface to GPIO ATR registers 46 * \param base base settings offset for GPIO ATR registers 47 * \param reg_offset Delta between the register addresses 48 */ 49 static sptr make_write_only(uhd::wb_iface::sptr iface, 50 const uhd::wb_iface::wb_addr_type base, 51 const size_t reg_offset = 4); 52 53 /*! 54 * Select the ATR mode for all bits in the mask 55 * 56 * \param mode the mode to apply {ATR = outputs driven by ATR state machine, GPIO = 57 * outputs static} \param mask apply the mode to all non-zero bits in the mask 58 */ 59 virtual void set_atr_mode(const gpio_atr_mode_t mode, const uint32_t mask) = 0; 60 61 /*! 62 * Select the data direction for all bits in the mask 63 * 64 * \param dir the direction {OUTPUT, INPUT} 65 * \param mask apply the mode to all non-zero bits in the mask 66 */ 67 virtual void set_gpio_ddr(const gpio_ddr_t dir, const uint32_t mask) = 0; 68 69 /*! 70 * Write the specified (masked) value to the ATR register 71 * 72 * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX} 73 * \param value the value to write 74 * \param mask only writes to the bits where mask is non-zero 75 */ 76 virtual void set_atr_reg(const gpio_atr_reg_t atr, 77 const uint32_t value, 78 const uint32_t mask = MASK_SET_ALL) = 0; 79 80 /*! 81 * Write to a static GPIO output 82 * 83 * \param value the value to write 84 * \param mask only writes to the bits where mask is non-zero 85 */ 86 virtual void set_gpio_out( 87 const uint32_t value, const uint32_t mask = MASK_SET_ALL) = 0; 88 89 /*! 90 * Read the state of the GPIO pins 91 * If a pin is configured as an input, reads the actual value of the pin 92 * If a pin is configured as an output, reads the last value written to the pin 93 * 94 * \return the value read back 95 */ 96 virtual uint32_t read_gpio() = 0; 97 98 /*! 99 * Get a GPIO attribute 100 * This will likely returned a cached value, and not read the state from the physical 101 * GPIO controller. 102 * 103 * \param attr the attribute to read 104 * \return the current value of that attribute 105 */ 106 virtual uint32_t get_attr_reg(const gpio_attr_t attr) = 0; 107 108 /*! 109 * Set a GPIO attribute 110 * 111 * \param attr the attribute to set 112 * \param value the value to write to the attribute 113 */ 114 virtual void set_gpio_attr(const gpio_attr_t attr, const uint32_t value) = 0; 115 }; 116 117 class db_gpio_atr_3000 118 { 119 public: 120 typedef std::shared_ptr<db_gpio_atr_3000> sptr; 121 122 typedef uhd::usrp::dboard_iface::unit_t db_unit_t; 123 ~db_gpio_atr_3000(void)124 virtual ~db_gpio_atr_3000(void) {} 125 126 /*! 127 * Create a read-write GPIO ATR interface object for a daughterboard connector 128 * 129 * \param iface register iface to GPIO ATR registers 130 * \param base base settings offset for GPIO ATR registers 131 * \param rb_addr readback offset for GPIO ATR registers 132 * \param reg_offset Delta between the register addresses 133 */ 134 static sptr make(uhd::wb_iface::sptr iface, 135 const uhd::wb_iface::wb_addr_type base, 136 const uhd::wb_iface::wb_addr_type rb_addr, 137 const size_t reg_offset = 4); 138 139 /*! 140 * Configure the GPIO mode for all pins in the daughterboard connector 141 * 142 * \param unit the side of the daughterboard interface to configure (TX or RX) 143 * \param value if value[i] is 1, the i'th bit is in ATR mode otherwise it is in GPIO 144 * mode \param mask mask 145 */ 146 virtual void set_pin_ctrl( 147 const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0; 148 149 virtual uint32_t get_pin_ctrl(const db_unit_t unit) = 0; 150 151 /*! 152 * Configure the direction for all pins in the daughterboard connector 153 * 154 * \param unit the side of the daughterboard interface to configure (TX or RX) 155 * \param value if value[i] is 1, the i'th bit is an output otherwise it is an input 156 * \param mask mask 157 */ 158 virtual void set_gpio_ddr( 159 const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0; 160 161 virtual uint32_t get_gpio_ddr(const db_unit_t unit) = 0; 162 163 /*! 164 * Write the specified value to the ATR register (all bits) 165 * 166 * \param unit the side of the daughterboard interface to configure (TX or RX) 167 * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX} 168 * \param value the value to write 169 * \param mask mask 170 */ 171 virtual void set_atr_reg(const db_unit_t unit, 172 const gpio_atr_reg_t atr, 173 const uint32_t value, 174 const uint32_t mask) = 0; 175 176 virtual uint32_t get_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr) = 0; 177 178 /*! 179 * Write the specified value to the GPIO register (all bits) 180 * 181 * \param unit the side of the daughterboard interface to configure (TX or RX) 182 * \param value the value to write 183 * \param mask mask 184 */ 185 virtual void set_gpio_out( 186 const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0; 187 188 virtual uint32_t get_gpio_out(const db_unit_t unit) = 0; 189 190 /*! 191 * Read the state of the GPIO pins 192 * If a pin is configured as an input, reads the actual value of the pin 193 * If a pin is configured as an output, reads the last value written to the pin 194 * 195 * \param unit the side of the daughterboard interface to configure (TX or RX) 196 * \return the value read back 197 */ 198 virtual uint32_t read_gpio(const db_unit_t unit) = 0; 199 }; 200 201 }}} // namespace uhd::usrp::gpio_atr 202