1 /* $OpenBSD: if_dc_cardbus.c,v 1.42 2024/05/24 06:26:47 jsg Exp $ */
2
3 /*
4 * Copyright (c) 1997, 1998, 1999
5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $
35 */
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40
41 #include <net/if.h>
42 #include <net/if_media.h>
43
44 #include <netinet/in.h>
45 #include <netinet/if_ether.h>
46
47 #include <dev/mii/miivar.h>
48
49 #include <machine/bus.h>
50
51 #include <dev/pci/pcivar.h>
52 #include <dev/pci/pcireg.h>
53 #include <dev/pci/pcidevs.h>
54
55 #include <dev/cardbus/cardbusvar.h>
56
57 #include <dev/ic/dcreg.h>
58
59 /* PCI configuration regs */
60 #define PCI_CBIO 0x10
61 #define PCI_CBMEM 0x14
62 #define PCI_CFDA 0x40
63
64 #define DC_CFDA_SUSPEND 0x80000000
65 #define DC_CFDA_STANDBY 0x40000000
66
67 struct dc_cardbus_softc {
68 struct dc_softc sc_dc;
69 int sc_intrline;
70
71 cardbus_devfunc_t sc_ct;
72 pci_chipset_tag_t sc_pc;
73 pcitag_t sc_tag;
74 bus_size_t sc_mapsize;
75 int sc_actype;
76 };
77
78 int dc_cardbus_match(struct device *, void *, void *);
79 void dc_cardbus_attach(struct device *, struct device *,void *);
80 int dc_cardbus_detach(struct device *, int);
81
82 void dc_cardbus_setup(struct dc_cardbus_softc *csc);
83
84 const struct cfattach dc_cardbus_ca = {
85 sizeof(struct dc_cardbus_softc), dc_cardbus_match, dc_cardbus_attach,
86 dc_cardbus_detach, dc_activate
87 };
88
89 const struct pci_matchid dc_cardbus_devices[] = {
90 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 },
91 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143 },
92 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985 },
93 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 },
94 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500 },
95 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX },
96 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200 },
97 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DRP32TXD },
98 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200 },
99 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCM200 },
100 { PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX },
101 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120 },
102 };
103
104 int
dc_cardbus_match(struct device * parent,void * match,void * aux)105 dc_cardbus_match(struct device *parent, void *match, void *aux)
106 {
107 return (cardbus_matchbyid((struct cardbus_attach_args *)aux,
108 dc_cardbus_devices, nitems(dc_cardbus_devices)));
109 }
110
111 void
dc_cardbus_attach(struct device * parent,struct device * self,void * aux)112 dc_cardbus_attach(struct device *parent, struct device *self, void *aux)
113 {
114 struct dc_cardbus_softc *csc = (struct dc_cardbus_softc *)self;
115 struct dc_softc *sc = &csc->sc_dc;
116 struct cardbus_attach_args *ca = aux;
117 struct cardbus_devfunc *ct = ca->ca_ct;
118 cardbus_chipset_tag_t cc = ct->ct_cc;
119 pci_chipset_tag_t pc = ca->ca_pc;
120 cardbus_function_tag_t cf = ct->ct_cf;
121 pcireg_t reg;
122 bus_addr_t addr;
123
124 sc->sc_dmat = ca->ca_dmat;
125 csc->sc_ct = ct;
126 csc->sc_tag = ca->ca_tag;
127 csc->sc_pc = ca->ca_pc;
128
129 Cardbus_function_enable(ct);
130
131 if (Cardbus_mapreg_map(ct, PCI_CBIO,
132 PCI_MAPREG_TYPE_IO, 0, &sc->dc_btag, &sc->dc_bhandle, &addr,
133 &csc->sc_mapsize) == 0) {
134
135 csc->sc_actype = CARDBUS_IO_ENABLE;
136 } else if (Cardbus_mapreg_map(ct, PCI_CBMEM,
137 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
138 &sc->dc_btag, &sc->dc_bhandle, &addr, &csc->sc_mapsize) == 0) {
139 csc->sc_actype = CARDBUS_MEM_ENABLE;
140 } else {
141 printf(": can't map device registers\n");
142 return;
143 }
144
145 csc->sc_intrline = ca->ca_intrline;
146
147 sc->dc_cachesize = pci_conf_read(csc->sc_pc, ca->ca_tag, DC_PCI_CFLT)
148 & 0xFF;
149
150 dc_cardbus_setup(csc);
151
152 /* Get the eeprom width */
153 if ((PCI_VENDOR(ca->ca_id) == PCI_VENDOR_XIRCOM &&
154 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_XIRCOM_X3201_3_21143))
155 ; /* XIRCOM has non-standard eeprom */
156 else
157 dc_eeprom_width(sc);
158
159 switch (PCI_VENDOR(ca->ca_id)) {
160 case PCI_VENDOR_DEC:
161 if (PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_DEC_21142) {
162 sc->dc_type = DC_TYPE_21143;
163 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
164 sc->dc_flags |= DC_REDUCED_MII_POLL;
165 dc_read_srom(sc, sc->dc_romwidth);
166 dc_parse_21143_srom(sc);
167 }
168 break;
169 case PCI_VENDOR_XIRCOM:
170 if (PCI_PRODUCT(ca->ca_id) ==
171 PCI_PRODUCT_XIRCOM_X3201_3_21143) {
172 sc->dc_type = DC_TYPE_XIRCOM;
173 sc->dc_flags |= DC_TX_INTR_ALWAYS|DC_TX_COALESCE |
174 DC_TX_ALIGN;
175 sc->dc_pmode = DC_PMODE_MII;
176 }
177 break;
178 case PCI_VENDOR_ADMTEK:
179 case PCI_VENDOR_ACCTON:
180 case PCI_VENDOR_ABOCOM:
181 case PCI_VENDOR_DLINK:
182 case PCI_VENDOR_LINKSYS:
183 case PCI_VENDOR_HAWKING:
184 case PCI_VENDOR_MICROSOFT:
185 if (PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADMTEK_AN985 ||
186 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ACCTON_EN2242 ||
187 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_FE2500 ||
188 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_FE2500MX ||
189 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_PCM200 ||
190 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_DLINK_DRP32TXD ||
191 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_LINKSYS_PCMPC200 ||
192 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_LINKSYS_PCM200 ||
193 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_HAWKING_PN672TX ||
194 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_MICROSOFT_MN120) {
195 sc->dc_type = DC_TYPE_AN983;
196 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_ADMTEK_WAR |
197 DC_64BIT_HASH;
198 sc->dc_pmode = DC_PMODE_MII;
199 /* Don't read SROM for - auto-loaded on reset */
200 }
201 break;
202 default:
203 printf(": unknown device\n");
204 return;
205 }
206
207 /*
208 * set latency timer, do we really need this?
209 */
210 reg = pci_conf_read(pc, ca->ca_tag, PCI_BHLC_REG);
211 if (PCI_LATTIMER(reg) < 0x20) {
212 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
213 reg |= (0x20 << PCI_LATTIMER_SHIFT);
214 pci_conf_write(pc, ca->ca_tag, PCI_BHLC_REG, reg);
215 }
216
217 sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_NET,
218 dc_intr, csc, sc->sc_dev.dv_xname);
219 if (sc->sc_ih == NULL) {
220 printf(": can't establish interrupt at %d\n",
221 ca->ca_intrline);
222 return;
223 }
224 printf(": irq %d", ca->ca_intrline);
225
226 dc_reset(sc);
227
228 sc->dc_revision = PCI_REVISION(ca->ca_class);
229 dc_attach(sc);
230 }
231
232 int
dc_cardbus_detach(struct device * self,int flags)233 dc_cardbus_detach(struct device *self, int flags)
234 {
235 struct dc_cardbus_softc *csc = (struct dc_cardbus_softc *)self;
236 struct dc_softc *sc = &csc->sc_dc;
237 struct cardbus_devfunc *ct = csc->sc_ct;
238
239 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih);
240 dc_detach(sc);
241
242 /* unmap cardbus resources */
243 Cardbus_mapreg_unmap(ct,
244 csc->sc_actype == CARDBUS_IO_ENABLE ? PCI_CBIO : PCI_CBMEM,
245 sc->dc_btag, sc->dc_bhandle, csc->sc_mapsize);
246
247 return (0);
248 }
249
250 void
dc_cardbus_setup(struct dc_cardbus_softc * csc)251 dc_cardbus_setup(struct dc_cardbus_softc *csc)
252 {
253 cardbus_devfunc_t ct = csc->sc_ct;
254 cardbus_chipset_tag_t cc = ct->ct_cc;
255 pci_chipset_tag_t pc = csc->sc_pc;
256 pcireg_t reg;
257 int r;
258
259 /* wakeup the card if needed */
260 reg = pci_conf_read(pc, csc->sc_tag, PCI_CFDA);
261 if (reg & (DC_CFDA_SUSPEND|DC_CFDA_STANDBY)) {
262 pci_conf_write(pc, csc->sc_tag, PCI_CFDA,
263 reg & ~(DC_CFDA_SUSPEND|DC_CFDA_STANDBY));
264 }
265
266 if (pci_get_capability(csc->sc_pc, csc->sc_tag, PCI_CAP_PWRMGMT, &r,
267 0)) {
268 r = pci_conf_read(csc->sc_pc, csc->sc_tag, r + 4) & 3;
269 if (r) {
270 printf("%s: awakening from state D%d\n",
271 csc->sc_dc.sc_dev.dv_xname, r);
272 pci_conf_write(csc->sc_pc, csc->sc_tag, r + 4, 0);
273 }
274 }
275
276 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_actype);
277 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
278
279 reg = pci_conf_read(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG);
280 reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
281 PCI_COMMAND_MASTER_ENABLE;
282 pci_conf_write(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
283 reg = pci_conf_read(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG);
284 }
285