1 #ifndef _G_DEVICE_NVOC_H_
2 #define _G_DEVICE_NVOC_H_
3 #include "nvoc/runtime.h"
4
5 #ifdef __cplusplus
6 extern "C" {
7 #endif
8
9 /*
10 * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
11 * SPDX-License-Identifier: MIT
12 *
13 * Permission is hereby granted, free of charge, to any person obtaining a
14 * copy of this software and associated documentation files (the "Software"),
15 * to deal in the Software without restriction, including without limitation
16 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17 * and/or sell copies of the Software, and to permit persons to whom the
18 * Software is furnished to do so, subject to the following conditions:
19 *
20 * The above copyright notice and this permission notice shall be included in
21 * all copies or substantial portions of the Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
29 * DEALINGS IN THE SOFTWARE.
30 */
31 #include "g_device_nvoc.h"
32
33 #ifndef _DEVICE_H_
34 #define _DEVICE_H_
35
36 #include "core/core.h"
37
38 #include "resserv/resserv.h"
39 #include "nvoc/prelude.h"
40 #include "nvoc/utility.h"
41 #include "resserv/rs_resource.h"
42 #include "rmapi/control.h"
43 #include "containers/btree.h"
44
45 #include "gpu/gpu_halspec.h"
46 #include "gpu/gpu_resource.h"
47 #include "mem_mgr/vaspace.h"
48
49 #include "ctrl/ctrl0080.h" // rmcontrol params
50
51 // Forward declaration
52 struct KERNEL_HOST_VGPU_DEVICE;
53 struct OBJVASPACE;
54
55 #ifndef __NVOC_CLASS_OBJVASPACE_TYPEDEF__
56 #define __NVOC_CLASS_OBJVASPACE_TYPEDEF__
57 typedef struct OBJVASPACE OBJVASPACE;
58 #endif /* __NVOC_CLASS_OBJVASPACE_TYPEDEF__ */
59
60 #ifndef __nvoc_class_id_OBJVASPACE
61 #define __nvoc_class_id_OBJVASPACE 0x6c347f
62 #endif /* __nvoc_class_id_OBJVASPACE */
63
64
65
66 /**
67 * A device consists of one or more GPUs. Devices provide broadcast
68 * semantics; that is, operations involving a device are applied to all GPUs
69 * in the device.
70 */
71
72 // Private field names are wrapped in PRIVATE_FIELD, which does nothing for
73 // the matching C source file, but causes diagnostics to be issued if another
74 // source file references the field.
75 #ifdef NVOC_DEVICE_H_PRIVATE_ACCESS_ALLOWED
76 #define PRIVATE_FIELD(x) x
77 #else
78 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
79 #endif
80
81 struct Device {
82 const struct NVOC_RTTI *__nvoc_rtti;
83 struct GpuResource __nvoc_base_GpuResource;
84 struct Object *__nvoc_pbase_Object;
85 struct RsResource *__nvoc_pbase_RsResource;
86 struct RmResourceCommon *__nvoc_pbase_RmResourceCommon;
87 struct RmResource *__nvoc_pbase_RmResource;
88 struct GpuResource *__nvoc_pbase_GpuResource;
89 struct Device *__nvoc_pbase_Device;
90 NV_STATUS (*__deviceControl__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
91 NV_STATUS (*__deviceInternalControlForward__)(struct Device *, NvU32, void *, NvU32);
92 NV_STATUS (*__deviceCtrlCmdBifGetDmaBaseSysmemAddr__)(struct Device *, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *);
93 NV_STATUS (*__deviceCtrlCmdBifAspmFeatureSupported__)(struct Device *, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *);
94 NV_STATUS (*__deviceCtrlCmdBifAspmCyaUpdate__)(struct Device *, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *);
95 NV_STATUS (*__deviceCtrlCmdBifGetPciePowerControlMask__)(struct Device *, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *);
96 NV_STATUS (*__deviceCtrlCmdDmaGetPteInfo__)(struct Device *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *);
97 NV_STATUS (*__deviceCtrlCmdDmaUpdatePde2__)(struct Device *, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *);
98 NV_STATUS (*__deviceCtrlCmdDmaSetPageDirectory__)(struct Device *, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *);
99 NV_STATUS (*__deviceCtrlCmdDmaUnsetPageDirectory__)(struct Device *, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *);
100 NV_STATUS (*__deviceCtrlCmdDmaFlush__)(struct Device *, NV0080_CTRL_DMA_FLUSH_PARAMS *);
101 NV_STATUS (*__deviceCtrlCmdDmaAdvSchedGetVaCaps__)(struct Device *, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *);
102 NV_STATUS (*__deviceCtrlCmdDmaGetPdeInfo__)(struct Device *, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *);
103 NV_STATUS (*__deviceCtrlCmdDmaSetPteInfo__)(struct Device *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *);
104 NV_STATUS (*__deviceCtrlCmdDmaInvalidateTLB__)(struct Device *, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *);
105 NV_STATUS (*__deviceCtrlCmdDmaGetCaps__)(struct Device *, NV0080_CTRL_DMA_GET_CAPS_PARAMS *);
106 NV_STATUS (*__deviceCtrlCmdDmaSetVASpaceSize__)(struct Device *, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *);
107 NV_STATUS (*__deviceCtrlCmdDmaEnablePrivilegedRange__)(struct Device *, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *);
108 NV_STATUS (*__deviceCtrlCmdDmaSetDefaultVASpace__)(struct Device *, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *);
109 NV_STATUS (*__deviceCtrlCmdKGrGetCaps__)(struct Device *, NV0080_CTRL_GR_GET_CAPS_PARAMS *);
110 NV_STATUS (*__deviceCtrlCmdKGrGetCapsV2__)(struct Device *, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *);
111 NV_STATUS (*__deviceCtrlCmdKGrGetInfo__)(struct Device *, NV0080_CTRL_GR_GET_INFO_PARAMS *);
112 NV_STATUS (*__deviceCtrlCmdKGrGetInfoV2__)(struct Device *, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *);
113 NV_STATUS (*__deviceCtrlCmdKGrGetTpcPartitionMode__)(struct Device *, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *);
114 NV_STATUS (*__deviceCtrlCmdKGrSetTpcPartitionMode__)(struct Device *, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *);
115 NV_STATUS (*__deviceCtrlCmdFbGetCompbitStoreInfo__)(struct Device *, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *);
116 NV_STATUS (*__deviceCtrlCmdFbGetCaps__)(struct Device *, NV0080_CTRL_FB_GET_CAPS_PARAMS *);
117 NV_STATUS (*__deviceCtrlCmdFbGetCapsV2__)(struct Device *, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *);
118 NV_STATUS (*__deviceCtrlCmdSetDefaultVidmemPhysicality__)(struct Device *, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *);
119 NV_STATUS (*__deviceCtrlCmdFifoGetCaps__)(struct Device *, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *);
120 NV_STATUS (*__deviceCtrlCmdFifoGetCapsV2__)(struct Device *, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *);
121 NV_STATUS (*__deviceCtrlCmdFifoStartSelectedChannels__)(struct Device *, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *);
122 NV_STATUS (*__deviceCtrlCmdFifoGetEngineContextProperties__)(struct Device *, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *);
123 NV_STATUS (*__deviceCtrlCmdFifoStopRunlist__)(struct Device *, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *);
124 NV_STATUS (*__deviceCtrlCmdFifoStartRunlist__)(struct Device *, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *);
125 NV_STATUS (*__deviceCtrlCmdFifoGetChannelList__)(struct Device *, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *);
126 NV_STATUS (*__deviceCtrlCmdFifoGetLatencyBufferSize__)(struct Device *, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *);
127 NV_STATUS (*__deviceCtrlCmdFifoSetChannelProperties__)(struct Device *, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *);
128 NV_STATUS (*__deviceCtrlCmdFifoIdleChannels__)(struct Device *, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *);
129 NV_STATUS (*__deviceCtrlCmdHostGetCaps__)(struct Device *, NV0080_CTRL_HOST_GET_CAPS_PARAMS *);
130 NV_STATUS (*__deviceCtrlCmdHostGetCapsV2__)(struct Device *, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *);
131 NV_STATUS (*__deviceCtrlCmdKPerfCudaLimitSetControl__)(struct Device *, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *);
132 NV_STATUS (*__deviceCtrlCmdInternalPerfCudaLimitSetControl__)(struct Device *, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *);
133 NV_STATUS (*__deviceCtrlCmdInternalPerfCudaLimitDisable__)(struct Device *);
134 NV_STATUS (*__deviceCtrlCmdGpuGetClasslist__)(struct Device *, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *);
135 NV_STATUS (*__deviceCtrlCmdGpuGetClasslistV2__)(struct Device *, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *);
136 NV_STATUS (*__deviceCtrlCmdGpuGetNumSubdevices__)(struct Device *, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *);
137 NV_STATUS (*__deviceCtrlCmdGpuModifyGpuSwStatePersistence__)(struct Device *, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *);
138 NV_STATUS (*__deviceCtrlCmdGpuQueryGpuSwStatePersistence__)(struct Device *, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *);
139 NV_STATUS (*__deviceCtrlCmdGpuGetVirtualizationMode__)(struct Device *, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *);
140 NV_STATUS (*__deviceCtrlCmdGpuSetVgpuVfBar1Size__)(struct Device *, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *);
141 NV_STATUS (*__deviceCtrlCmdGpuGetSparseTextureComputeMode__)(struct Device *, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *);
142 NV_STATUS (*__deviceCtrlCmdGpuSetSparseTextureComputeMode__)(struct Device *, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *);
143 NV_STATUS (*__deviceCtrlCmdGpuGetVgxCaps__)(struct Device *, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *);
144 NV_STATUS (*__deviceCtrlCmdGpuGetBrandCaps__)(struct Device *, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *);
145 NV_STATUS (*__deviceCtrlCmdGpuVirtualizationSwitchToVga__)(struct Device *);
146 NV_STATUS (*__deviceCtrlCmdGpuSetVgpuHeterogeneousMode__)(struct Device *, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *);
147 NV_STATUS (*__deviceCtrlCmdGpuGetVgpuHeterogeneousMode__)(struct Device *, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *);
148 NV_STATUS (*__deviceCtrlCmdGpuGetSriovCaps__)(struct Device *, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *);
149 NV_STATUS (*__deviceCtrlCmdGpuGetFindSubDeviceHandle__)(struct Device *, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *);
150 NV_STATUS (*__deviceCtrlCmdMsencGetCapsV2__)(struct Device *, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *);
151 NV_STATUS (*__deviceCtrlCmdBspGetCapsV2__)(struct Device *, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *);
152 NV_STATUS (*__deviceCtrlCmdNvjpgGetCapsV2__)(struct Device *, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *);
153 NV_STATUS (*__deviceCtrlCmdOsUnixVTSwitch__)(struct Device *, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *);
154 NV_STATUS (*__deviceCtrlCmdOsUnixVTGetFBInfo__)(struct Device *, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *);
155 NvBool (*__deviceShareCallback__)(struct Device *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *);
156 NV_STATUS (*__deviceCheckMemInterUnmap__)(struct Device *, NvBool);
157 NV_STATUS (*__deviceMapTo__)(struct Device *, RS_RES_MAP_TO_PARAMS *);
158 NV_STATUS (*__deviceGetMapAddrSpace__)(struct Device *, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *);
159 NvU32 (*__deviceGetRefCount__)(struct Device *);
160 void (*__deviceAddAdditionalDependants__)(struct RsClient *, struct Device *, RsResourceRef *);
161 NV_STATUS (*__deviceControl_Prologue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
162 NV_STATUS (*__deviceGetRegBaseOffsetAndSize__)(struct Device *, struct OBJGPU *, NvU32 *, NvU32 *);
163 NV_STATUS (*__deviceUnmapFrom__)(struct Device *, RS_RES_UNMAP_FROM_PARAMS *);
164 void (*__deviceControl_Epilogue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
165 NvHandle (*__deviceGetInternalObjectHandle__)(struct Device *);
166 NV_STATUS (*__deviceUnmap__)(struct Device *, struct CALL_CONTEXT *, struct RsCpuMapping *);
167 NV_STATUS (*__deviceGetMemInterMapParams__)(struct Device *, RMRES_MEM_INTER_MAP_PARAMS *);
168 NV_STATUS (*__deviceGetMemoryMappingDescriptor__)(struct Device *, struct MEMORY_DESCRIPTOR **);
169 NV_STATUS (*__deviceControlFilter__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
170 NV_STATUS (*__deviceControlSerialization_Prologue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
171 NvBool (*__deviceCanCopy__)(struct Device *);
172 NvBool (*__deviceIsPartialUnmapSupported__)(struct Device *);
173 void (*__devicePreDestruct__)(struct Device *);
174 NV_STATUS (*__deviceIsDuplicate__)(struct Device *, NvHandle, NvBool *);
175 void (*__deviceControlSerialization_Epilogue__)(struct Device *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
176 NV_STATUS (*__deviceMap__)(struct Device *, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *);
177 NvBool (*__deviceAccessCallback__)(struct Device *, struct RsClient *, void *, RsAccessRight);
178 NvU32 deviceInst;
179 NvU32 PerfReqCnt;
180 PNODE DevMemoryTable;
181 NvBool bSliGpuBoostSyncActivate;
182 NvBool bPerfOptpActive;
183 NvU32 nPerfOptpRefCnt;
184 NvU32 nCudaLimitRefCnt;
185 struct OBJVASPACE *pVASpace;
186 NvHandle hClientShare;
187 NvHandle hTargetClient;
188 NvHandle hTargetDevice;
189 NvU32 deviceAllocFlags;
190 NvU32 deviceInternalAllocFlags;
191 NvU64 vaStartInternal;
192 NvU64 vaLimitInternal;
193 NvU64 vaSize;
194 NvU32 vaMode;
195 NvU32 defaultVidmemPhysicalityOverride;
196 struct KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice;
197 };
198
199 #ifndef __NVOC_CLASS_Device_TYPEDEF__
200 #define __NVOC_CLASS_Device_TYPEDEF__
201 typedef struct Device Device;
202 #endif /* __NVOC_CLASS_Device_TYPEDEF__ */
203
204 #ifndef __nvoc_class_id_Device
205 #define __nvoc_class_id_Device 0xe0ac20
206 #endif /* __nvoc_class_id_Device */
207
208 extern const struct NVOC_CLASS_DEF __nvoc_class_def_Device;
209
210 #define __staticCast_Device(pThis) \
211 ((pThis)->__nvoc_pbase_Device)
212
213 #ifdef __nvoc_device_h_disabled
214 #define __dynamicCast_Device(pThis) ((Device*)NULL)
215 #else //__nvoc_device_h_disabled
216 #define __dynamicCast_Device(pThis) \
217 ((Device*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(Device)))
218 #endif //__nvoc_device_h_disabled
219
220
221 NV_STATUS __nvoc_objCreateDynamic_Device(Device**, Dynamic*, NvU32, va_list);
222
223 NV_STATUS __nvoc_objCreate_Device(Device**, Dynamic*, NvU32, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams);
224 #define __objCreate_Device(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \
225 __nvoc_objCreate_Device((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams)
226
227 #define deviceControl(pResource, pCallContext, pParams) deviceControl_DISPATCH(pResource, pCallContext, pParams)
228 #define deviceInternalControlForward(pDevice, command, pParams, size) deviceInternalControlForward_DISPATCH(pDevice, command, pParams, size)
229 #define deviceCtrlCmdBifGetDmaBaseSysmemAddr(pDevice, pBifDmaBaseSysmemParams) deviceCtrlCmdBifGetDmaBaseSysmemAddr_DISPATCH(pDevice, pBifDmaBaseSysmemParams)
230 #define deviceCtrlCmdBifAspmFeatureSupported(pDevice, pBifAspmParams) deviceCtrlCmdBifAspmFeatureSupported_DISPATCH(pDevice, pBifAspmParams)
231 #define deviceCtrlCmdBifAspmCyaUpdate(pDevice, pBifAspmCyaParams) deviceCtrlCmdBifAspmCyaUpdate_DISPATCH(pDevice, pBifAspmCyaParams)
232 #define deviceCtrlCmdBifGetPciePowerControlMask(pDevice, pBifPciePowerControlParams) deviceCtrlCmdBifGetPciePowerControlMask_DISPATCH(pDevice, pBifPciePowerControlParams)
233 #define deviceCtrlCmdDmaGetPteInfo(pDevice, pParams) deviceCtrlCmdDmaGetPteInfo_DISPATCH(pDevice, pParams)
234 #define deviceCtrlCmdDmaUpdatePde2(pDevice, pParams) deviceCtrlCmdDmaUpdatePde2_DISPATCH(pDevice, pParams)
235 #define deviceCtrlCmdDmaSetPageDirectory(pDevice, pParams) deviceCtrlCmdDmaSetPageDirectory_DISPATCH(pDevice, pParams)
236 #define deviceCtrlCmdDmaUnsetPageDirectory(pDevice, pParams) deviceCtrlCmdDmaUnsetPageDirectory_DISPATCH(pDevice, pParams)
237 #define deviceCtrlCmdDmaFlush(pDevice, flushParams) deviceCtrlCmdDmaFlush_DISPATCH(pDevice, flushParams)
238 #define deviceCtrlCmdDmaFlush_HAL(pDevice, flushParams) deviceCtrlCmdDmaFlush_DISPATCH(pDevice, flushParams)
239 #define deviceCtrlCmdDmaAdvSchedGetVaCaps(pDevice, pParams) deviceCtrlCmdDmaAdvSchedGetVaCaps_DISPATCH(pDevice, pParams)
240 #define deviceCtrlCmdDmaGetPdeInfo(pDevice, pParams) deviceCtrlCmdDmaGetPdeInfo_DISPATCH(pDevice, pParams)
241 #define deviceCtrlCmdDmaSetPteInfo(pDevice, pParams) deviceCtrlCmdDmaSetPteInfo_DISPATCH(pDevice, pParams)
242 #define deviceCtrlCmdDmaInvalidateTLB(pDevice, pParams) deviceCtrlCmdDmaInvalidateTLB_DISPATCH(pDevice, pParams)
243 #define deviceCtrlCmdDmaGetCaps(pDevice, pDmaCapsParams) deviceCtrlCmdDmaGetCaps_DISPATCH(pDevice, pDmaCapsParams)
244 #define deviceCtrlCmdDmaSetVASpaceSize(pDevice, pParams) deviceCtrlCmdDmaSetVASpaceSize_DISPATCH(pDevice, pParams)
245 #define deviceCtrlCmdDmaEnablePrivilegedRange(pDevice, pParams) deviceCtrlCmdDmaEnablePrivilegedRange_DISPATCH(pDevice, pParams)
246 #define deviceCtrlCmdDmaSetDefaultVASpace(pDevice, pParams) deviceCtrlCmdDmaSetDefaultVASpace_DISPATCH(pDevice, pParams)
247 #define deviceCtrlCmdKGrGetCaps(pDevice, pParams) deviceCtrlCmdKGrGetCaps_DISPATCH(pDevice, pParams)
248 #define deviceCtrlCmdKGrGetCapsV2(pDevice, pParams) deviceCtrlCmdKGrGetCapsV2_DISPATCH(pDevice, pParams)
249 #define deviceCtrlCmdKGrGetInfo(pDevice, pParams) deviceCtrlCmdKGrGetInfo_DISPATCH(pDevice, pParams)
250 #define deviceCtrlCmdKGrGetInfoV2(pDevice, pParams) deviceCtrlCmdKGrGetInfoV2_DISPATCH(pDevice, pParams)
251 #define deviceCtrlCmdKGrGetTpcPartitionMode(pDevice, pParams) deviceCtrlCmdKGrGetTpcPartitionMode_DISPATCH(pDevice, pParams)
252 #define deviceCtrlCmdKGrSetTpcPartitionMode(pDevice, pParams) deviceCtrlCmdKGrSetTpcPartitionMode_DISPATCH(pDevice, pParams)
253 #define deviceCtrlCmdFbGetCompbitStoreInfo(pDevice, pCompbitStoreParams) deviceCtrlCmdFbGetCompbitStoreInfo_DISPATCH(pDevice, pCompbitStoreParams)
254 #define deviceCtrlCmdFbGetCaps(pDevice, pFbCapsParams) deviceCtrlCmdFbGetCaps_DISPATCH(pDevice, pFbCapsParams)
255 #define deviceCtrlCmdFbGetCapsV2(pDevice, pFbCapsParams) deviceCtrlCmdFbGetCapsV2_DISPATCH(pDevice, pFbCapsParams)
256 #define deviceCtrlCmdSetDefaultVidmemPhysicality(pDevice, pParams) deviceCtrlCmdSetDefaultVidmemPhysicality_DISPATCH(pDevice, pParams)
257 #define deviceCtrlCmdFifoGetCaps(pDevice, pFifoCapsParams) deviceCtrlCmdFifoGetCaps_DISPATCH(pDevice, pFifoCapsParams)
258 #define deviceCtrlCmdFifoGetCapsV2(pDevice, pFifoCapsParams) deviceCtrlCmdFifoGetCapsV2_DISPATCH(pDevice, pFifoCapsParams)
259 #define deviceCtrlCmdFifoStartSelectedChannels(pDevice, pStartSel) deviceCtrlCmdFifoStartSelectedChannels_DISPATCH(pDevice, pStartSel)
260 #define deviceCtrlCmdFifoGetEngineContextProperties(pDevice, pParams) deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(pDevice, pParams)
261 #define deviceCtrlCmdFifoStopRunlist(pDevice, pStopRunlistParams) deviceCtrlCmdFifoStopRunlist_DISPATCH(pDevice, pStopRunlistParams)
262 #define deviceCtrlCmdFifoStartRunlist(pDevice, pStartRunlistParams) deviceCtrlCmdFifoStartRunlist_DISPATCH(pDevice, pStartRunlistParams)
263 #define deviceCtrlCmdFifoGetChannelList(pDevice, pChannelParams) deviceCtrlCmdFifoGetChannelList_DISPATCH(pDevice, pChannelParams)
264 #define deviceCtrlCmdFifoGetLatencyBufferSize(pDevice, pGetLatencyBufferSizeParams) deviceCtrlCmdFifoGetLatencyBufferSize_DISPATCH(pDevice, pGetLatencyBufferSizeParams)
265 #define deviceCtrlCmdFifoSetChannelProperties(pDevice, pSetChannelPropertiesParams) deviceCtrlCmdFifoSetChannelProperties_DISPATCH(pDevice, pSetChannelPropertiesParams)
266 #define deviceCtrlCmdFifoIdleChannels(pDevice, pParams) deviceCtrlCmdFifoIdleChannels_DISPATCH(pDevice, pParams)
267 #define deviceCtrlCmdHostGetCaps(pDevice, pHostCapsParams) deviceCtrlCmdHostGetCaps_DISPATCH(pDevice, pHostCapsParams)
268 #define deviceCtrlCmdHostGetCapsV2(pDevice, pHostCapsParamsV2) deviceCtrlCmdHostGetCapsV2_DISPATCH(pDevice, pHostCapsParamsV2)
269 #define deviceCtrlCmdKPerfCudaLimitSetControl(pDevice, pParams) deviceCtrlCmdKPerfCudaLimitSetControl_DISPATCH(pDevice, pParams)
270 #define deviceCtrlCmdInternalPerfCudaLimitSetControl(pDevice, pParams) deviceCtrlCmdInternalPerfCudaLimitSetControl_DISPATCH(pDevice, pParams)
271 #define deviceCtrlCmdInternalPerfCudaLimitDisable(pDevice) deviceCtrlCmdInternalPerfCudaLimitDisable_DISPATCH(pDevice)
272 #define deviceCtrlCmdGpuGetClasslist(pDevice, pClassListParams) deviceCtrlCmdGpuGetClasslist_DISPATCH(pDevice, pClassListParams)
273 #define deviceCtrlCmdGpuGetClasslistV2(pDevice, pParams) deviceCtrlCmdGpuGetClasslistV2_DISPATCH(pDevice, pParams)
274 #define deviceCtrlCmdGpuGetNumSubdevices(pDevice, pSubDeviceCountParams) deviceCtrlCmdGpuGetNumSubdevices_DISPATCH(pDevice, pSubDeviceCountParams)
275 #define deviceCtrlCmdGpuModifyGpuSwStatePersistence(pDevice, pParams) deviceCtrlCmdGpuModifyGpuSwStatePersistence_DISPATCH(pDevice, pParams)
276 #define deviceCtrlCmdGpuQueryGpuSwStatePersistence(pDevice, pParams) deviceCtrlCmdGpuQueryGpuSwStatePersistence_DISPATCH(pDevice, pParams)
277 #define deviceCtrlCmdGpuGetVirtualizationMode(pDevice, pParams) deviceCtrlCmdGpuGetVirtualizationMode_DISPATCH(pDevice, pParams)
278 #define deviceCtrlCmdGpuSetVgpuVfBar1Size(pDevice, pParams) deviceCtrlCmdGpuSetVgpuVfBar1Size_DISPATCH(pDevice, pParams)
279 #define deviceCtrlCmdGpuGetSparseTextureComputeMode(pDevice, pModeParams) deviceCtrlCmdGpuGetSparseTextureComputeMode_DISPATCH(pDevice, pModeParams)
280 #define deviceCtrlCmdGpuSetSparseTextureComputeMode(pDevice, pModeParams) deviceCtrlCmdGpuSetSparseTextureComputeMode_DISPATCH(pDevice, pModeParams)
281 #define deviceCtrlCmdGpuGetVgxCaps(pDevice, pParams) deviceCtrlCmdGpuGetVgxCaps_DISPATCH(pDevice, pParams)
282 #define deviceCtrlCmdGpuGetBrandCaps(pDevice, pParams) deviceCtrlCmdGpuGetBrandCaps_DISPATCH(pDevice, pParams)
283 #define deviceCtrlCmdGpuVirtualizationSwitchToVga(pDevice) deviceCtrlCmdGpuVirtualizationSwitchToVga_DISPATCH(pDevice)
284 #define deviceCtrlCmdGpuSetVgpuHeterogeneousMode(pDevice, pParams) deviceCtrlCmdGpuSetVgpuHeterogeneousMode_DISPATCH(pDevice, pParams)
285 #define deviceCtrlCmdGpuGetVgpuHeterogeneousMode(pDevice, pParams) deviceCtrlCmdGpuGetVgpuHeterogeneousMode_DISPATCH(pDevice, pParams)
286 #define deviceCtrlCmdGpuGetSriovCaps(pDevice, pParams) deviceCtrlCmdGpuGetSriovCaps_DISPATCH(pDevice, pParams)
287 #define deviceCtrlCmdGpuGetFindSubDeviceHandle(pDevice, pParams) deviceCtrlCmdGpuGetFindSubDeviceHandle_DISPATCH(pDevice, pParams)
288 #define deviceCtrlCmdMsencGetCapsV2(pDevice, pMsencCapsParams) deviceCtrlCmdMsencGetCapsV2_DISPATCH(pDevice, pMsencCapsParams)
289 #define deviceCtrlCmdMsencGetCapsV2_HAL(pDevice, pMsencCapsParams) deviceCtrlCmdMsencGetCapsV2_DISPATCH(pDevice, pMsencCapsParams)
290 #define deviceCtrlCmdBspGetCapsV2(pDevice, pBspCapParams) deviceCtrlCmdBspGetCapsV2_DISPATCH(pDevice, pBspCapParams)
291 #define deviceCtrlCmdBspGetCapsV2_HAL(pDevice, pBspCapParams) deviceCtrlCmdBspGetCapsV2_DISPATCH(pDevice, pBspCapParams)
292 #define deviceCtrlCmdNvjpgGetCapsV2(pDevice, pNvjpgCapsParams) deviceCtrlCmdNvjpgGetCapsV2_DISPATCH(pDevice, pNvjpgCapsParams)
293 #define deviceCtrlCmdNvjpgGetCapsV2_HAL(pDevice, pNvjpgCapsParams) deviceCtrlCmdNvjpgGetCapsV2_DISPATCH(pDevice, pNvjpgCapsParams)
294 #define deviceCtrlCmdOsUnixVTSwitch(pDevice, pParams) deviceCtrlCmdOsUnixVTSwitch_DISPATCH(pDevice, pParams)
295 #define deviceCtrlCmdOsUnixVTGetFBInfo(pDevice, pParams) deviceCtrlCmdOsUnixVTGetFBInfo_DISPATCH(pDevice, pParams)
296 #define deviceShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) deviceShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy)
297 #define deviceCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) deviceCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided)
298 #define deviceMapTo(pResource, pParams) deviceMapTo_DISPATCH(pResource, pParams)
299 #define deviceGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) deviceGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace)
300 #define deviceGetRefCount(pResource) deviceGetRefCount_DISPATCH(pResource)
301 #define deviceAddAdditionalDependants(pClient, pResource, pReference) deviceAddAdditionalDependants_DISPATCH(pClient, pResource, pReference)
302 #define deviceControl_Prologue(pResource, pCallContext, pParams) deviceControl_Prologue_DISPATCH(pResource, pCallContext, pParams)
303 #define deviceGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) deviceGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize)
304 #define deviceUnmapFrom(pResource, pParams) deviceUnmapFrom_DISPATCH(pResource, pParams)
305 #define deviceControl_Epilogue(pResource, pCallContext, pParams) deviceControl_Epilogue_DISPATCH(pResource, pCallContext, pParams)
306 #define deviceGetInternalObjectHandle(pGpuResource) deviceGetInternalObjectHandle_DISPATCH(pGpuResource)
307 #define deviceUnmap(pGpuResource, pCallContext, pCpuMapping) deviceUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping)
308 #define deviceGetMemInterMapParams(pRmResource, pParams) deviceGetMemInterMapParams_DISPATCH(pRmResource, pParams)
309 #define deviceGetMemoryMappingDescriptor(pRmResource, ppMemDesc) deviceGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc)
310 #define deviceControlFilter(pResource, pCallContext, pParams) deviceControlFilter_DISPATCH(pResource, pCallContext, pParams)
311 #define deviceControlSerialization_Prologue(pResource, pCallContext, pParams) deviceControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams)
312 #define deviceCanCopy(pResource) deviceCanCopy_DISPATCH(pResource)
313 #define deviceIsPartialUnmapSupported(pResource) deviceIsPartialUnmapSupported_DISPATCH(pResource)
314 #define devicePreDestruct(pResource) devicePreDestruct_DISPATCH(pResource)
315 #define deviceIsDuplicate(pResource, hMemory, pDuplicate) deviceIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate)
316 #define deviceControlSerialization_Epilogue(pResource, pCallContext, pParams) deviceControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams)
317 #define deviceMap(pGpuResource, pCallContext, pParams, pCpuMapping) deviceMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping)
318 #define deviceAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) deviceAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight)
319 NV_STATUS deviceControl_IMPL(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams);
320
deviceControl_DISPATCH(struct Device * pResource,struct CALL_CONTEXT * pCallContext,struct RS_RES_CONTROL_PARAMS_INTERNAL * pParams)321 static inline NV_STATUS deviceControl_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
322 return pResource->__deviceControl__(pResource, pCallContext, pParams);
323 }
324
325 NV_STATUS deviceInternalControlForward_IMPL(struct Device *pDevice, NvU32 command, void *pParams, NvU32 size);
326
deviceInternalControlForward_DISPATCH(struct Device * pDevice,NvU32 command,void * pParams,NvU32 size)327 static inline NV_STATUS deviceInternalControlForward_DISPATCH(struct Device *pDevice, NvU32 command, void *pParams, NvU32 size) {
328 return pDevice->__deviceInternalControlForward__(pDevice, command, pParams, size);
329 }
330
331 NV_STATUS deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *pBifDmaBaseSysmemParams);
332
deviceCtrlCmdBifGetDmaBaseSysmemAddr_DISPATCH(struct Device * pDevice,NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS * pBifDmaBaseSysmemParams)333 static inline NV_STATUS deviceCtrlCmdBifGetDmaBaseSysmemAddr_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *pBifDmaBaseSysmemParams) {
334 return pDevice->__deviceCtrlCmdBifGetDmaBaseSysmemAddr__(pDevice, pBifDmaBaseSysmemParams);
335 }
336
337 NV_STATUS deviceCtrlCmdBifAspmFeatureSupported_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *pBifAspmParams);
338
deviceCtrlCmdBifAspmFeatureSupported_DISPATCH(struct Device * pDevice,NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS * pBifAspmParams)339 static inline NV_STATUS deviceCtrlCmdBifAspmFeatureSupported_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *pBifAspmParams) {
340 return pDevice->__deviceCtrlCmdBifAspmFeatureSupported__(pDevice, pBifAspmParams);
341 }
342
343 NV_STATUS deviceCtrlCmdBifAspmCyaUpdate_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *pBifAspmCyaParams);
344
deviceCtrlCmdBifAspmCyaUpdate_DISPATCH(struct Device * pDevice,NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS * pBifAspmCyaParams)345 static inline NV_STATUS deviceCtrlCmdBifAspmCyaUpdate_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *pBifAspmCyaParams) {
346 return pDevice->__deviceCtrlCmdBifAspmCyaUpdate__(pDevice, pBifAspmCyaParams);
347 }
348
349 NV_STATUS deviceCtrlCmdBifGetPciePowerControlMask_IMPL(struct Device *pDevice, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *pBifPciePowerControlParams);
350
deviceCtrlCmdBifGetPciePowerControlMask_DISPATCH(struct Device * pDevice,NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS * pBifPciePowerControlParams)351 static inline NV_STATUS deviceCtrlCmdBifGetPciePowerControlMask_DISPATCH(struct Device *pDevice, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *pBifPciePowerControlParams) {
352 return pDevice->__deviceCtrlCmdBifGetPciePowerControlMask__(pDevice, pBifPciePowerControlParams);
353 }
354
355 NV_STATUS deviceCtrlCmdDmaGetPteInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams);
356
deviceCtrlCmdDmaGetPteInfo_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS * pParams)357 static inline NV_STATUS deviceCtrlCmdDmaGetPteInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams) {
358 return pDevice->__deviceCtrlCmdDmaGetPteInfo__(pDevice, pParams);
359 }
360
361 NV_STATUS deviceCtrlCmdDmaUpdatePde2_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *pParams);
362
deviceCtrlCmdDmaUpdatePde2_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS * pParams)363 static inline NV_STATUS deviceCtrlCmdDmaUpdatePde2_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_UPDATE_PDE_2_PARAMS *pParams) {
364 return pDevice->__deviceCtrlCmdDmaUpdatePde2__(pDevice, pParams);
365 }
366
367 NV_STATUS deviceCtrlCmdDmaSetPageDirectory_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *pParams);
368
deviceCtrlCmdDmaSetPageDirectory_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS * pParams)369 static inline NV_STATUS deviceCtrlCmdDmaSetPageDirectory_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *pParams) {
370 return pDevice->__deviceCtrlCmdDmaSetPageDirectory__(pDevice, pParams);
371 }
372
373 NV_STATUS deviceCtrlCmdDmaUnsetPageDirectory_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *pParams);
374
deviceCtrlCmdDmaUnsetPageDirectory_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS * pParams)375 static inline NV_STATUS deviceCtrlCmdDmaUnsetPageDirectory_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *pParams) {
376 return pDevice->__deviceCtrlCmdDmaUnsetPageDirectory__(pDevice, pParams);
377 }
378
379 NV_STATUS deviceCtrlCmdDmaFlush_VF(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams);
380
deviceCtrlCmdDmaFlush_5baef9(struct Device * pDevice,NV0080_CTRL_DMA_FLUSH_PARAMS * flushParams)381 static inline NV_STATUS deviceCtrlCmdDmaFlush_5baef9(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams) {
382 NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
383 }
384
deviceCtrlCmdDmaFlush_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_FLUSH_PARAMS * flushParams)385 static inline NV_STATUS deviceCtrlCmdDmaFlush_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_FLUSH_PARAMS *flushParams) {
386 return pDevice->__deviceCtrlCmdDmaFlush__(pDevice, flushParams);
387 }
388
389 NV_STATUS deviceCtrlCmdDmaAdvSchedGetVaCaps_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams);
390
deviceCtrlCmdDmaAdvSchedGetVaCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS * pParams)391 static inline NV_STATUS deviceCtrlCmdDmaAdvSchedGetVaCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) {
392 return pDevice->__deviceCtrlCmdDmaAdvSchedGetVaCaps__(pDevice, pParams);
393 }
394
395 NV_STATUS deviceCtrlCmdDmaGetPdeInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams);
396
deviceCtrlCmdDmaGetPdeInfo_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS * pParams)397 static inline NV_STATUS deviceCtrlCmdDmaGetPdeInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) {
398 return pDevice->__deviceCtrlCmdDmaGetPdeInfo__(pDevice, pParams);
399 }
400
401 NV_STATUS deviceCtrlCmdDmaSetPteInfo_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams);
402
deviceCtrlCmdDmaSetPteInfo_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS * pParams)403 static inline NV_STATUS deviceCtrlCmdDmaSetPteInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) {
404 return pDevice->__deviceCtrlCmdDmaSetPteInfo__(pDevice, pParams);
405 }
406
407 NV_STATUS deviceCtrlCmdDmaInvalidateTLB_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams);
408
deviceCtrlCmdDmaInvalidateTLB_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS * pParams)409 static inline NV_STATUS deviceCtrlCmdDmaInvalidateTLB_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_INVALIDATE_TLB_PARAMS *pParams) {
410 return pDevice->__deviceCtrlCmdDmaInvalidateTLB__(pDevice, pParams);
411 }
412
413 NV_STATUS deviceCtrlCmdDmaGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_GET_CAPS_PARAMS *pDmaCapsParams);
414
deviceCtrlCmdDmaGetCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_GET_CAPS_PARAMS * pDmaCapsParams)415 static inline NV_STATUS deviceCtrlCmdDmaGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_GET_CAPS_PARAMS *pDmaCapsParams) {
416 return pDevice->__deviceCtrlCmdDmaGetCaps__(pDevice, pDmaCapsParams);
417 }
418
419 NV_STATUS deviceCtrlCmdDmaSetVASpaceSize_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *pParams);
420
deviceCtrlCmdDmaSetVASpaceSize_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS * pParams)421 static inline NV_STATUS deviceCtrlCmdDmaSetVASpaceSize_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_VA_SPACE_SIZE_PARAMS *pParams) {
422 return pDevice->__deviceCtrlCmdDmaSetVASpaceSize__(pDevice, pParams);
423 }
424
425 NV_STATUS deviceCtrlCmdDmaEnablePrivilegedRange_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *pParams);
426
deviceCtrlCmdDmaEnablePrivilegedRange_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS * pParams)427 static inline NV_STATUS deviceCtrlCmdDmaEnablePrivilegedRange_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *pParams) {
428 return pDevice->__deviceCtrlCmdDmaEnablePrivilegedRange__(pDevice, pParams);
429 }
430
431 NV_STATUS deviceCtrlCmdDmaSetDefaultVASpace_IMPL(struct Device *pDevice, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *pParams);
432
deviceCtrlCmdDmaSetDefaultVASpace_DISPATCH(struct Device * pDevice,NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS * pParams)433 static inline NV_STATUS deviceCtrlCmdDmaSetDefaultVASpace_DISPATCH(struct Device *pDevice, NV0080_CTRL_DMA_SET_DEFAULT_VASPACE_PARAMS *pParams) {
434 return pDevice->__deviceCtrlCmdDmaSetDefaultVASpace__(pDevice, pParams);
435 }
436
437 NV_STATUS deviceCtrlCmdKGrGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_PARAMS *pParams);
438
deviceCtrlCmdKGrGetCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_GR_GET_CAPS_PARAMS * pParams)439 static inline NV_STATUS deviceCtrlCmdKGrGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_PARAMS *pParams) {
440 return pDevice->__deviceCtrlCmdKGrGetCaps__(pDevice, pParams);
441 }
442
443 NV_STATUS deviceCtrlCmdKGrGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *pParams);
444
deviceCtrlCmdKGrGetCapsV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_GR_GET_CAPS_V2_PARAMS * pParams)445 static inline NV_STATUS deviceCtrlCmdKGrGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_CAPS_V2_PARAMS *pParams) {
446 return pDevice->__deviceCtrlCmdKGrGetCapsV2__(pDevice, pParams);
447 }
448
449 NV_STATUS deviceCtrlCmdKGrGetInfo_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_PARAMS *pParams);
450
deviceCtrlCmdKGrGetInfo_DISPATCH(struct Device * pDevice,NV0080_CTRL_GR_GET_INFO_PARAMS * pParams)451 static inline NV_STATUS deviceCtrlCmdKGrGetInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_PARAMS *pParams) {
452 return pDevice->__deviceCtrlCmdKGrGetInfo__(pDevice, pParams);
453 }
454
455 NV_STATUS deviceCtrlCmdKGrGetInfoV2_IMPL(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *pParams);
456
deviceCtrlCmdKGrGetInfoV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_GR_GET_INFO_V2_PARAMS * pParams)457 static inline NV_STATUS deviceCtrlCmdKGrGetInfoV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_GET_INFO_V2_PARAMS *pParams) {
458 return pDevice->__deviceCtrlCmdKGrGetInfoV2__(pDevice, pParams);
459 }
460
461 NV_STATUS deviceCtrlCmdKGrGetTpcPartitionMode_IMPL(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams);
462
deviceCtrlCmdKGrGetTpcPartitionMode_DISPATCH(struct Device * pDevice,NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS * pParams)463 static inline NV_STATUS deviceCtrlCmdKGrGetTpcPartitionMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams) {
464 return pDevice->__deviceCtrlCmdKGrGetTpcPartitionMode__(pDevice, pParams);
465 }
466
467 NV_STATUS deviceCtrlCmdKGrSetTpcPartitionMode_IMPL(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams);
468
deviceCtrlCmdKGrSetTpcPartitionMode_DISPATCH(struct Device * pDevice,NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS * pParams)469 static inline NV_STATUS deviceCtrlCmdKGrSetTpcPartitionMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GR_TPC_PARTITION_MODE_PARAMS *pParams) {
470 return pDevice->__deviceCtrlCmdKGrSetTpcPartitionMode__(pDevice, pParams);
471 }
472
473 NV_STATUS deviceCtrlCmdFbGetCompbitStoreInfo_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *pCompbitStoreParams);
474
deviceCtrlCmdFbGetCompbitStoreInfo_DISPATCH(struct Device * pDevice,NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS * pCompbitStoreParams)475 static inline NV_STATUS deviceCtrlCmdFbGetCompbitStoreInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_GET_COMPBIT_STORE_INFO_PARAMS *pCompbitStoreParams) {
476 return pDevice->__deviceCtrlCmdFbGetCompbitStoreInfo__(pDevice, pCompbitStoreParams);
477 }
478
479 NV_STATUS deviceCtrlCmdFbGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_PARAMS *pFbCapsParams);
480
deviceCtrlCmdFbGetCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_FB_GET_CAPS_PARAMS * pFbCapsParams)481 static inline NV_STATUS deviceCtrlCmdFbGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_PARAMS *pFbCapsParams) {
482 return pDevice->__deviceCtrlCmdFbGetCaps__(pDevice, pFbCapsParams);
483 }
484
485 NV_STATUS deviceCtrlCmdFbGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *pFbCapsParams);
486
deviceCtrlCmdFbGetCapsV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_FB_GET_CAPS_V2_PARAMS * pFbCapsParams)487 static inline NV_STATUS deviceCtrlCmdFbGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_GET_CAPS_V2_PARAMS *pFbCapsParams) {
488 return pDevice->__deviceCtrlCmdFbGetCapsV2__(pDevice, pFbCapsParams);
489 }
490
491 NV_STATUS deviceCtrlCmdSetDefaultVidmemPhysicality_IMPL(struct Device *pDevice, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *pParams);
492
deviceCtrlCmdSetDefaultVidmemPhysicality_DISPATCH(struct Device * pDevice,NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS * pParams)493 static inline NV_STATUS deviceCtrlCmdSetDefaultVidmemPhysicality_DISPATCH(struct Device *pDevice, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *pParams) {
494 return pDevice->__deviceCtrlCmdSetDefaultVidmemPhysicality__(pDevice, pParams);
495 }
496
497 NV_STATUS deviceCtrlCmdFifoGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *pFifoCapsParams);
498
deviceCtrlCmdFifoGetCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_GET_CAPS_PARAMS * pFifoCapsParams)499 static inline NV_STATUS deviceCtrlCmdFifoGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *pFifoCapsParams) {
500 return pDevice->__deviceCtrlCmdFifoGetCaps__(pDevice, pFifoCapsParams);
501 }
502
503 NV_STATUS deviceCtrlCmdFifoGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *pFifoCapsParams);
504
deviceCtrlCmdFifoGetCapsV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS * pFifoCapsParams)505 static inline NV_STATUS deviceCtrlCmdFifoGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *pFifoCapsParams) {
506 return pDevice->__deviceCtrlCmdFifoGetCapsV2__(pDevice, pFifoCapsParams);
507 }
508
509 NV_STATUS deviceCtrlCmdFifoStartSelectedChannels_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *pStartSel);
510
deviceCtrlCmdFifoStartSelectedChannels_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS * pStartSel)511 static inline NV_STATUS deviceCtrlCmdFifoStartSelectedChannels_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *pStartSel) {
512 return pDevice->__deviceCtrlCmdFifoStartSelectedChannels__(pDevice, pStartSel);
513 }
514
515 NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams);
516
deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS * pParams)517 static inline NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams) {
518 return pDevice->__deviceCtrlCmdFifoGetEngineContextProperties__(pDevice, pParams);
519 }
520
521 NV_STATUS deviceCtrlCmdFifoStopRunlist_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *pStopRunlistParams);
522
deviceCtrlCmdFifoStopRunlist_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS * pStopRunlistParams)523 static inline NV_STATUS deviceCtrlCmdFifoStopRunlist_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *pStopRunlistParams) {
524 return pDevice->__deviceCtrlCmdFifoStopRunlist__(pDevice, pStopRunlistParams);
525 }
526
527 NV_STATUS deviceCtrlCmdFifoStartRunlist_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *pStartRunlistParams);
528
deviceCtrlCmdFifoStartRunlist_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_START_RUNLIST_PARAMS * pStartRunlistParams)529 static inline NV_STATUS deviceCtrlCmdFifoStartRunlist_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *pStartRunlistParams) {
530 return pDevice->__deviceCtrlCmdFifoStartRunlist__(pDevice, pStartRunlistParams);
531 }
532
533 NV_STATUS deviceCtrlCmdFifoGetChannelList_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *pChannelParams);
534
deviceCtrlCmdFifoGetChannelList_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS * pChannelParams)535 static inline NV_STATUS deviceCtrlCmdFifoGetChannelList_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *pChannelParams) {
536 return pDevice->__deviceCtrlCmdFifoGetChannelList__(pDevice, pChannelParams);
537 }
538
539 NV_STATUS deviceCtrlCmdFifoGetLatencyBufferSize_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pGetLatencyBufferSizeParams);
540
deviceCtrlCmdFifoGetLatencyBufferSize_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS * pGetLatencyBufferSizeParams)541 static inline NV_STATUS deviceCtrlCmdFifoGetLatencyBufferSize_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_LATENCY_BUFFER_SIZE_PARAMS *pGetLatencyBufferSizeParams) {
542 return pDevice->__deviceCtrlCmdFifoGetLatencyBufferSize__(pDevice, pGetLatencyBufferSizeParams);
543 }
544
545 NV_STATUS deviceCtrlCmdFifoSetChannelProperties_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *pSetChannelPropertiesParams);
546
deviceCtrlCmdFifoSetChannelProperties_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS * pSetChannelPropertiesParams)547 static inline NV_STATUS deviceCtrlCmdFifoSetChannelProperties_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_SET_CHANNEL_PROPERTIES_PARAMS *pSetChannelPropertiesParams) {
548 return pDevice->__deviceCtrlCmdFifoSetChannelProperties__(pDevice, pSetChannelPropertiesParams);
549 }
550
551 NV_STATUS deviceCtrlCmdFifoIdleChannels_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *pParams);
552
deviceCtrlCmdFifoIdleChannels_DISPATCH(struct Device * pDevice,NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS * pParams)553 static inline NV_STATUS deviceCtrlCmdFifoIdleChannels_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_IDLE_CHANNELS_PARAMS *pParams) {
554 return pDevice->__deviceCtrlCmdFifoIdleChannels__(pDevice, pParams);
555 }
556
557 NV_STATUS deviceCtrlCmdHostGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_PARAMS *pHostCapsParams);
558
deviceCtrlCmdHostGetCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_HOST_GET_CAPS_PARAMS * pHostCapsParams)559 static inline NV_STATUS deviceCtrlCmdHostGetCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_PARAMS *pHostCapsParams) {
560 return pDevice->__deviceCtrlCmdHostGetCaps__(pDevice, pHostCapsParams);
561 }
562
563 NV_STATUS deviceCtrlCmdHostGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *pHostCapsParamsV2);
564
deviceCtrlCmdHostGetCapsV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS * pHostCapsParamsV2)565 static inline NV_STATUS deviceCtrlCmdHostGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS *pHostCapsParamsV2) {
566 return pDevice->__deviceCtrlCmdHostGetCapsV2__(pDevice, pHostCapsParamsV2);
567 }
568
569 NV_STATUS deviceCtrlCmdKPerfCudaLimitSetControl_IMPL(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams);
570
deviceCtrlCmdKPerfCudaLimitSetControl_DISPATCH(struct Device * pDevice,NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS * pParams)571 static inline NV_STATUS deviceCtrlCmdKPerfCudaLimitSetControl_DISPATCH(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams) {
572 return pDevice->__deviceCtrlCmdKPerfCudaLimitSetControl__(pDevice, pParams);
573 }
574
575 NV_STATUS deviceCtrlCmdInternalPerfCudaLimitSetControl_IMPL(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams);
576
deviceCtrlCmdInternalPerfCudaLimitSetControl_DISPATCH(struct Device * pDevice,NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS * pParams)577 static inline NV_STATUS deviceCtrlCmdInternalPerfCudaLimitSetControl_DISPATCH(struct Device *pDevice, NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS *pParams) {
578 return pDevice->__deviceCtrlCmdInternalPerfCudaLimitSetControl__(pDevice, pParams);
579 }
580
581 NV_STATUS deviceCtrlCmdInternalPerfCudaLimitDisable_IMPL(struct Device *pDevice);
582
deviceCtrlCmdInternalPerfCudaLimitDisable_DISPATCH(struct Device * pDevice)583 static inline NV_STATUS deviceCtrlCmdInternalPerfCudaLimitDisable_DISPATCH(struct Device *pDevice) {
584 return pDevice->__deviceCtrlCmdInternalPerfCudaLimitDisable__(pDevice);
585 }
586
587 NV_STATUS deviceCtrlCmdGpuGetClasslist_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *pClassListParams);
588
deviceCtrlCmdGpuGetClasslist_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS * pClassListParams)589 static inline NV_STATUS deviceCtrlCmdGpuGetClasslist_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *pClassListParams) {
590 return pDevice->__deviceCtrlCmdGpuGetClasslist__(pDevice, pClassListParams);
591 }
592
593 NV_STATUS deviceCtrlCmdGpuGetClasslistV2_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *pParams);
594
deviceCtrlCmdGpuGetClasslistV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS * pParams)595 static inline NV_STATUS deviceCtrlCmdGpuGetClasslistV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS *pParams) {
596 return pDevice->__deviceCtrlCmdGpuGetClasslistV2__(pDevice, pParams);
597 }
598
599 NV_STATUS deviceCtrlCmdGpuGetNumSubdevices_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *pSubDeviceCountParams);
600
deviceCtrlCmdGpuGetNumSubdevices_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS * pSubDeviceCountParams)601 static inline NV_STATUS deviceCtrlCmdGpuGetNumSubdevices_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS *pSubDeviceCountParams) {
602 return pDevice->__deviceCtrlCmdGpuGetNumSubdevices__(pDevice, pSubDeviceCountParams);
603 }
604
605 NV_STATUS deviceCtrlCmdGpuModifyGpuSwStatePersistence_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *pParams);
606
deviceCtrlCmdGpuModifyGpuSwStatePersistence_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS * pParams)607 static inline NV_STATUS deviceCtrlCmdGpuModifyGpuSwStatePersistence_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_MODIFY_SW_STATE_PERSISTENCE_PARAMS *pParams) {
608 return pDevice->__deviceCtrlCmdGpuModifyGpuSwStatePersistence__(pDevice, pParams);
609 }
610
611 NV_STATUS deviceCtrlCmdGpuQueryGpuSwStatePersistence_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *pParams);
612
deviceCtrlCmdGpuQueryGpuSwStatePersistence_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS * pParams)613 static inline NV_STATUS deviceCtrlCmdGpuQueryGpuSwStatePersistence_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS *pParams) {
614 return pDevice->__deviceCtrlCmdGpuQueryGpuSwStatePersistence__(pDevice, pParams);
615 }
616
617 NV_STATUS deviceCtrlCmdGpuGetVirtualizationMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *pParams);
618
deviceCtrlCmdGpuGetVirtualizationMode_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS * pParams)619 static inline NV_STATUS deviceCtrlCmdGpuGetVirtualizationMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS *pParams) {
620 return pDevice->__deviceCtrlCmdGpuGetVirtualizationMode__(pDevice, pParams);
621 }
622
623 NV_STATUS deviceCtrlCmdGpuSetVgpuVfBar1Size_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *pParams);
624
deviceCtrlCmdGpuSetVgpuVfBar1Size_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS * pParams)625 static inline NV_STATUS deviceCtrlCmdGpuSetVgpuVfBar1Size_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *pParams) {
626 return pDevice->__deviceCtrlCmdGpuSetVgpuVfBar1Size__(pDevice, pParams);
627 }
628
629 NV_STATUS deviceCtrlCmdGpuGetSparseTextureComputeMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams);
630
deviceCtrlCmdGpuGetSparseTextureComputeMode_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS * pModeParams)631 static inline NV_STATUS deviceCtrlCmdGpuGetSparseTextureComputeMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams) {
632 return pDevice->__deviceCtrlCmdGpuGetSparseTextureComputeMode__(pDevice, pModeParams);
633 }
634
635 NV_STATUS deviceCtrlCmdGpuSetSparseTextureComputeMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams);
636
deviceCtrlCmdGpuSetSparseTextureComputeMode_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS * pModeParams)637 static inline NV_STATUS deviceCtrlCmdGpuSetSparseTextureComputeMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_SET_SPARSE_TEXTURE_COMPUTE_MODE_PARAMS *pModeParams) {
638 return pDevice->__deviceCtrlCmdGpuSetSparseTextureComputeMode__(pDevice, pModeParams);
639 }
640
641 NV_STATUS deviceCtrlCmdGpuGetVgxCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *pParams);
642
deviceCtrlCmdGpuGetVgxCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS * pParams)643 static inline NV_STATUS deviceCtrlCmdGpuGetVgxCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGX_CAPS_PARAMS *pParams) {
644 return pDevice->__deviceCtrlCmdGpuGetVgxCaps__(pDevice, pParams);
645 }
646
647 NV_STATUS deviceCtrlCmdGpuGetBrandCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *pParams);
648
deviceCtrlCmdGpuGetBrandCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS * pParams)649 static inline NV_STATUS deviceCtrlCmdGpuGetBrandCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_BRAND_CAPS_PARAMS *pParams) {
650 return pDevice->__deviceCtrlCmdGpuGetBrandCaps__(pDevice, pParams);
651 }
652
653 NV_STATUS deviceCtrlCmdGpuVirtualizationSwitchToVga_IMPL(struct Device *pDevice);
654
deviceCtrlCmdGpuVirtualizationSwitchToVga_DISPATCH(struct Device * pDevice)655 static inline NV_STATUS deviceCtrlCmdGpuVirtualizationSwitchToVga_DISPATCH(struct Device *pDevice) {
656 return pDevice->__deviceCtrlCmdGpuVirtualizationSwitchToVga__(pDevice);
657 }
658
659 NV_STATUS deviceCtrlCmdGpuSetVgpuHeterogeneousMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams);
660
deviceCtrlCmdGpuSetVgpuHeterogeneousMode_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS * pParams)661 static inline NV_STATUS deviceCtrlCmdGpuSetVgpuHeterogeneousMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_SET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams) {
662 return pDevice->__deviceCtrlCmdGpuSetVgpuHeterogeneousMode__(pDevice, pParams);
663 }
664
665 NV_STATUS deviceCtrlCmdGpuGetVgpuHeterogeneousMode_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams);
666
deviceCtrlCmdGpuGetVgpuHeterogeneousMode_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS * pParams)667 static inline NV_STATUS deviceCtrlCmdGpuGetVgpuHeterogeneousMode_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_VGPU_HETEROGENEOUS_MODE_PARAMS *pParams) {
668 return pDevice->__deviceCtrlCmdGpuGetVgpuHeterogeneousMode__(pDevice, pParams);
669 }
670
671 NV_STATUS deviceCtrlCmdGpuGetSriovCaps_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *pParams);
672
deviceCtrlCmdGpuGetSriovCaps_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS * pParams)673 static inline NV_STATUS deviceCtrlCmdGpuGetSriovCaps_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *pParams) {
674 return pDevice->__deviceCtrlCmdGpuGetSriovCaps__(pDevice, pParams);
675 }
676
677 NV_STATUS deviceCtrlCmdGpuGetFindSubDeviceHandle_IMPL(struct Device *pDevice, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *pParams);
678
deviceCtrlCmdGpuGetFindSubDeviceHandle_DISPATCH(struct Device * pDevice,NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM * pParams)679 static inline NV_STATUS deviceCtrlCmdGpuGetFindSubDeviceHandle_DISPATCH(struct Device *pDevice, NV0080_CTRL_GPU_FIND_SUBDEVICE_HANDLE_PARAM *pParams) {
680 return pDevice->__deviceCtrlCmdGpuGetFindSubDeviceHandle__(pDevice, pParams);
681 }
682
683 NV_STATUS deviceCtrlCmdMsencGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams);
684
deviceCtrlCmdMsencGetCapsV2_5baef9(struct Device * pDevice,NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS * pMsencCapsParams)685 static inline NV_STATUS deviceCtrlCmdMsencGetCapsV2_5baef9(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams) {
686 NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
687 }
688
deviceCtrlCmdMsencGetCapsV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS * pMsencCapsParams)689 static inline NV_STATUS deviceCtrlCmdMsencGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *pMsencCapsParams) {
690 return pDevice->__deviceCtrlCmdMsencGetCapsV2__(pDevice, pMsencCapsParams);
691 }
692
693 NV_STATUS deviceCtrlCmdBspGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams);
694
deviceCtrlCmdBspGetCapsV2_5baef9(struct Device * pDevice,NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 * pBspCapParams)695 static inline NV_STATUS deviceCtrlCmdBspGetCapsV2_5baef9(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams) {
696 NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
697 }
698
deviceCtrlCmdBspGetCapsV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 * pBspCapParams)699 static inline NV_STATUS deviceCtrlCmdBspGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2 *pBspCapParams) {
700 return pDevice->__deviceCtrlCmdBspGetCapsV2__(pDevice, pBspCapParams);
701 }
702
703 NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_VF(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams);
704
deviceCtrlCmdNvjpgGetCapsV2_c04480(struct Device * pDevice,NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS * pNvjpgCapsParams)705 static inline NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_c04480(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams) {
706 NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
707 }
708
deviceCtrlCmdNvjpgGetCapsV2_DISPATCH(struct Device * pDevice,NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS * pNvjpgCapsParams)709 static inline NV_STATUS deviceCtrlCmdNvjpgGetCapsV2_DISPATCH(struct Device *pDevice, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *pNvjpgCapsParams) {
710 return pDevice->__deviceCtrlCmdNvjpgGetCapsV2__(pDevice, pNvjpgCapsParams);
711 }
712
713 NV_STATUS deviceCtrlCmdOsUnixVTSwitch_IMPL(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *pParams);
714
deviceCtrlCmdOsUnixVTSwitch_DISPATCH(struct Device * pDevice,NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS * pParams)715 static inline NV_STATUS deviceCtrlCmdOsUnixVTSwitch_DISPATCH(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *pParams) {
716 return pDevice->__deviceCtrlCmdOsUnixVTSwitch__(pDevice, pParams);
717 }
718
719 NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_IMPL(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams);
720
deviceCtrlCmdOsUnixVTGetFBInfo_DISPATCH(struct Device * pDevice,NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS * pParams)721 static inline NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_DISPATCH(struct Device *pDevice, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams) {
722 return pDevice->__deviceCtrlCmdOsUnixVTGetFBInfo__(pDevice, pParams);
723 }
724
deviceShareCallback_DISPATCH(struct Device * pGpuResource,struct RsClient * pInvokingClient,struct RsResourceRef * pParentRef,RS_SHARE_POLICY * pSharePolicy)725 static inline NvBool deviceShareCallback_DISPATCH(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) {
726 return pGpuResource->__deviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy);
727 }
728
deviceCheckMemInterUnmap_DISPATCH(struct Device * pRmResource,NvBool bSubdeviceHandleProvided)729 static inline NV_STATUS deviceCheckMemInterUnmap_DISPATCH(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) {
730 return pRmResource->__deviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided);
731 }
732
deviceMapTo_DISPATCH(struct Device * pResource,RS_RES_MAP_TO_PARAMS * pParams)733 static inline NV_STATUS deviceMapTo_DISPATCH(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) {
734 return pResource->__deviceMapTo__(pResource, pParams);
735 }
736
deviceGetMapAddrSpace_DISPATCH(struct Device * pGpuResource,struct CALL_CONTEXT * pCallContext,NvU32 mapFlags,NV_ADDRESS_SPACE * pAddrSpace)737 static inline NV_STATUS deviceGetMapAddrSpace_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) {
738 return pGpuResource->__deviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace);
739 }
740
deviceGetRefCount_DISPATCH(struct Device * pResource)741 static inline NvU32 deviceGetRefCount_DISPATCH(struct Device *pResource) {
742 return pResource->__deviceGetRefCount__(pResource);
743 }
744
deviceAddAdditionalDependants_DISPATCH(struct RsClient * pClient,struct Device * pResource,RsResourceRef * pReference)745 static inline void deviceAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) {
746 pResource->__deviceAddAdditionalDependants__(pClient, pResource, pReference);
747 }
748
deviceControl_Prologue_DISPATCH(struct Device * pResource,struct CALL_CONTEXT * pCallContext,struct RS_RES_CONTROL_PARAMS_INTERNAL * pParams)749 static inline NV_STATUS deviceControl_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
750 return pResource->__deviceControl_Prologue__(pResource, pCallContext, pParams);
751 }
752
deviceGetRegBaseOffsetAndSize_DISPATCH(struct Device * pGpuResource,struct OBJGPU * pGpu,NvU32 * pOffset,NvU32 * pSize)753 static inline NV_STATUS deviceGetRegBaseOffsetAndSize_DISPATCH(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) {
754 return pGpuResource->__deviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize);
755 }
756
deviceUnmapFrom_DISPATCH(struct Device * pResource,RS_RES_UNMAP_FROM_PARAMS * pParams)757 static inline NV_STATUS deviceUnmapFrom_DISPATCH(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) {
758 return pResource->__deviceUnmapFrom__(pResource, pParams);
759 }
760
deviceControl_Epilogue_DISPATCH(struct Device * pResource,struct CALL_CONTEXT * pCallContext,struct RS_RES_CONTROL_PARAMS_INTERNAL * pParams)761 static inline void deviceControl_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
762 pResource->__deviceControl_Epilogue__(pResource, pCallContext, pParams);
763 }
764
deviceGetInternalObjectHandle_DISPATCH(struct Device * pGpuResource)765 static inline NvHandle deviceGetInternalObjectHandle_DISPATCH(struct Device *pGpuResource) {
766 return pGpuResource->__deviceGetInternalObjectHandle__(pGpuResource);
767 }
768
deviceUnmap_DISPATCH(struct Device * pGpuResource,struct CALL_CONTEXT * pCallContext,struct RsCpuMapping * pCpuMapping)769 static inline NV_STATUS deviceUnmap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) {
770 return pGpuResource->__deviceUnmap__(pGpuResource, pCallContext, pCpuMapping);
771 }
772
deviceGetMemInterMapParams_DISPATCH(struct Device * pRmResource,RMRES_MEM_INTER_MAP_PARAMS * pParams)773 static inline NV_STATUS deviceGetMemInterMapParams_DISPATCH(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) {
774 return pRmResource->__deviceGetMemInterMapParams__(pRmResource, pParams);
775 }
776
deviceGetMemoryMappingDescriptor_DISPATCH(struct Device * pRmResource,struct MEMORY_DESCRIPTOR ** ppMemDesc)777 static inline NV_STATUS deviceGetMemoryMappingDescriptor_DISPATCH(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) {
778 return pRmResource->__deviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc);
779 }
780
deviceControlFilter_DISPATCH(struct Device * pResource,struct CALL_CONTEXT * pCallContext,struct RS_RES_CONTROL_PARAMS_INTERNAL * pParams)781 static inline NV_STATUS deviceControlFilter_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
782 return pResource->__deviceControlFilter__(pResource, pCallContext, pParams);
783 }
784
deviceControlSerialization_Prologue_DISPATCH(struct Device * pResource,struct CALL_CONTEXT * pCallContext,struct RS_RES_CONTROL_PARAMS_INTERNAL * pParams)785 static inline NV_STATUS deviceControlSerialization_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
786 return pResource->__deviceControlSerialization_Prologue__(pResource, pCallContext, pParams);
787 }
788
deviceCanCopy_DISPATCH(struct Device * pResource)789 static inline NvBool deviceCanCopy_DISPATCH(struct Device *pResource) {
790 return pResource->__deviceCanCopy__(pResource);
791 }
792
deviceIsPartialUnmapSupported_DISPATCH(struct Device * pResource)793 static inline NvBool deviceIsPartialUnmapSupported_DISPATCH(struct Device *pResource) {
794 return pResource->__deviceIsPartialUnmapSupported__(pResource);
795 }
796
devicePreDestruct_DISPATCH(struct Device * pResource)797 static inline void devicePreDestruct_DISPATCH(struct Device *pResource) {
798 pResource->__devicePreDestruct__(pResource);
799 }
800
deviceIsDuplicate_DISPATCH(struct Device * pResource,NvHandle hMemory,NvBool * pDuplicate)801 static inline NV_STATUS deviceIsDuplicate_DISPATCH(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) {
802 return pResource->__deviceIsDuplicate__(pResource, hMemory, pDuplicate);
803 }
804
deviceControlSerialization_Epilogue_DISPATCH(struct Device * pResource,struct CALL_CONTEXT * pCallContext,struct RS_RES_CONTROL_PARAMS_INTERNAL * pParams)805 static inline void deviceControlSerialization_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
806 pResource->__deviceControlSerialization_Epilogue__(pResource, pCallContext, pParams);
807 }
808
deviceMap_DISPATCH(struct Device * pGpuResource,struct CALL_CONTEXT * pCallContext,struct RS_CPU_MAP_PARAMS * pParams,struct RsCpuMapping * pCpuMapping)809 static inline NV_STATUS deviceMap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) {
810 return pGpuResource->__deviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping);
811 }
812
deviceAccessCallback_DISPATCH(struct Device * pResource,struct RsClient * pInvokingClient,void * pAllocParams,RsAccessRight accessRight)813 static inline NvBool deviceAccessCallback_DISPATCH(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) {
814 return pResource->__deviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight);
815 }
816
817 NV_STATUS deviceConstruct_IMPL(struct Device *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams);
818
819 #define __nvoc_deviceConstruct(arg_pResource, arg_pCallContext, arg_pParams) deviceConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams)
820 void deviceDestruct_IMPL(struct Device *pResource);
821
822 #define __nvoc_deviceDestruct(pResource) deviceDestruct_IMPL(pResource)
823 NV_STATUS deviceGetByHandle_IMPL(struct RsClient *pClient, NvHandle hDevice, struct Device **ppDevice);
824
825 #define deviceGetByHandle(pClient, hDevice, ppDevice) deviceGetByHandle_IMPL(pClient, hDevice, ppDevice)
826 NV_STATUS deviceGetByInstance_IMPL(struct RsClient *pClient, NvU32 deviceInstance, struct Device **ppDevice);
827
828 #define deviceGetByInstance(pClient, deviceInstance, ppDevice) deviceGetByInstance_IMPL(pClient, deviceInstance, ppDevice)
829 NV_STATUS deviceGetByGpu_IMPL(struct RsClient *pClient, struct OBJGPU *pGpu, NvBool bAnyInGroup, struct Device **ppDevice);
830
831 #define deviceGetByGpu(pClient, pGpu, bAnyInGroup, ppDevice) deviceGetByGpu_IMPL(pClient, pGpu, bAnyInGroup, ppDevice)
832 NV_STATUS deviceGetDefaultVASpace_IMPL(struct Device *pDevice, struct OBJVASPACE **ppVAS);
833
834 #ifdef __nvoc_device_h_disabled
deviceGetDefaultVASpace(struct Device * pDevice,struct OBJVASPACE ** ppVAS)835 static inline NV_STATUS deviceGetDefaultVASpace(struct Device *pDevice, struct OBJVASPACE **ppVAS) {
836 NV_ASSERT_FAILED_PRECOMP("Device was disabled!");
837 return NV_ERR_NOT_SUPPORTED;
838 }
839 #else //__nvoc_device_h_disabled
840 #define deviceGetDefaultVASpace(pDevice, ppVAS) deviceGetDefaultVASpace_IMPL(pDevice, ppVAS)
841 #endif //__nvoc_device_h_disabled
842
843 NV_STATUS deviceSetClientShare_IMPL(struct Device *pDevice, NvHandle hClientShare, NvU64 vaSize, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 deviceAllocFlags);
844
845 #ifdef __nvoc_device_h_disabled
deviceSetClientShare(struct Device * pDevice,NvHandle hClientShare,NvU64 vaSize,NvU64 vaStartInternal,NvU64 vaLimitInternal,NvU32 deviceAllocFlags)846 static inline NV_STATUS deviceSetClientShare(struct Device *pDevice, NvHandle hClientShare, NvU64 vaSize, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 deviceAllocFlags) {
847 NV_ASSERT_FAILED_PRECOMP("Device was disabled!");
848 return NV_ERR_NOT_SUPPORTED;
849 }
850 #else //__nvoc_device_h_disabled
851 #define deviceSetClientShare(pDevice, hClientShare, vaSize, vaStartInternal, vaLimitInternal, deviceAllocFlags) deviceSetClientShare_IMPL(pDevice, hClientShare, vaSize, vaStartInternal, vaLimitInternal, deviceAllocFlags)
852 #endif //__nvoc_device_h_disabled
853
854 void deviceRemoveFromClientShare_IMPL(struct Device *pDevice);
855
856 #ifdef __nvoc_device_h_disabled
deviceRemoveFromClientShare(struct Device * pDevice)857 static inline void deviceRemoveFromClientShare(struct Device *pDevice) {
858 NV_ASSERT_FAILED_PRECOMP("Device was disabled!");
859 }
860 #else //__nvoc_device_h_disabled
861 #define deviceRemoveFromClientShare(pDevice) deviceRemoveFromClientShare_IMPL(pDevice)
862 #endif //__nvoc_device_h_disabled
863
864 NV_STATUS deviceSetDefaultVASpace_IMPL(struct Device *pDevice, NvHandle hVASpace);
865
866 #ifdef __nvoc_device_h_disabled
deviceSetDefaultVASpace(struct Device * pDevice,NvHandle hVASpace)867 static inline NV_STATUS deviceSetDefaultVASpace(struct Device *pDevice, NvHandle hVASpace) {
868 NV_ASSERT_FAILED_PRECOMP("Device was disabled!");
869 return NV_ERR_NOT_SUPPORTED;
870 }
871 #else //__nvoc_device_h_disabled
872 #define deviceSetDefaultVASpace(pDevice, hVASpace) deviceSetDefaultVASpace_IMPL(pDevice, hVASpace)
873 #endif //__nvoc_device_h_disabled
874
875 #undef PRIVATE_FIELD
876
877
878 // ****************************************************************************
879 // Deprecated Definitions
880 // ****************************************************************************
881
882 /**
883 * WARNING: This function is deprecated and use is *strongly* discouraged
884 * (especially for new code!)
885 *
886 * From the function name (CliSetGpuContext) it appears as a simple accessor but
887 * violates expectations by modifying the SLI BC threadstate (calls to
888 * GPU_RES_SET_THREAD_BC_STATE). This can be dangerous if not carefully managed
889 * by the caller.
890 *
891 * Instead of using this routine, please use deviceGetByHandle then call
892 * GPU_RES_GET_GPU, GPU_RES_GET_GPUGRP, GPU_RES_SET_THREAD_BC_STATE as needed.
893 *
894 * Note that GPU_RES_GET_GPU supports returning a pGpu for both pDevice,
895 * pSubdevice, the base pResource type, and any resource that inherits from
896 * GpuResource. That is, instead of using CliSetGpuContext or
897 * CliSetSubDeviceContext, please use following pattern to look up the pGpu:
898 *
899 * OBJGPU *pGpu = GPU_RES_GET_GPU(pResource or pResourceRef->pResource)
900 *
901 * To set the threadstate, please use:
902 *
903 * GPU_RES_SET_THREAD_BC_STATE(pResource or pResourceRef->pResource);
904 */
905 NV_STATUS CliSetGpuContext(NvHandle, NvHandle, OBJGPU **, struct OBJGPUGRP **);
906
907 /**
908 * WARNING: This function is deprecated! Please use gpuGetByRef()
909 */
910 OBJGPU *CliGetGpuFromContext(RsResourceRef *pContextRef, NvBool *pbBroadcast);
911
912 /**
913 * WARNING: This function is deprecated! Please use gpuGetByHandle()
914 */
915 OBJGPU *CliGetGpuFromHandle(NvHandle hClient, NvHandle hResource, NvBool *pbBroadcast);
916
917
918 #endif
919
920 #ifdef __cplusplus
921 } // extern "C"
922 #endif
923
924 #endif // _G_DEVICE_NVOC_H_
925