1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Kernel-based Virtual Machine driver for Linux
4 *
5 * This header defines architecture specific interfaces, x86 version
6 */
7
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
10
11 #include <linux/types.h>
12 #include <linux/mm.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
19
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
28 #include <linux/kfifo.h>
29
30 #include <asm/apic.h>
31 #include <asm/pvclock-abi.h>
32 #include <asm/desc.h>
33 #include <asm/mtrr.h>
34 #include <asm/msr-index.h>
35 #include <asm/asm.h>
36 #include <asm/kvm_page_track.h>
37 #include <asm/kvm_vcpu_regs.h>
38 #include <asm/hyperv-tlfs.h>
39
40 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
41
42 /*
43 * CONFIG_KVM_MAX_NR_VCPUS is defined iff CONFIG_KVM!=n, provide a dummy max if
44 * KVM is disabled (arbitrarily use the default from CONFIG_KVM_MAX_NR_VCPUS).
45 */
46 #ifdef CONFIG_KVM_MAX_NR_VCPUS
47 #define KVM_MAX_VCPUS CONFIG_KVM_MAX_NR_VCPUS
48 #else
49 #define KVM_MAX_VCPUS 1024
50 #endif
51
52 /*
53 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
54 * might be larger than the actual number of VCPUs because the
55 * APIC ID encodes CPU topology information.
56 *
57 * In the worst case, we'll need less than one extra bit for the
58 * Core ID, and less than one extra bit for the Package (Die) ID,
59 * so ratio of 4 should be enough.
60 */
61 #define KVM_VCPU_ID_RATIO 4
62 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
63
64 /* memory slots that are not exposed to userspace */
65 #define KVM_INTERNAL_MEM_SLOTS 3
66
67 #define KVM_HALT_POLL_NS_DEFAULT 200000
68
69 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
70
71 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
72 KVM_DIRTY_LOG_INITIALLY_SET)
73
74 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
75 KVM_BUS_LOCK_DETECTION_EXIT)
76
77 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS (KVM_X86_NOTIFY_VMEXIT_ENABLED | \
78 KVM_X86_NOTIFY_VMEXIT_USER)
79
80 /* x86-specific vcpu->requests bit members */
81 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
82 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
83 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
84 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
85 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
86 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
87 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
88 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
89 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
90 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
91 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
92 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
93 #ifdef CONFIG_KVM_SMM
94 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
95 #endif
96 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
97 #define KVM_REQ_MCLOCK_INPROGRESS \
98 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
99 #define KVM_REQ_SCAN_IOAPIC \
100 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
101 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
102 #define KVM_REQ_APIC_PAGE_RELOAD \
103 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
104 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
105 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
106 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
107 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
108 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
109 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
110 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
111 #define KVM_REQ_APICV_UPDATE \
112 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
113 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
114 #define KVM_REQ_TLB_FLUSH_GUEST \
115 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
116 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
117 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
118 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
119 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
120 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
121 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
122 #define KVM_REQ_HV_TLB_FLUSH \
123 KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
124
125 #define CR0_RESERVED_BITS \
126 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
127 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
128 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
129
130 #define CR4_RESERVED_BITS \
131 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
132 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
133 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
134 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
135 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
136 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \
137 | X86_CR4_LAM_SUP))
138
139 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
140
141
142
143 #define INVALID_PAGE (~(hpa_t)0)
144 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
145
146 /* KVM Hugepage definitions for x86 */
147 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
148 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
149 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
150 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
151 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
152 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
153 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
154
155 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
156 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
157 #define KVM_MMU_HASH_SHIFT 12
158 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
159 #define KVM_MIN_FREE_MMU_PAGES 5
160 #define KVM_REFILL_PAGES 25
161 #define KVM_MAX_CPUID_ENTRIES 256
162 #define KVM_NR_FIXED_MTRR_REGION 88
163 #define KVM_NR_VAR_MTRR 8
164
165 #define ASYNC_PF_PER_VCPU 64
166
167 enum kvm_reg {
168 VCPU_REGS_RAX = __VCPU_REGS_RAX,
169 VCPU_REGS_RCX = __VCPU_REGS_RCX,
170 VCPU_REGS_RDX = __VCPU_REGS_RDX,
171 VCPU_REGS_RBX = __VCPU_REGS_RBX,
172 VCPU_REGS_RSP = __VCPU_REGS_RSP,
173 VCPU_REGS_RBP = __VCPU_REGS_RBP,
174 VCPU_REGS_RSI = __VCPU_REGS_RSI,
175 VCPU_REGS_RDI = __VCPU_REGS_RDI,
176 #ifdef CONFIG_X86_64
177 VCPU_REGS_R8 = __VCPU_REGS_R8,
178 VCPU_REGS_R9 = __VCPU_REGS_R9,
179 VCPU_REGS_R10 = __VCPU_REGS_R10,
180 VCPU_REGS_R11 = __VCPU_REGS_R11,
181 VCPU_REGS_R12 = __VCPU_REGS_R12,
182 VCPU_REGS_R13 = __VCPU_REGS_R13,
183 VCPU_REGS_R14 = __VCPU_REGS_R14,
184 VCPU_REGS_R15 = __VCPU_REGS_R15,
185 #endif
186 VCPU_REGS_RIP,
187 NR_VCPU_REGS,
188
189 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
190 VCPU_EXREG_CR0,
191 VCPU_EXREG_CR3,
192 VCPU_EXREG_CR4,
193 VCPU_EXREG_RFLAGS,
194 VCPU_EXREG_SEGMENTS,
195 VCPU_EXREG_EXIT_INFO_1,
196 VCPU_EXREG_EXIT_INFO_2,
197 };
198
199 enum {
200 VCPU_SREG_ES,
201 VCPU_SREG_CS,
202 VCPU_SREG_SS,
203 VCPU_SREG_DS,
204 VCPU_SREG_FS,
205 VCPU_SREG_GS,
206 VCPU_SREG_TR,
207 VCPU_SREG_LDTR,
208 };
209
210 enum exit_fastpath_completion {
211 EXIT_FASTPATH_NONE,
212 EXIT_FASTPATH_REENTER_GUEST,
213 EXIT_FASTPATH_EXIT_HANDLED,
214 };
215 typedef enum exit_fastpath_completion fastpath_t;
216
217 struct x86_emulate_ctxt;
218 struct x86_exception;
219 union kvm_smram;
220 enum x86_intercept;
221 enum x86_intercept_stage;
222
223 #define KVM_NR_DB_REGS 4
224
225 #define DR6_BUS_LOCK (1 << 11)
226 #define DR6_BD (1 << 13)
227 #define DR6_BS (1 << 14)
228 #define DR6_BT (1 << 15)
229 #define DR6_RTM (1 << 16)
230 /*
231 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
232 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
233 * they will never be 0 for now, but when they are defined
234 * in the future it will require no code change.
235 *
236 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
237 */
238 #define DR6_ACTIVE_LOW 0xffff0ff0
239 #define DR6_VOLATILE 0x0001e80f
240 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
241
242 #define DR7_BP_EN_MASK 0x000000ff
243 #define DR7_GE (1 << 9)
244 #define DR7_GD (1 << 13)
245 #define DR7_FIXED_1 0x00000400
246 #define DR7_VOLATILE 0xffff2bff
247
248 #define KVM_GUESTDBG_VALID_MASK \
249 (KVM_GUESTDBG_ENABLE | \
250 KVM_GUESTDBG_SINGLESTEP | \
251 KVM_GUESTDBG_USE_HW_BP | \
252 KVM_GUESTDBG_USE_SW_BP | \
253 KVM_GUESTDBG_INJECT_BP | \
254 KVM_GUESTDBG_INJECT_DB | \
255 KVM_GUESTDBG_BLOCKIRQ)
256
257 #define PFERR_PRESENT_MASK BIT(0)
258 #define PFERR_WRITE_MASK BIT(1)
259 #define PFERR_USER_MASK BIT(2)
260 #define PFERR_RSVD_MASK BIT(3)
261 #define PFERR_FETCH_MASK BIT(4)
262 #define PFERR_PK_MASK BIT(5)
263 #define PFERR_SGX_MASK BIT(15)
264 #define PFERR_GUEST_RMP_MASK BIT_ULL(31)
265 #define PFERR_GUEST_FINAL_MASK BIT_ULL(32)
266 #define PFERR_GUEST_PAGE_MASK BIT_ULL(33)
267 #define PFERR_GUEST_ENC_MASK BIT_ULL(34)
268 #define PFERR_GUEST_SIZEM_MASK BIT_ULL(35)
269 #define PFERR_GUEST_VMPL_MASK BIT_ULL(36)
270
271 /*
272 * IMPLICIT_ACCESS is a KVM-defined flag used to correctly perform SMAP checks
273 * when emulating instructions that triggers implicit access.
274 */
275 #define PFERR_IMPLICIT_ACCESS BIT_ULL(48)
276 /*
277 * PRIVATE_ACCESS is a KVM-defined flag us to indicate that a fault occurred
278 * when the guest was accessing private memory.
279 */
280 #define PFERR_PRIVATE_ACCESS BIT_ULL(49)
281 #define PFERR_SYNTHETIC_MASK (PFERR_IMPLICIT_ACCESS | PFERR_PRIVATE_ACCESS)
282
283 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
284 PFERR_WRITE_MASK | \
285 PFERR_PRESENT_MASK)
286
287 /* apic attention bits */
288 #define KVM_APIC_CHECK_VAPIC 0
289 /*
290 * The following bit is set with PV-EOI, unset on EOI.
291 * We detect PV-EOI changes by guest by comparing
292 * this bit with PV-EOI in guest memory.
293 * See the implementation in apic_update_pv_eoi.
294 */
295 #define KVM_APIC_PV_EOI_PENDING 1
296
297 struct kvm_kernel_irq_routing_entry;
298
299 /*
300 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
301 * also includes TDP pages) to determine whether or not a page can be used in
302 * the given MMU context. This is a subset of the overall kvm_cpu_role to
303 * minimize the size of kvm_memory_slot.arch.gfn_write_track, i.e. allows
304 * allocating 2 bytes per gfn instead of 4 bytes per gfn.
305 *
306 * Upper-level shadow pages having gptes are tracked for write-protection via
307 * gfn_write_track. As above, gfn_write_track is a 16 bit counter, so KVM must
308 * not create more than 2^16-1 upper-level shadow pages at a single gfn,
309 * otherwise gfn_write_track will overflow and explosions will ensue.
310 *
311 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
312 * cannot be reused. The ability to reuse a SP is tracked by its role, which
313 * incorporates various mode bits and properties of the SP. Roughly speaking,
314 * the number of unique SPs that can theoretically be created is 2^n, where n
315 * is the number of bits that are used to compute the role.
316 *
317 * But, even though there are 19 bits in the mask below, not all combinations
318 * of modes and flags are possible:
319 *
320 * - invalid shadow pages are not accounted, so the bits are effectively 18
321 *
322 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
323 * execonly and ad_disabled are only used for nested EPT which has
324 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
325 *
326 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
327 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
328 * paging has exactly one upper level, making level completely redundant
329 * when has_4_byte_gpte=1.
330 *
331 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
332 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
333 *
334 * Therefore, the maximum number of possible upper-level shadow pages for a
335 * single gfn is a bit less than 2^13.
336 */
337 union kvm_mmu_page_role {
338 u32 word;
339 struct {
340 unsigned level:4;
341 unsigned has_4_byte_gpte:1;
342 unsigned quadrant:2;
343 unsigned direct:1;
344 unsigned access:3;
345 unsigned invalid:1;
346 unsigned efer_nx:1;
347 unsigned cr0_wp:1;
348 unsigned smep_andnot_wp:1;
349 unsigned smap_andnot_wp:1;
350 unsigned ad_disabled:1;
351 unsigned guest_mode:1;
352 unsigned passthrough:1;
353 unsigned :5;
354
355 /*
356 * This is left at the top of the word so that
357 * kvm_memslots_for_spte_role can extract it with a
358 * simple shift. While there is room, give it a whole
359 * byte so it is also faster to load it from memory.
360 */
361 unsigned smm:8;
362 };
363 };
364
365 /*
366 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
367 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
368 * including on nested transitions, if nothing in the full role changes then
369 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
370 * don't treat all-zero structure as valid data.
371 *
372 * The properties that are tracked in the extended role but not the page role
373 * are for things that either (a) do not affect the validity of the shadow page
374 * or (b) are indirectly reflected in the shadow page's role. For example,
375 * CR4.PKE only affects permission checks for software walks of the guest page
376 * tables (because KVM doesn't support Protection Keys with shadow paging), and
377 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
378 *
379 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
380 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
381 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
382 * SMAP aware regardless of CR0.WP.
383 */
384 union kvm_mmu_extended_role {
385 u32 word;
386 struct {
387 unsigned int valid:1;
388 unsigned int execonly:1;
389 unsigned int cr4_pse:1;
390 unsigned int cr4_pke:1;
391 unsigned int cr4_smap:1;
392 unsigned int cr4_smep:1;
393 unsigned int cr4_la57:1;
394 unsigned int efer_lma:1;
395 };
396 };
397
398 union kvm_cpu_role {
399 u64 as_u64;
400 struct {
401 union kvm_mmu_page_role base;
402 union kvm_mmu_extended_role ext;
403 };
404 };
405
406 struct kvm_rmap_head {
407 unsigned long val;
408 };
409
410 struct kvm_pio_request {
411 unsigned long linear_rip;
412 unsigned long count;
413 int in;
414 int port;
415 int size;
416 };
417
418 #define PT64_ROOT_MAX_LEVEL 5
419
420 struct rsvd_bits_validate {
421 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
422 u64 bad_mt_xwr;
423 };
424
425 struct kvm_mmu_root_info {
426 gpa_t pgd;
427 hpa_t hpa;
428 };
429
430 #define KVM_MMU_ROOT_INFO_INVALID \
431 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
432
433 #define KVM_MMU_NUM_PREV_ROOTS 3
434
435 #define KVM_MMU_ROOT_CURRENT BIT(0)
436 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
437 #define KVM_MMU_ROOTS_ALL (BIT(1 + KVM_MMU_NUM_PREV_ROOTS) - 1)
438
439 #define KVM_HAVE_MMU_RWLOCK
440
441 struct kvm_mmu_page;
442 struct kvm_page_fault;
443
444 /*
445 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
446 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
447 * current mmu mode.
448 */
449 struct kvm_mmu {
450 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
451 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
452 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
453 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
454 struct x86_exception *fault);
455 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
456 gpa_t gva_or_gpa, u64 access,
457 struct x86_exception *exception);
458 int (*sync_spte)(struct kvm_vcpu *vcpu,
459 struct kvm_mmu_page *sp, int i);
460 struct kvm_mmu_root_info root;
461 union kvm_cpu_role cpu_role;
462 union kvm_mmu_page_role root_role;
463
464 /*
465 * The pkru_mask indicates if protection key checks are needed. It
466 * consists of 16 domains indexed by page fault error code bits [4:1],
467 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
468 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
469 */
470 u32 pkru_mask;
471
472 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
473
474 /*
475 * Bitmap; bit set = permission fault
476 * Byte index: page fault error code [4:1]
477 * Bit index: pte permissions in ACC_* format
478 */
479 u8 permissions[16];
480
481 u64 *pae_root;
482 u64 *pml4_root;
483 u64 *pml5_root;
484
485 /*
486 * check zero bits on shadow page table entries, these
487 * bits include not only hardware reserved bits but also
488 * the bits spte never used.
489 */
490 struct rsvd_bits_validate shadow_zero_check;
491
492 struct rsvd_bits_validate guest_rsvd_check;
493
494 u64 pdptrs[4]; /* pae */
495 };
496
497 enum pmc_type {
498 KVM_PMC_GP = 0,
499 KVM_PMC_FIXED,
500 };
501
502 struct kvm_pmc {
503 enum pmc_type type;
504 u8 idx;
505 bool is_paused;
506 bool intr;
507 /*
508 * Base value of the PMC counter, relative to the *consumed* count in
509 * the associated perf_event. This value includes counter updates from
510 * the perf_event and emulated_count since the last time the counter
511 * was reprogrammed, but it is *not* the current value as seen by the
512 * guest or userspace.
513 *
514 * The count is relative to the associated perf_event so that KVM
515 * doesn't need to reprogram the perf_event every time the guest writes
516 * to the counter.
517 */
518 u64 counter;
519 /*
520 * PMC events triggered by KVM emulation that haven't been fully
521 * processed, i.e. haven't undergone overflow detection.
522 */
523 u64 emulated_counter;
524 u64 eventsel;
525 struct perf_event *perf_event;
526 struct kvm_vcpu *vcpu;
527 /*
528 * only for creating or reusing perf_event,
529 * eventsel value for general purpose counters,
530 * ctrl value for fixed counters.
531 */
532 u64 current_config;
533 };
534
535 /* More counters may conflict with other existing Architectural MSRs */
536 #define KVM_INTEL_PMC_MAX_GENERIC 8
537 #define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
538 #define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
539 #define KVM_PMC_MAX_FIXED 3
540 #define MSR_ARCH_PERFMON_FIXED_CTR_MAX (MSR_ARCH_PERFMON_FIXED_CTR0 + KVM_PMC_MAX_FIXED - 1)
541 #define KVM_AMD_PMC_MAX_GENERIC 6
542
543 struct kvm_pmu {
544 u8 version;
545 unsigned nr_arch_gp_counters;
546 unsigned nr_arch_fixed_counters;
547 unsigned available_event_types;
548 u64 fixed_ctr_ctrl;
549 u64 fixed_ctr_ctrl_mask;
550 u64 global_ctrl;
551 u64 global_status;
552 u64 counter_bitmask[2];
553 u64 global_ctrl_mask;
554 u64 global_status_mask;
555 u64 reserved_bits;
556 u64 raw_event_mask;
557 struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
558 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
559
560 /*
561 * Overlay the bitmap with a 64-bit atomic so that all bits can be
562 * set in a single access, e.g. to reprogram all counters when the PMU
563 * filter changes.
564 */
565 union {
566 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
567 atomic64_t __reprogram_pmi;
568 };
569 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
570 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
571
572 u64 ds_area;
573 u64 pebs_enable;
574 u64 pebs_enable_mask;
575 u64 pebs_data_cfg;
576 u64 pebs_data_cfg_mask;
577
578 /*
579 * If a guest counter is cross-mapped to host counter with different
580 * index, its PEBS capability will be temporarily disabled.
581 *
582 * The user should make sure that this mask is updated
583 * after disabling interrupts and before perf_guest_get_msrs();
584 */
585 u64 host_cross_mapped_mask;
586
587 /*
588 * The gate to release perf_events not marked in
589 * pmc_in_use only once in a vcpu time slice.
590 */
591 bool need_cleanup;
592
593 /*
594 * The total number of programmed perf_events and it helps to avoid
595 * redundant check before cleanup if guest don't use vPMU at all.
596 */
597 u8 event_count;
598 };
599
600 struct kvm_pmu_ops;
601
602 enum {
603 KVM_DEBUGREG_BP_ENABLED = 1,
604 KVM_DEBUGREG_WONT_EXIT = 2,
605 };
606
607 struct kvm_mtrr_range {
608 u64 base;
609 u64 mask;
610 struct list_head node;
611 };
612
613 struct kvm_mtrr {
614 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
615 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
616 u64 deftype;
617
618 struct list_head head;
619 };
620
621 /* Hyper-V SynIC timer */
622 struct kvm_vcpu_hv_stimer {
623 struct hrtimer timer;
624 int index;
625 union hv_stimer_config config;
626 u64 count;
627 u64 exp_time;
628 struct hv_message msg;
629 bool msg_pending;
630 };
631
632 /* Hyper-V synthetic interrupt controller (SynIC)*/
633 struct kvm_vcpu_hv_synic {
634 u64 version;
635 u64 control;
636 u64 msg_page;
637 u64 evt_page;
638 atomic64_t sint[HV_SYNIC_SINT_COUNT];
639 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
640 DECLARE_BITMAP(auto_eoi_bitmap, 256);
641 DECLARE_BITMAP(vec_bitmap, 256);
642 bool active;
643 bool dont_zero_synic_pages;
644 };
645
646 /* The maximum number of entries on the TLB flush fifo. */
647 #define KVM_HV_TLB_FLUSH_FIFO_SIZE (16)
648 /*
649 * Note: the following 'magic' entry is made up by KVM to avoid putting
650 * anything besides GVA on the TLB flush fifo. It is theoretically possible
651 * to observe a request to flush 4095 PFNs starting from 0xfffffffffffff000
652 * which will look identical. KVM's action to 'flush everything' instead of
653 * flushing these particular addresses is, however, fully legitimate as
654 * flushing more than requested is always OK.
655 */
656 #define KVM_HV_TLB_FLUSHALL_ENTRY ((u64)-1)
657
658 enum hv_tlb_flush_fifos {
659 HV_L1_TLB_FLUSH_FIFO,
660 HV_L2_TLB_FLUSH_FIFO,
661 HV_NR_TLB_FLUSH_FIFOS,
662 };
663
664 struct kvm_vcpu_hv_tlb_flush_fifo {
665 spinlock_t write_lock;
666 DECLARE_KFIFO(entries, u64, KVM_HV_TLB_FLUSH_FIFO_SIZE);
667 };
668
669 /* Hyper-V per vcpu emulation context */
670 struct kvm_vcpu_hv {
671 struct kvm_vcpu *vcpu;
672 u32 vp_index;
673 u64 hv_vapic;
674 s64 runtime_offset;
675 struct kvm_vcpu_hv_synic synic;
676 struct kvm_hyperv_exit exit;
677 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
678 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
679 bool enforce_cpuid;
680 struct {
681 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
682 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
683 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
684 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
685 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
686 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
687 u32 nested_eax; /* HYPERV_CPUID_NESTED_FEATURES.EAX */
688 u32 nested_ebx; /* HYPERV_CPUID_NESTED_FEATURES.EBX */
689 } cpuid_cache;
690
691 struct kvm_vcpu_hv_tlb_flush_fifo tlb_flush_fifo[HV_NR_TLB_FLUSH_FIFOS];
692
693 /* Preallocated buffer for handling hypercalls passing sparse vCPU set */
694 u64 sparse_banks[HV_MAX_SPARSE_VCPU_BANKS];
695
696 struct hv_vp_assist_page vp_assist_page;
697
698 struct {
699 u64 pa_page_gpa;
700 u64 vm_id;
701 u32 vp_id;
702 } nested;
703 };
704
705 struct kvm_hypervisor_cpuid {
706 u32 base;
707 u32 limit;
708 };
709
710 #ifdef CONFIG_KVM_XEN
711 /* Xen HVM per vcpu emulation context */
712 struct kvm_vcpu_xen {
713 u64 hypercall_rip;
714 u32 current_runstate;
715 u8 upcall_vector;
716 struct gfn_to_pfn_cache vcpu_info_cache;
717 struct gfn_to_pfn_cache vcpu_time_info_cache;
718 struct gfn_to_pfn_cache runstate_cache;
719 struct gfn_to_pfn_cache runstate2_cache;
720 u64 last_steal;
721 u64 runstate_entry_time;
722 u64 runstate_times[4];
723 unsigned long evtchn_pending_sel;
724 u32 vcpu_id; /* The Xen / ACPI vCPU ID */
725 u32 timer_virq;
726 u64 timer_expires; /* In guest epoch */
727 atomic_t timer_pending;
728 struct hrtimer timer;
729 int poll_evtchn;
730 struct timer_list poll_timer;
731 struct kvm_hypervisor_cpuid cpuid;
732 };
733 #endif
734
735 struct kvm_queued_exception {
736 bool pending;
737 bool injected;
738 bool has_error_code;
739 u8 vector;
740 u32 error_code;
741 unsigned long payload;
742 bool has_payload;
743 };
744
745 struct kvm_vcpu_arch {
746 /*
747 * rip and regs accesses must go through
748 * kvm_{register,rip}_{read,write} functions.
749 */
750 unsigned long regs[NR_VCPU_REGS];
751 u32 regs_avail;
752 u32 regs_dirty;
753
754 unsigned long cr0;
755 unsigned long cr0_guest_owned_bits;
756 unsigned long cr2;
757 unsigned long cr3;
758 unsigned long cr4;
759 unsigned long cr4_guest_owned_bits;
760 unsigned long cr4_guest_rsvd_bits;
761 unsigned long cr8;
762 u32 host_pkru;
763 u32 pkru;
764 u32 hflags;
765 u64 efer;
766 u64 apic_base;
767 struct kvm_lapic *apic; /* kernel irqchip context */
768 bool load_eoi_exitmap_pending;
769 DECLARE_BITMAP(ioapic_handled_vectors, 256);
770 unsigned long apic_attention;
771 int32_t apic_arb_prio;
772 int mp_state;
773 u64 ia32_misc_enable_msr;
774 u64 smbase;
775 u64 smi_count;
776 bool at_instruction_boundary;
777 bool tpr_access_reporting;
778 bool xfd_no_write_intercept;
779 u64 ia32_xss;
780 u64 microcode_version;
781 u64 arch_capabilities;
782 u64 perf_capabilities;
783
784 /*
785 * Paging state of the vcpu
786 *
787 * If the vcpu runs in guest mode with two level paging this still saves
788 * the paging mode of the l1 guest. This context is always used to
789 * handle faults.
790 */
791 struct kvm_mmu *mmu;
792
793 /* Non-nested MMU for L1 */
794 struct kvm_mmu root_mmu;
795
796 /* L1 MMU when running nested */
797 struct kvm_mmu guest_mmu;
798
799 /*
800 * Paging state of an L2 guest (used for nested npt)
801 *
802 * This context will save all necessary information to walk page tables
803 * of an L2 guest. This context is only initialized for page table
804 * walking and not for faulting since we never handle l2 page faults on
805 * the host.
806 */
807 struct kvm_mmu nested_mmu;
808
809 /*
810 * Pointer to the mmu context currently used for
811 * gva_to_gpa translations.
812 */
813 struct kvm_mmu *walk_mmu;
814
815 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
816 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
817 struct kvm_mmu_memory_cache mmu_shadowed_info_cache;
818 struct kvm_mmu_memory_cache mmu_page_header_cache;
819
820 /*
821 * QEMU userspace and the guest each have their own FPU state.
822 * In vcpu_run, we switch between the user and guest FPU contexts.
823 * While running a VCPU, the VCPU thread will have the guest FPU
824 * context.
825 *
826 * Note that while the PKRU state lives inside the fpu registers,
827 * it is switched out separately at VMENTER and VMEXIT time. The
828 * "guest_fpstate" state here contains the guest FPU context, with the
829 * host PRKU bits.
830 */
831 struct fpu_guest guest_fpu;
832
833 u64 xcr0;
834 u64 guest_supported_xcr0;
835
836 struct kvm_pio_request pio;
837 void *pio_data;
838 void *sev_pio_data;
839 unsigned sev_pio_count;
840
841 u8 event_exit_inst_len;
842
843 bool exception_from_userspace;
844
845 /* Exceptions to be injected to the guest. */
846 struct kvm_queued_exception exception;
847 /* Exception VM-Exits to be synthesized to L1. */
848 struct kvm_queued_exception exception_vmexit;
849
850 struct kvm_queued_interrupt {
851 bool injected;
852 bool soft;
853 u8 nr;
854 } interrupt;
855
856 int halt_request; /* real mode on Intel only */
857
858 int cpuid_nent;
859 struct kvm_cpuid_entry2 *cpuid_entries;
860 struct kvm_hypervisor_cpuid kvm_cpuid;
861 bool is_amd_compatible;
862
863 /*
864 * FIXME: Drop this macro and use KVM_NR_GOVERNED_FEATURES directly
865 * when "struct kvm_vcpu_arch" is no longer defined in an
866 * arch/x86/include/asm header. The max is mostly arbitrary, i.e.
867 * can be increased as necessary.
868 */
869 #define KVM_MAX_NR_GOVERNED_FEATURES BITS_PER_LONG
870
871 /*
872 * Track whether or not the guest is allowed to use features that are
873 * governed by KVM, where "governed" means KVM needs to manage state
874 * and/or explicitly enable the feature in hardware. Typically, but
875 * not always, governed features can be used by the guest if and only
876 * if both KVM and userspace want to expose the feature to the guest.
877 */
878 struct {
879 DECLARE_BITMAP(enabled, KVM_MAX_NR_GOVERNED_FEATURES);
880 } governed_features;
881
882 u64 reserved_gpa_bits;
883 int maxphyaddr;
884
885 /* emulate context */
886
887 struct x86_emulate_ctxt *emulate_ctxt;
888 bool emulate_regs_need_sync_to_vcpu;
889 bool emulate_regs_need_sync_from_vcpu;
890 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
891
892 gpa_t time;
893 struct pvclock_vcpu_time_info hv_clock;
894 unsigned int hw_tsc_khz;
895 struct gfn_to_pfn_cache pv_time;
896 /* set guest stopped flag in pvclock flags field */
897 bool pvclock_set_guest_stopped_request;
898
899 struct {
900 u8 preempted;
901 u64 msr_val;
902 u64 last_steal;
903 struct gfn_to_hva_cache cache;
904 } st;
905
906 u64 l1_tsc_offset;
907 u64 tsc_offset; /* current tsc offset */
908 u64 last_guest_tsc;
909 u64 last_host_tsc;
910 u64 tsc_offset_adjustment;
911 u64 this_tsc_nsec;
912 u64 this_tsc_write;
913 u64 this_tsc_generation;
914 bool tsc_catchup;
915 bool tsc_always_catchup;
916 s8 virtual_tsc_shift;
917 u32 virtual_tsc_mult;
918 u32 virtual_tsc_khz;
919 s64 ia32_tsc_adjust_msr;
920 u64 msr_ia32_power_ctl;
921 u64 l1_tsc_scaling_ratio;
922 u64 tsc_scaling_ratio; /* current scaling ratio */
923
924 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
925 /* Number of NMIs pending injection, not including hardware vNMIs. */
926 unsigned int nmi_pending;
927 bool nmi_injected; /* Trying to inject an NMI this entry */
928 bool smi_pending; /* SMI queued after currently running handler */
929 u8 handling_intr_from_guest;
930
931 struct kvm_mtrr mtrr_state;
932 u64 pat;
933
934 unsigned switch_db_regs;
935 unsigned long db[KVM_NR_DB_REGS];
936 unsigned long dr6;
937 unsigned long dr7;
938 unsigned long eff_db[KVM_NR_DB_REGS];
939 unsigned long guest_debug_dr7;
940 u64 msr_platform_info;
941 u64 msr_misc_features_enables;
942
943 u64 mcg_cap;
944 u64 mcg_status;
945 u64 mcg_ctl;
946 u64 mcg_ext_ctl;
947 u64 *mce_banks;
948 u64 *mci_ctl2_banks;
949
950 /* Cache MMIO info */
951 u64 mmio_gva;
952 unsigned mmio_access;
953 gfn_t mmio_gfn;
954 u64 mmio_gen;
955
956 struct kvm_pmu pmu;
957
958 /* used for guest single stepping over the given code position */
959 unsigned long singlestep_rip;
960
961 #ifdef CONFIG_KVM_HYPERV
962 bool hyperv_enabled;
963 struct kvm_vcpu_hv *hyperv;
964 #endif
965 #ifdef CONFIG_KVM_XEN
966 struct kvm_vcpu_xen xen;
967 #endif
968 cpumask_var_t wbinvd_dirty_mask;
969
970 unsigned long last_retry_eip;
971 unsigned long last_retry_addr;
972
973 struct {
974 bool halted;
975 gfn_t gfns[ASYNC_PF_PER_VCPU];
976 struct gfn_to_hva_cache data;
977 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
978 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
979 u16 vec;
980 u32 id;
981 bool send_user_only;
982 u32 host_apf_flags;
983 bool delivery_as_pf_vmexit;
984 bool pageready_pending;
985 } apf;
986
987 /* OSVW MSRs (AMD only) */
988 struct {
989 u64 length;
990 u64 status;
991 } osvw;
992
993 struct {
994 u64 msr_val;
995 struct gfn_to_hva_cache data;
996 } pv_eoi;
997
998 u64 msr_kvm_poll_control;
999
1000 /* pv related host specific info */
1001 struct {
1002 bool pv_unhalted;
1003 } pv;
1004
1005 int pending_ioapic_eoi;
1006 int pending_external_vector;
1007
1008 /* be preempted when it's in kernel-mode(cpl=0) */
1009 bool preempted_in_kernel;
1010
1011 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
1012 bool l1tf_flush_l1d;
1013
1014 /* Host CPU on which VM-entry was most recently attempted */
1015 int last_vmentry_cpu;
1016
1017 /* AMD MSRC001_0015 Hardware Configuration */
1018 u64 msr_hwcr;
1019
1020 /* pv related cpuid info */
1021 struct {
1022 /*
1023 * value of the eax register in the KVM_CPUID_FEATURES CPUID
1024 * leaf.
1025 */
1026 u32 features;
1027
1028 /*
1029 * indicates whether pv emulation should be disabled if features
1030 * are not present in the guest's cpuid
1031 */
1032 bool enforce;
1033 } pv_cpuid;
1034
1035 /* Protected Guests */
1036 bool guest_state_protected;
1037
1038 /*
1039 * Set when PDPTS were loaded directly by the userspace without
1040 * reading the guest memory
1041 */
1042 bool pdptrs_from_userspace;
1043
1044 #if IS_ENABLED(CONFIG_HYPERV)
1045 hpa_t hv_root_tdp;
1046 #endif
1047 };
1048
1049 struct kvm_lpage_info {
1050 int disallow_lpage;
1051 };
1052
1053 struct kvm_arch_memory_slot {
1054 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
1055 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
1056 unsigned short *gfn_write_track;
1057 };
1058
1059 /*
1060 * Track the mode of the optimized logical map, as the rules for decoding the
1061 * destination vary per mode. Enabling the optimized logical map requires all
1062 * software-enabled local APIs to be in the same mode, each addressable APIC to
1063 * be mapped to only one MDA, and each MDA to map to at most one APIC.
1064 */
1065 enum kvm_apic_logical_mode {
1066 /* All local APICs are software disabled. */
1067 KVM_APIC_MODE_SW_DISABLED,
1068 /* All software enabled local APICs in xAPIC cluster addressing mode. */
1069 KVM_APIC_MODE_XAPIC_CLUSTER,
1070 /* All software enabled local APICs in xAPIC flat addressing mode. */
1071 KVM_APIC_MODE_XAPIC_FLAT,
1072 /* All software enabled local APICs in x2APIC mode. */
1073 KVM_APIC_MODE_X2APIC,
1074 /*
1075 * Optimized map disabled, e.g. not all local APICs in the same logical
1076 * mode, same logical ID assigned to multiple APICs, etc.
1077 */
1078 KVM_APIC_MODE_MAP_DISABLED,
1079 };
1080
1081 struct kvm_apic_map {
1082 struct rcu_head rcu;
1083 enum kvm_apic_logical_mode logical_mode;
1084 u32 max_apic_id;
1085 union {
1086 struct kvm_lapic *xapic_flat_map[8];
1087 struct kvm_lapic *xapic_cluster_map[16][4];
1088 };
1089 struct kvm_lapic *phys_map[];
1090 };
1091
1092 /* Hyper-V synthetic debugger (SynDbg)*/
1093 struct kvm_hv_syndbg {
1094 struct {
1095 u64 control;
1096 u64 status;
1097 u64 send_page;
1098 u64 recv_page;
1099 u64 pending_page;
1100 } control;
1101 u64 options;
1102 };
1103
1104 /* Current state of Hyper-V TSC page clocksource */
1105 enum hv_tsc_page_status {
1106 /* TSC page was not set up or disabled */
1107 HV_TSC_PAGE_UNSET = 0,
1108 /* TSC page MSR was written by the guest, update pending */
1109 HV_TSC_PAGE_GUEST_CHANGED,
1110 /* TSC page update was triggered from the host side */
1111 HV_TSC_PAGE_HOST_CHANGED,
1112 /* TSC page was properly set up and is currently active */
1113 HV_TSC_PAGE_SET,
1114 /* TSC page was set up with an inaccessible GPA */
1115 HV_TSC_PAGE_BROKEN,
1116 };
1117
1118 #ifdef CONFIG_KVM_HYPERV
1119 /* Hyper-V emulation context */
1120 struct kvm_hv {
1121 struct mutex hv_lock;
1122 u64 hv_guest_os_id;
1123 u64 hv_hypercall;
1124 u64 hv_tsc_page;
1125 enum hv_tsc_page_status hv_tsc_page_status;
1126
1127 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
1128 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
1129 u64 hv_crash_ctl;
1130
1131 struct ms_hyperv_tsc_page tsc_ref;
1132
1133 struct idr conn_to_evt;
1134
1135 u64 hv_reenlightenment_control;
1136 u64 hv_tsc_emulation_control;
1137 u64 hv_tsc_emulation_status;
1138 u64 hv_invtsc_control;
1139
1140 /* How many vCPUs have VP index != vCPU index */
1141 atomic_t num_mismatched_vp_indexes;
1142
1143 /*
1144 * How many SynICs use 'AutoEOI' feature
1145 * (protected by arch.apicv_update_lock)
1146 */
1147 unsigned int synic_auto_eoi_used;
1148
1149 struct kvm_hv_syndbg hv_syndbg;
1150
1151 bool xsaves_xsavec_checked;
1152 };
1153 #endif
1154
1155 struct msr_bitmap_range {
1156 u32 flags;
1157 u32 nmsrs;
1158 u32 base;
1159 unsigned long *bitmap;
1160 };
1161
1162 #ifdef CONFIG_KVM_XEN
1163 /* Xen emulation context */
1164 struct kvm_xen {
1165 struct mutex xen_lock;
1166 u32 xen_version;
1167 bool long_mode;
1168 bool runstate_update_flag;
1169 u8 upcall_vector;
1170 struct gfn_to_pfn_cache shinfo_cache;
1171 struct idr evtchn_ports;
1172 unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
1173 };
1174 #endif
1175
1176 enum kvm_irqchip_mode {
1177 KVM_IRQCHIP_NONE,
1178 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1179 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1180 };
1181
1182 struct kvm_x86_msr_filter {
1183 u8 count;
1184 bool default_allow:1;
1185 struct msr_bitmap_range ranges[16];
1186 };
1187
1188 struct kvm_x86_pmu_event_filter {
1189 __u32 action;
1190 __u32 nevents;
1191 __u32 fixed_counter_bitmap;
1192 __u32 flags;
1193 __u32 nr_includes;
1194 __u32 nr_excludes;
1195 __u64 *includes;
1196 __u64 *excludes;
1197 __u64 events[];
1198 };
1199
1200 enum kvm_apicv_inhibit {
1201
1202 /********************************************************************/
1203 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1204 /********************************************************************/
1205
1206 /*
1207 * APIC acceleration is disabled by a module parameter
1208 * and/or not supported in hardware.
1209 */
1210 APICV_INHIBIT_REASON_DISABLE,
1211
1212 /*
1213 * APIC acceleration is inhibited because AutoEOI feature is
1214 * being used by a HyperV guest.
1215 */
1216 APICV_INHIBIT_REASON_HYPERV,
1217
1218 /*
1219 * APIC acceleration is inhibited because the userspace didn't yet
1220 * enable the kernel/split irqchip.
1221 */
1222 APICV_INHIBIT_REASON_ABSENT,
1223
1224 /* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ
1225 * (out of band, debug measure of blocking all interrupts on this vCPU)
1226 * was enabled, to avoid AVIC/APICv bypassing it.
1227 */
1228 APICV_INHIBIT_REASON_BLOCKIRQ,
1229
1230 /*
1231 * APICv is disabled because not all vCPUs have a 1:1 mapping between
1232 * APIC ID and vCPU, _and_ KVM is not applying its x2APIC hotplug hack.
1233 */
1234 APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED,
1235
1236 /*
1237 * For simplicity, the APIC acceleration is inhibited
1238 * first time either APIC ID or APIC base are changed by the guest
1239 * from their reset values.
1240 */
1241 APICV_INHIBIT_REASON_APIC_ID_MODIFIED,
1242 APICV_INHIBIT_REASON_APIC_BASE_MODIFIED,
1243
1244 /******************************************************/
1245 /* INHIBITs that are relevant only to the AMD's AVIC. */
1246 /******************************************************/
1247
1248 /*
1249 * AVIC is inhibited on a vCPU because it runs a nested guest.
1250 *
1251 * This is needed because unlike APICv, the peers of this vCPU
1252 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1253 * a vCPU runs nested.
1254 */
1255 APICV_INHIBIT_REASON_NESTED,
1256
1257 /*
1258 * On SVM, the wait for the IRQ window is implemented with pending vIRQ,
1259 * which cannot be injected when the AVIC is enabled, thus AVIC
1260 * is inhibited while KVM waits for IRQ window.
1261 */
1262 APICV_INHIBIT_REASON_IRQWIN,
1263
1264 /*
1265 * PIT (i8254) 're-inject' mode, relies on EOI intercept,
1266 * which AVIC doesn't support for edge triggered interrupts.
1267 */
1268 APICV_INHIBIT_REASON_PIT_REINJ,
1269
1270 /*
1271 * AVIC is disabled because SEV doesn't support it.
1272 */
1273 APICV_INHIBIT_REASON_SEV,
1274
1275 /*
1276 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
1277 * mapping between logical ID and vCPU.
1278 */
1279 APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED,
1280 };
1281
1282 struct kvm_arch {
1283 unsigned long n_used_mmu_pages;
1284 unsigned long n_requested_mmu_pages;
1285 unsigned long n_max_mmu_pages;
1286 unsigned int indirect_shadow_pages;
1287 u8 mmu_valid_gen;
1288 u8 vm_type;
1289 bool has_private_mem;
1290 bool has_protected_state;
1291 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1292 struct list_head active_mmu_pages;
1293 struct list_head zapped_obsolete_pages;
1294 /*
1295 * A list of kvm_mmu_page structs that, if zapped, could possibly be
1296 * replaced by an NX huge page. A shadow page is on this list if its
1297 * existence disallows an NX huge page (nx_huge_page_disallowed is set)
1298 * and there are no other conditions that prevent a huge page, e.g.
1299 * the backing host page is huge, dirtly logging is not enabled for its
1300 * memslot, etc... Note, zapping shadow pages on this list doesn't
1301 * guarantee an NX huge page will be created in its stead, e.g. if the
1302 * guest attempts to execute from the region then KVM obviously can't
1303 * create an NX huge page (without hanging the guest).
1304 */
1305 struct list_head possible_nx_huge_pages;
1306 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1307 struct kvm_page_track_notifier_head track_notifier_head;
1308 #endif
1309 /*
1310 * Protects marking pages unsync during page faults, as TDP MMU page
1311 * faults only take mmu_lock for read. For simplicity, the unsync
1312 * pages lock is always taken when marking pages unsync regardless of
1313 * whether mmu_lock is held for read or write.
1314 */
1315 spinlock_t mmu_unsync_pages_lock;
1316
1317 u64 shadow_mmio_value;
1318
1319 struct iommu_domain *iommu_domain;
1320 bool iommu_noncoherent;
1321 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1322 atomic_t noncoherent_dma_count;
1323 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1324 atomic_t assigned_device_count;
1325 struct kvm_pic *vpic;
1326 struct kvm_ioapic *vioapic;
1327 struct kvm_pit *vpit;
1328 atomic_t vapics_in_nmi_mode;
1329 struct mutex apic_map_lock;
1330 struct kvm_apic_map __rcu *apic_map;
1331 atomic_t apic_map_dirty;
1332
1333 bool apic_access_memslot_enabled;
1334 bool apic_access_memslot_inhibited;
1335
1336 /* Protects apicv_inhibit_reasons */
1337 struct rw_semaphore apicv_update_lock;
1338 unsigned long apicv_inhibit_reasons;
1339
1340 gpa_t wall_clock;
1341
1342 bool mwait_in_guest;
1343 bool hlt_in_guest;
1344 bool pause_in_guest;
1345 bool cstate_in_guest;
1346
1347 unsigned long irq_sources_bitmap;
1348 s64 kvmclock_offset;
1349
1350 /*
1351 * This also protects nr_vcpus_matched_tsc which is read from a
1352 * preemption-disabled region, so it must be a raw spinlock.
1353 */
1354 raw_spinlock_t tsc_write_lock;
1355 u64 last_tsc_nsec;
1356 u64 last_tsc_write;
1357 u32 last_tsc_khz;
1358 u64 last_tsc_offset;
1359 u64 cur_tsc_nsec;
1360 u64 cur_tsc_write;
1361 u64 cur_tsc_offset;
1362 u64 cur_tsc_generation;
1363 int nr_vcpus_matched_tsc;
1364
1365 u32 default_tsc_khz;
1366 bool user_set_tsc;
1367
1368 seqcount_raw_spinlock_t pvclock_sc;
1369 bool use_master_clock;
1370 u64 master_kernel_ns;
1371 u64 master_cycle_now;
1372 struct delayed_work kvmclock_update_work;
1373 struct delayed_work kvmclock_sync_work;
1374
1375 struct kvm_xen_hvm_config xen_hvm_config;
1376
1377 /* reads protected by irq_srcu, writes by irq_lock */
1378 struct hlist_head mask_notifier_list;
1379
1380 #ifdef CONFIG_KVM_HYPERV
1381 struct kvm_hv hyperv;
1382 #endif
1383
1384 #ifdef CONFIG_KVM_XEN
1385 struct kvm_xen xen;
1386 #endif
1387
1388 bool backwards_tsc_observed;
1389 bool boot_vcpu_runs_old_kvmclock;
1390 u32 bsp_vcpu_id;
1391
1392 u64 disabled_quirks;
1393
1394 enum kvm_irqchip_mode irqchip_mode;
1395 u8 nr_reserved_ioapic_pins;
1396
1397 bool disabled_lapic_found;
1398
1399 bool x2apic_format;
1400 bool x2apic_broadcast_quirk_disabled;
1401
1402 bool guest_can_read_msr_platform_info;
1403 bool exception_payload_enabled;
1404
1405 bool triple_fault_event;
1406
1407 bool bus_lock_detection_enabled;
1408 bool enable_pmu;
1409
1410 u32 notify_window;
1411 u32 notify_vmexit_flags;
1412 /*
1413 * If exit_on_emulation_error is set, and the in-kernel instruction
1414 * emulator fails to emulate an instruction, allow userspace
1415 * the opportunity to look at it.
1416 */
1417 bool exit_on_emulation_error;
1418
1419 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1420 u32 user_space_msr_mask;
1421 struct kvm_x86_msr_filter __rcu *msr_filter;
1422
1423 u32 hypercall_exit_enabled;
1424
1425 /* Guest can access the SGX PROVISIONKEY. */
1426 bool sgx_provisioning_allowed;
1427
1428 struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter;
1429 struct task_struct *nx_huge_page_recovery_thread;
1430
1431 #ifdef CONFIG_X86_64
1432 /* The number of TDP MMU pages across all roots. */
1433 atomic64_t tdp_mmu_pages;
1434
1435 /*
1436 * List of struct kvm_mmu_pages being used as roots.
1437 * All struct kvm_mmu_pages in the list should have
1438 * tdp_mmu_page set.
1439 *
1440 * For reads, this list is protected by:
1441 * the MMU lock in read mode + RCU or
1442 * the MMU lock in write mode
1443 *
1444 * For writes, this list is protected by tdp_mmu_pages_lock; see
1445 * below for the details.
1446 *
1447 * Roots will remain in the list until their tdp_mmu_root_count
1448 * drops to zero, at which point the thread that decremented the
1449 * count to zero should removed the root from the list and clean
1450 * it up, freeing the root after an RCU grace period.
1451 */
1452 struct list_head tdp_mmu_roots;
1453
1454 /*
1455 * Protects accesses to the following fields when the MMU lock
1456 * is held in read mode:
1457 * - tdp_mmu_roots (above)
1458 * - the link field of kvm_mmu_page structs used by the TDP MMU
1459 * - possible_nx_huge_pages;
1460 * - the possible_nx_huge_page_link field of kvm_mmu_page structs used
1461 * by the TDP MMU
1462 * Because the lock is only taken within the MMU lock, strictly
1463 * speaking it is redundant to acquire this lock when the thread
1464 * holds the MMU lock in write mode. However it often simplifies
1465 * the code to do so.
1466 */
1467 spinlock_t tdp_mmu_pages_lock;
1468 #endif /* CONFIG_X86_64 */
1469
1470 /*
1471 * If set, at least one shadow root has been allocated. This flag
1472 * is used as one input when determining whether certain memslot
1473 * related allocations are necessary.
1474 */
1475 bool shadow_root_allocated;
1476
1477 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1478 /*
1479 * If set, the VM has (or had) an external write tracking user, and
1480 * thus all write tracking metadata has been allocated, even if KVM
1481 * itself isn't using write tracking.
1482 */
1483 bool external_write_tracking_enabled;
1484 #endif
1485
1486 #if IS_ENABLED(CONFIG_HYPERV)
1487 hpa_t hv_root_tdp;
1488 spinlock_t hv_root_tdp_lock;
1489 struct hv_partition_assist_pg *hv_pa_pg;
1490 #endif
1491 /*
1492 * VM-scope maximum vCPU ID. Used to determine the size of structures
1493 * that increase along with the maximum vCPU ID, in which case, using
1494 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste.
1495 */
1496 u32 max_vcpu_ids;
1497
1498 bool disable_nx_huge_pages;
1499
1500 /*
1501 * Memory caches used to allocate shadow pages when performing eager
1502 * page splitting. No need for a shadowed_info_cache since eager page
1503 * splitting only allocates direct shadow pages.
1504 *
1505 * Protected by kvm->slots_lock.
1506 */
1507 struct kvm_mmu_memory_cache split_shadow_page_cache;
1508 struct kvm_mmu_memory_cache split_page_header_cache;
1509
1510 /*
1511 * Memory cache used to allocate pte_list_desc structs while splitting
1512 * huge pages. In the worst case, to split one huge page, 512
1513 * pte_list_desc structs are needed to add each lower level leaf sptep
1514 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level
1515 * page table.
1516 *
1517 * Protected by kvm->slots_lock.
1518 */
1519 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
1520 struct kvm_mmu_memory_cache split_desc_cache;
1521 };
1522
1523 struct kvm_vm_stat {
1524 struct kvm_vm_stat_generic generic;
1525 u64 mmu_shadow_zapped;
1526 u64 mmu_pte_write;
1527 u64 mmu_pde_zapped;
1528 u64 mmu_flooded;
1529 u64 mmu_recycled;
1530 u64 mmu_cache_miss;
1531 u64 mmu_unsync;
1532 union {
1533 struct {
1534 atomic64_t pages_4k;
1535 atomic64_t pages_2m;
1536 atomic64_t pages_1g;
1537 };
1538 atomic64_t pages[KVM_NR_PAGE_SIZES];
1539 };
1540 u64 nx_lpage_splits;
1541 u64 max_mmu_page_hash_collisions;
1542 u64 max_mmu_rmap_size;
1543 };
1544
1545 struct kvm_vcpu_stat {
1546 struct kvm_vcpu_stat_generic generic;
1547 u64 pf_taken;
1548 u64 pf_fixed;
1549 u64 pf_emulate;
1550 u64 pf_spurious;
1551 u64 pf_fast;
1552 u64 pf_mmio_spte_created;
1553 u64 pf_guest;
1554 u64 tlb_flush;
1555 u64 invlpg;
1556
1557 u64 exits;
1558 u64 io_exits;
1559 u64 mmio_exits;
1560 u64 signal_exits;
1561 u64 irq_window_exits;
1562 u64 nmi_window_exits;
1563 u64 l1d_flush;
1564 u64 halt_exits;
1565 u64 request_irq_exits;
1566 u64 irq_exits;
1567 u64 host_state_reload;
1568 u64 fpu_reload;
1569 u64 insn_emulation;
1570 u64 insn_emulation_fail;
1571 u64 hypercalls;
1572 u64 irq_injections;
1573 u64 nmi_injections;
1574 u64 req_event;
1575 u64 nested_run;
1576 u64 directed_yield_attempted;
1577 u64 directed_yield_successful;
1578 u64 preemption_reported;
1579 u64 preemption_other;
1580 u64 guest_mode;
1581 u64 notify_window_exits;
1582 };
1583
1584 struct x86_instruction_info;
1585
1586 struct msr_data {
1587 bool host_initiated;
1588 u32 index;
1589 u64 data;
1590 };
1591
1592 struct kvm_lapic_irq {
1593 u32 vector;
1594 u16 delivery_mode;
1595 u16 dest_mode;
1596 bool level;
1597 u16 trig_mode;
1598 u32 shorthand;
1599 u32 dest_id;
1600 bool msi_redir_hint;
1601 };
1602
kvm_lapic_irq_dest_mode(bool dest_mode_logical)1603 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1604 {
1605 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1606 }
1607
1608 struct kvm_x86_ops {
1609 const char *name;
1610
1611 int (*check_processor_compatibility)(void);
1612
1613 int (*hardware_enable)(void);
1614 void (*hardware_disable)(void);
1615 void (*hardware_unsetup)(void);
1616 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1617 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1618
1619 unsigned int vm_size;
1620 int (*vm_init)(struct kvm *kvm);
1621 void (*vm_destroy)(struct kvm *kvm);
1622
1623 /* Create, but do not attach this VCPU */
1624 int (*vcpu_precreate)(struct kvm *kvm);
1625 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1626 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1627 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1628
1629 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1630 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1631 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1632
1633 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1634 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1635 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1636 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1637 void (*get_segment)(struct kvm_vcpu *vcpu,
1638 struct kvm_segment *var, int seg);
1639 int (*get_cpl)(struct kvm_vcpu *vcpu);
1640 void (*set_segment)(struct kvm_vcpu *vcpu,
1641 struct kvm_segment *var, int seg);
1642 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1643 bool (*is_valid_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1644 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1645 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1646 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1647 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1648 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1649 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1650 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1651 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1652 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1653 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1654 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1655 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1656 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1657 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1658 bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1659
1660 void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1661 void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1662 #if IS_ENABLED(CONFIG_HYPERV)
1663 int (*flush_remote_tlbs)(struct kvm *kvm);
1664 int (*flush_remote_tlbs_range)(struct kvm *kvm, gfn_t gfn,
1665 gfn_t nr_pages);
1666 #endif
1667
1668 /*
1669 * Flush any TLB entries associated with the given GVA.
1670 * Does not need to flush GPA->HPA mappings.
1671 * Can potentially get non-canonical addresses through INVLPGs, which
1672 * the implementation may choose to ignore if appropriate.
1673 */
1674 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1675
1676 /*
1677 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1678 * does not need to flush GPA->HPA mappings.
1679 */
1680 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1681
1682 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1683 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu,
1684 bool force_immediate_exit);
1685 int (*handle_exit)(struct kvm_vcpu *vcpu,
1686 enum exit_fastpath_completion exit_fastpath);
1687 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1688 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1689 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1690 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1691 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1692 unsigned char *hypercall_addr);
1693 void (*inject_irq)(struct kvm_vcpu *vcpu, bool reinjected);
1694 void (*inject_nmi)(struct kvm_vcpu *vcpu);
1695 void (*inject_exception)(struct kvm_vcpu *vcpu);
1696 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1697 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1698 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1699 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1700 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1701 /* Whether or not a virtual NMI is pending in hardware. */
1702 bool (*is_vnmi_pending)(struct kvm_vcpu *vcpu);
1703 /*
1704 * Attempt to pend a virtual NMI in hardware. Returns %true on success
1705 * to allow using static_call_ret0 as the fallback.
1706 */
1707 bool (*set_vnmi_pending)(struct kvm_vcpu *vcpu);
1708 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1709 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1710 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1711 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason);
1712 const unsigned long required_apicv_inhibits;
1713 bool allow_apicv_in_x2apic_without_x2apic_virtualization;
1714 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1715 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1716 void (*hwapic_isr_update)(int isr);
1717 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1718 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1719 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1720 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1721 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1722 int trig_mode, int vector);
1723 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1724 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1725 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1726 u8 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1727
1728 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1729 int root_level);
1730
1731 bool (*has_wbinvd_exit)(void);
1732
1733 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1734 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1735 void (*write_tsc_offset)(struct kvm_vcpu *vcpu);
1736 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu);
1737
1738 /*
1739 * Retrieve somewhat arbitrary exit information. Intended to
1740 * be used only from within tracepoints or error paths.
1741 */
1742 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1743 u64 *info1, u64 *info2,
1744 u32 *exit_int_info, u32 *exit_int_info_err_code);
1745
1746 int (*check_intercept)(struct kvm_vcpu *vcpu,
1747 struct x86_instruction_info *info,
1748 enum x86_intercept_stage stage,
1749 struct x86_exception *exception);
1750 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1751
1752 void (*sched_in)(struct kvm_vcpu *vcpu, int cpu);
1753
1754 /*
1755 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1756 * value indicates CPU dirty logging is unsupported or disabled.
1757 */
1758 int cpu_dirty_log_size;
1759 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1760
1761 const struct kvm_x86_nested_ops *nested_ops;
1762
1763 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1764 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1765
1766 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1767 uint32_t guest_irq, bool set);
1768 void (*pi_start_assignment)(struct kvm *kvm);
1769 void (*apicv_pre_state_restore)(struct kvm_vcpu *vcpu);
1770 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1771 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1772
1773 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1774 bool *expired);
1775 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1776
1777 void (*setup_mce)(struct kvm_vcpu *vcpu);
1778
1779 #ifdef CONFIG_KVM_SMM
1780 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1781 int (*enter_smm)(struct kvm_vcpu *vcpu, union kvm_smram *smram);
1782 int (*leave_smm)(struct kvm_vcpu *vcpu, const union kvm_smram *smram);
1783 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1784 #endif
1785
1786 int (*dev_get_attr)(u32 group, u64 attr, u64 *val);
1787 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1788 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1789 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1790 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1791 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1792 void (*guest_memory_reclaimed)(struct kvm *kvm);
1793
1794 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1795
1796 int (*check_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1797 void *insn, int insn_len);
1798
1799 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1800 int (*enable_l2_tlb_flush)(struct kvm_vcpu *vcpu);
1801
1802 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1803 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1804 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1805
1806 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1807
1808 /*
1809 * Returns vCPU specific APICv inhibit reasons
1810 */
1811 unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu);
1812
1813 gva_t (*get_untagged_addr)(struct kvm_vcpu *vcpu, gva_t gva, unsigned int flags);
1814 void *(*alloc_apic_backing_page)(struct kvm_vcpu *vcpu);
1815 };
1816
1817 struct kvm_x86_nested_ops {
1818 void (*leave_nested)(struct kvm_vcpu *vcpu);
1819 bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector,
1820 u32 error_code);
1821 int (*check_events)(struct kvm_vcpu *vcpu);
1822 bool (*has_events)(struct kvm_vcpu *vcpu);
1823 void (*triple_fault)(struct kvm_vcpu *vcpu);
1824 int (*get_state)(struct kvm_vcpu *vcpu,
1825 struct kvm_nested_state __user *user_kvm_nested_state,
1826 unsigned user_data_size);
1827 int (*set_state)(struct kvm_vcpu *vcpu,
1828 struct kvm_nested_state __user *user_kvm_nested_state,
1829 struct kvm_nested_state *kvm_state);
1830 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1831 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1832
1833 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1834 uint16_t *vmcs_version);
1835 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1836 void (*hv_inject_synthetic_vmexit_post_tlb_flush)(struct kvm_vcpu *vcpu);
1837 };
1838
1839 struct kvm_x86_init_ops {
1840 int (*hardware_setup)(void);
1841 unsigned int (*handle_intel_pt_intr)(void);
1842
1843 struct kvm_x86_ops *runtime_ops;
1844 struct kvm_pmu_ops *pmu_ops;
1845 };
1846
1847 struct kvm_arch_async_pf {
1848 u32 token;
1849 gfn_t gfn;
1850 unsigned long cr3;
1851 bool direct_map;
1852 u64 error_code;
1853 };
1854
1855 extern u32 __read_mostly kvm_nr_uret_msrs;
1856 extern u64 __read_mostly host_efer;
1857 extern bool __read_mostly allow_smaller_maxphyaddr;
1858 extern bool __read_mostly enable_apicv;
1859 extern struct kvm_x86_ops kvm_x86_ops;
1860
1861 #define KVM_X86_OP(func) \
1862 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1863 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1864 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1865 #include <asm/kvm-x86-ops.h>
1866
1867 int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops);
1868 void kvm_x86_vendor_exit(void);
1869
1870 #define __KVM_HAVE_ARCH_VM_ALLOC
kvm_arch_alloc_vm(void)1871 static inline struct kvm *kvm_arch_alloc_vm(void)
1872 {
1873 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1874 }
1875
1876 #define __KVM_HAVE_ARCH_VM_FREE
1877 void kvm_arch_free_vm(struct kvm *kvm);
1878
1879 #if IS_ENABLED(CONFIG_HYPERV)
1880 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS
kvm_arch_flush_remote_tlbs(struct kvm * kvm)1881 static inline int kvm_arch_flush_remote_tlbs(struct kvm *kvm)
1882 {
1883 if (kvm_x86_ops.flush_remote_tlbs &&
1884 !static_call(kvm_x86_flush_remote_tlbs)(kvm))
1885 return 0;
1886 else
1887 return -ENOTSUPP;
1888 }
1889
1890 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
kvm_arch_flush_remote_tlbs_range(struct kvm * kvm,gfn_t gfn,u64 nr_pages)1891 static inline int kvm_arch_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn,
1892 u64 nr_pages)
1893 {
1894 if (!kvm_x86_ops.flush_remote_tlbs_range)
1895 return -EOPNOTSUPP;
1896
1897 return static_call(kvm_x86_flush_remote_tlbs_range)(kvm, gfn, nr_pages);
1898 }
1899 #endif /* CONFIG_HYPERV */
1900
1901 enum kvm_intr_type {
1902 /* Values are arbitrary, but must be non-zero. */
1903 KVM_HANDLING_IRQ = 1,
1904 KVM_HANDLING_NMI,
1905 };
1906
1907 /* Enable perf NMI and timer modes to work, and minimise false positives. */
1908 #define kvm_arch_pmi_in_guest(vcpu) \
1909 ((vcpu) && (vcpu)->arch.handling_intr_from_guest && \
1910 (!!in_nmi() == ((vcpu)->arch.handling_intr_from_guest == KVM_HANDLING_NMI)))
1911
1912 void __init kvm_mmu_x86_module_init(void);
1913 int kvm_mmu_vendor_module_init(void);
1914 void kvm_mmu_vendor_module_exit(void);
1915
1916 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1917 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1918 void kvm_mmu_init_vm(struct kvm *kvm);
1919 void kvm_mmu_uninit_vm(struct kvm *kvm);
1920
1921 void kvm_mmu_init_memslot_memory_attributes(struct kvm *kvm,
1922 struct kvm_memory_slot *slot);
1923
1924 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1925 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1926 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1927 const struct kvm_memory_slot *memslot,
1928 int start_level);
1929 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1930 const struct kvm_memory_slot *memslot,
1931 int target_level);
1932 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1933 const struct kvm_memory_slot *memslot,
1934 u64 start, u64 end,
1935 int target_level);
1936 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1937 const struct kvm_memory_slot *memslot);
1938 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1939 const struct kvm_memory_slot *memslot);
1940 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1941 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1942
1943 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1944
1945 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1946 const void *val, int bytes);
1947
1948 struct kvm_irq_mask_notifier {
1949 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1950 int irq;
1951 struct hlist_node link;
1952 };
1953
1954 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1955 struct kvm_irq_mask_notifier *kimn);
1956 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1957 struct kvm_irq_mask_notifier *kimn);
1958 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1959 bool mask);
1960
1961 extern bool tdp_enabled;
1962
1963 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1964
1965 /*
1966 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1967 * userspace I/O) to indicate that the emulation context
1968 * should be reused as is, i.e. skip initialization of
1969 * emulation context, instruction fetch and decode.
1970 *
1971 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1972 * Indicates that only select instructions (tagged with
1973 * EmulateOnUD) should be emulated (to minimize the emulator
1974 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1975 *
1976 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1977 * decode the instruction length. For use *only* by
1978 * kvm_x86_ops.skip_emulated_instruction() implementations if
1979 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1980 *
1981 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1982 * retry native execution under certain conditions,
1983 * Can only be set in conjunction with EMULTYPE_PF.
1984 *
1985 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1986 * triggered by KVM's magic "force emulation" prefix,
1987 * which is opt in via module param (off by default).
1988 * Bypasses EmulateOnUD restriction despite emulating
1989 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1990 * Used to test the full emulator from userspace.
1991 *
1992 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1993 * backdoor emulation, which is opt in via module param.
1994 * VMware backdoor emulation handles select instructions
1995 * and reinjects the #GP for all other cases.
1996 *
1997 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1998 * case the CR2/GPA value pass on the stack is valid.
1999 *
2000 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
2001 * state and inject single-step #DBs after skipping
2002 * an instruction (after completing userspace I/O).
2003 *
2004 * EMULTYPE_WRITE_PF_TO_SP - Set when emulating an intercepted page fault that
2005 * is attempting to write a gfn that contains one or
2006 * more of the PTEs used to translate the write itself,
2007 * and the owning page table is being shadowed by KVM.
2008 * If emulation of the faulting instruction fails and
2009 * this flag is set, KVM will exit to userspace instead
2010 * of retrying emulation as KVM cannot make forward
2011 * progress.
2012 *
2013 * If emulation fails for a write to guest page tables,
2014 * KVM unprotects (zaps) the shadow page for the target
2015 * gfn and resumes the guest to retry the non-emulatable
2016 * instruction (on hardware). Unprotecting the gfn
2017 * doesn't allow forward progress for a self-changing
2018 * access because doing so also zaps the translation for
2019 * the gfn, i.e. retrying the instruction will hit a
2020 * !PRESENT fault, which results in a new shadow page
2021 * and sends KVM back to square one.
2022 */
2023 #define EMULTYPE_NO_DECODE (1 << 0)
2024 #define EMULTYPE_TRAP_UD (1 << 1)
2025 #define EMULTYPE_SKIP (1 << 2)
2026 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
2027 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
2028 #define EMULTYPE_VMWARE_GP (1 << 5)
2029 #define EMULTYPE_PF (1 << 6)
2030 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
2031 #define EMULTYPE_WRITE_PF_TO_SP (1 << 8)
2032
2033 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
2034 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
2035 void *insn, int insn_len);
2036 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
2037 u64 *data, u8 ndata);
2038 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
2039
2040 void kvm_enable_efer_bits(u64);
2041 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
2042 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
2043 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
2044 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
2045 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
2046 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
2047 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
2048 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
2049 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
2050 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
2051 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
2052
2053 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
2054 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
2055 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
2056 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
2057 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
2058 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
2059
2060 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
2061 void kvm_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
2062 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
2063 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
2064
2065 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
2066 int reason, bool has_error_code, u32 error_code);
2067
2068 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
2069 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
2070 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
2071 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
2072 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
2073 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2074 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
2075 unsigned long kvm_get_dr(struct kvm_vcpu *vcpu, int dr);
2076 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
2077 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
2078 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
2079
2080 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2081 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2082
2083 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
2084 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
2085 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
2086
2087 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2088 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2089 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
2090 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2091 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2092 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
2093 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
2094 struct x86_exception *fault);
2095 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
2096 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
2097
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)2098 static inline int __kvm_irq_line_state(unsigned long *irq_state,
2099 int irq_source_id, int level)
2100 {
2101 /* Logical OR for level trig interrupt */
2102 if (level)
2103 __set_bit(irq_source_id, irq_state);
2104 else
2105 __clear_bit(irq_source_id, irq_state);
2106
2107 return !!(*irq_state);
2108 }
2109
2110 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
2111 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
2112
2113 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
2114 int kvm_get_nr_pending_nmis(struct kvm_vcpu *vcpu);
2115
2116 void kvm_update_dr7(struct kvm_vcpu *vcpu);
2117
2118 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
2119 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
2120 ulong roots_to_free);
2121 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
2122 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
2123 struct x86_exception *exception);
2124 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
2125 struct x86_exception *exception);
2126 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
2127 struct x86_exception *exception);
2128
2129 bool kvm_apicv_activated(struct kvm *kvm);
2130 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu);
2131 void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
2132 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2133 enum kvm_apicv_inhibit reason, bool set);
2134 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2135 enum kvm_apicv_inhibit reason, bool set);
2136
kvm_set_apicv_inhibit(struct kvm * kvm,enum kvm_apicv_inhibit reason)2137 static inline void kvm_set_apicv_inhibit(struct kvm *kvm,
2138 enum kvm_apicv_inhibit reason)
2139 {
2140 kvm_set_or_clear_apicv_inhibit(kvm, reason, true);
2141 }
2142
kvm_clear_apicv_inhibit(struct kvm * kvm,enum kvm_apicv_inhibit reason)2143 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm,
2144 enum kvm_apicv_inhibit reason)
2145 {
2146 kvm_set_or_clear_apicv_inhibit(kvm, reason, false);
2147 }
2148
2149 unsigned long __kvm_emulate_hypercall(struct kvm_vcpu *vcpu, unsigned long nr,
2150 unsigned long a0, unsigned long a1,
2151 unsigned long a2, unsigned long a3,
2152 int op_64_bit, int cpl);
2153 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
2154
2155 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
2156 void *insn, int insn_len);
2157 void kvm_mmu_print_sptes(struct kvm_vcpu *vcpu, gpa_t gpa, const char *msg);
2158 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
2159 void kvm_mmu_invalidate_addr(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
2160 u64 addr, unsigned long roots);
2161 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
2162 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
2163
2164 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
2165 int tdp_max_root_level, int tdp_huge_page_level);
2166
2167
2168 #ifdef CONFIG_KVM_PRIVATE_MEM
2169 #define kvm_arch_has_private_mem(kvm) ((kvm)->arch.has_private_mem)
2170 #else
2171 #define kvm_arch_has_private_mem(kvm) false
2172 #endif
2173
kvm_read_ldt(void)2174 static inline u16 kvm_read_ldt(void)
2175 {
2176 u16 ldt;
2177 asm("sldt %0" : "=g"(ldt));
2178 return ldt;
2179 }
2180
kvm_load_ldt(u16 sel)2181 static inline void kvm_load_ldt(u16 sel)
2182 {
2183 asm("lldt %0" : : "rm"(sel));
2184 }
2185
2186 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)2187 static inline unsigned long read_msr(unsigned long msr)
2188 {
2189 u64 value;
2190
2191 rdmsrl(msr, value);
2192 return value;
2193 }
2194 #endif
2195
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)2196 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
2197 {
2198 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
2199 }
2200
2201 #define TSS_IOPB_BASE_OFFSET 0x66
2202 #define TSS_BASE_SIZE 0x68
2203 #define TSS_IOPB_SIZE (65536 / 8)
2204 #define TSS_REDIRECTION_SIZE (256 / 8)
2205 #define RMODE_TSS_SIZE \
2206 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
2207
2208 enum {
2209 TASK_SWITCH_CALL = 0,
2210 TASK_SWITCH_IRET = 1,
2211 TASK_SWITCH_JMP = 2,
2212 TASK_SWITCH_GATE = 3,
2213 };
2214
2215 #define HF_GUEST_MASK (1 << 0) /* VCPU is in guest-mode */
2216
2217 #ifdef CONFIG_KVM_SMM
2218 #define HF_SMM_MASK (1 << 1)
2219 #define HF_SMM_INSIDE_NMI_MASK (1 << 2)
2220
2221 # define KVM_MAX_NR_ADDRESS_SPACES 2
2222 /* SMM is currently unsupported for guests with private memory. */
2223 # define kvm_arch_nr_memslot_as_ids(kvm) (kvm_arch_has_private_mem(kvm) ? 1 : 2)
2224 # define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
2225 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
2226 #else
2227 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, 0)
2228 #endif
2229
2230 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
2231 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
2232 int kvm_cpu_has_extint(struct kvm_vcpu *v);
2233 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
2234 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
2235 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
2236
2237 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
2238 unsigned long ipi_bitmap_high, u32 min,
2239 unsigned long icr, int op_64_bit);
2240
2241 int kvm_add_user_return_msr(u32 msr);
2242 int kvm_find_user_return_msr(u32 msr);
2243 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
2244
kvm_is_supported_user_return_msr(u32 msr)2245 static inline bool kvm_is_supported_user_return_msr(u32 msr)
2246 {
2247 return kvm_find_user_return_msr(msr) >= 0;
2248 }
2249
2250 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
2251 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
2252 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
2253 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
2254
2255 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
2256 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
2257
2258 void kvm_make_scan_ioapic_request(struct kvm *kvm);
2259 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
2260 unsigned long *vcpu_bitmap);
2261
2262 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
2263 struct kvm_async_pf *work);
2264 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
2265 struct kvm_async_pf *work);
2266 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
2267 struct kvm_async_pf *work);
2268 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
2269 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
2270 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
2271
2272 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
2273 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
2274
2275 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
2276 u32 size);
2277 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
2278 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
2279
2280 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
2281 struct kvm_vcpu **dest_vcpu);
2282
2283 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
2284 struct kvm_lapic_irq *irq);
2285
kvm_irq_is_postable(struct kvm_lapic_irq * irq)2286 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
2287 {
2288 /* We can only post Fixed and LowPrio IRQs */
2289 return (irq->delivery_mode == APIC_DM_FIXED ||
2290 irq->delivery_mode == APIC_DM_LOWEST);
2291 }
2292
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)2293 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
2294 {
2295 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
2296 }
2297
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)2298 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
2299 {
2300 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
2301 }
2302
kvm_cpu_get_apicid(int mps_cpu)2303 static inline int kvm_cpu_get_apicid(int mps_cpu)
2304 {
2305 #ifdef CONFIG_X86_LOCAL_APIC
2306 return default_cpu_present_to_apicid(mps_cpu);
2307 #else
2308 WARN_ON_ONCE(1);
2309 return BAD_APICID;
2310 #endif
2311 }
2312
2313 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
2314
2315 #define KVM_CLOCK_VALID_FLAGS \
2316 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
2317
2318 #define KVM_X86_VALID_QUIRKS \
2319 (KVM_X86_QUIRK_LINT0_REENABLED | \
2320 KVM_X86_QUIRK_CD_NW_CLEARED | \
2321 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \
2322 KVM_X86_QUIRK_OUT_7E_INC_RIP | \
2323 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \
2324 KVM_X86_QUIRK_FIX_HYPERCALL_INSN | \
2325 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS)
2326
2327 /*
2328 * KVM previously used a u32 field in kvm_run to indicate the hypercall was
2329 * initiated from long mode. KVM now sets bit 0 to indicate long mode, but the
2330 * remaining 31 lower bits must be 0 to preserve ABI.
2331 */
2332 #define KVM_EXIT_HYPERCALL_MBZ GENMASK_ULL(31, 1)
2333
2334 #endif /* _ASM_X86_KVM_HOST_H */
2335