1 /*
2 * AES-NI support functions
3 *
4 * Copyright The Mbed TLS Contributors
5 * SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
6 *
7 * This file is provided under the Apache License 2.0, or the
8 * GNU General Public License v2.0 or later.
9 *
10 * **********
11 * Apache License 2.0:
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License"); you may
14 * not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
21 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *
25 * **********
26 *
27 * **********
28 * GNU General Public License v2.0 or later:
29 *
30 * This program is free software; you can redistribute it and/or modify
31 * it under the terms of the GNU General Public License as published by
32 * the Free Software Foundation; either version 2 of the License, or
33 * (at your option) any later version.
34 *
35 * This program is distributed in the hope that it will be useful,
36 * but WITHOUT ANY WARRANTY; without even the implied warranty of
37 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
38 * GNU General Public License for more details.
39 *
40 * You should have received a copy of the GNU General Public License along
41 * with this program; if not, write to the Free Software Foundation, Inc.,
42 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
43 *
44 * **********
45 */
46
47 /*
48 * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
49 * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
50 */
51
52 #if !defined(MBEDTLS_CONFIG_FILE)
53 #include "mbedtls/config.h"
54 #else
55 #include MBEDTLS_CONFIG_FILE
56 #endif
57
58 #if defined(MBEDTLS_AESNI_C)
59
60 #if defined(__has_feature)
61 #if __has_feature(memory_sanitizer)
62 #warning "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
63 #endif
64 #endif
65
66 #include "mbedtls/aesni.h"
67
68 #include <string.h>
69
70 #ifndef asm
71 #define asm __asm
72 #endif
73
74 #if defined(MBEDTLS_HAVE_X86_64)
75
76 /*
77 * AES-NI support detection routine
78 */
mbedtls_aesni_has_support(unsigned int what)79 int mbedtls_aesni_has_support( unsigned int what )
80 {
81 static int done = 0;
82 static unsigned int c = 0;
83
84 if( ! done )
85 {
86 asm( "movl $1, %%eax \n\t"
87 "cpuid \n\t"
88 : "=c" (c)
89 :
90 : "eax", "ebx", "edx" );
91 done = 1;
92 }
93
94 return( ( c & what ) != 0 );
95 }
96
97 /*
98 * Binutils needs to be at least 2.19 to support AES-NI instructions.
99 * Unfortunately, a lot of users have a lower version now (2014-04).
100 * Emit bytecode directly in order to support "old" version of gas.
101 *
102 * Opcodes from the Intel architecture reference manual, vol. 3.
103 * We always use registers, so we don't need prefixes for memory operands.
104 * Operand macros are in gas order (src, dst) as opposed to Intel order
105 * (dst, src) in order to blend better into the surrounding assembly code.
106 */
107 #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
108 #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
109 #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
110 #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
111 #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
112 #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
113 #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
114
115 #define xmm0_xmm0 "0xC0"
116 #define xmm0_xmm1 "0xC8"
117 #define xmm0_xmm2 "0xD0"
118 #define xmm0_xmm3 "0xD8"
119 #define xmm0_xmm4 "0xE0"
120 #define xmm1_xmm0 "0xC1"
121 #define xmm1_xmm2 "0xD1"
122
123 /*
124 * AES-NI AES-ECB block en(de)cryption
125 */
mbedtls_aesni_crypt_ecb(mbedtls_aes_context * ctx,int mode,const unsigned char input[16],unsigned char output[16])126 int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
127 int mode,
128 const unsigned char input[16],
129 unsigned char output[16] )
130 {
131 asm( "movdqu (%3), %%xmm0 \n\t" // load input
132 "movdqu (%1), %%xmm1 \n\t" // load round key 0
133 "pxor %%xmm1, %%xmm0 \n\t" // round 0
134 "add $16, %1 \n\t" // point to next round key
135 "subl $1, %0 \n\t" // normal rounds = nr - 1
136 "test %2, %2 \n\t" // mode?
137 "jz 2f \n\t" // 0 = decrypt
138
139 "1: \n\t" // encryption loop
140 "movdqu (%1), %%xmm1 \n\t" // load round key
141 AESENC xmm1_xmm0 "\n\t" // do round
142 "add $16, %1 \n\t" // point to next round key
143 "subl $1, %0 \n\t" // loop
144 "jnz 1b \n\t"
145 "movdqu (%1), %%xmm1 \n\t" // load round key
146 AESENCLAST xmm1_xmm0 "\n\t" // last round
147 "jmp 3f \n\t"
148
149 "2: \n\t" // decryption loop
150 "movdqu (%1), %%xmm1 \n\t"
151 AESDEC xmm1_xmm0 "\n\t" // do round
152 "add $16, %1 \n\t"
153 "subl $1, %0 \n\t"
154 "jnz 2b \n\t"
155 "movdqu (%1), %%xmm1 \n\t" // load round key
156 AESDECLAST xmm1_xmm0 "\n\t" // last round
157
158 "3: \n\t"
159 "movdqu %%xmm0, (%4) \n\t" // export output
160 :
161 : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
162 : "memory", "cc", "xmm0", "xmm1" );
163
164
165 return( 0 );
166 }
167
168 /*
169 * GCM multiplication: c = a times b in GF(2^128)
170 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
171 */
mbedtls_aesni_gcm_mult(unsigned char c[16],const unsigned char a[16],const unsigned char b[16])172 void mbedtls_aesni_gcm_mult( unsigned char c[16],
173 const unsigned char a[16],
174 const unsigned char b[16] )
175 {
176 unsigned char aa[16], bb[16], cc[16];
177 size_t i;
178
179 /* The inputs are in big-endian order, so byte-reverse them */
180 for( i = 0; i < 16; i++ )
181 {
182 aa[i] = a[15 - i];
183 bb[i] = b[15 - i];
184 }
185
186 asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
187 "movdqu (%1), %%xmm1 \n\t" // b1:b0
188
189 /*
190 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
191 * using [CLMUL-WP] algorithm 1 (p. 13).
192 */
193 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
194 "movdqa %%xmm1, %%xmm3 \n\t" // same
195 "movdqa %%xmm1, %%xmm4 \n\t" // same
196 PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
197 PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
198 PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
199 PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
200 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
201 "movdqa %%xmm4, %%xmm3 \n\t" // same
202 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
203 "pslldq $8, %%xmm3 \n\t" // e0+f0:0
204 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
205 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
206
207 /*
208 * Now shift the result one bit to the left,
209 * taking advantage of [CLMUL-WP] eq 27 (p. 20)
210 */
211 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
212 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
213 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
214 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
215 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
216 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
217 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
218 "pslldq $8, %%xmm3 \n\t" // r0>>63:0
219 "pslldq $8, %%xmm4 \n\t" // r2>>63:0
220 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
221 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
222 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
223 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
224
225 /*
226 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
227 * using [CLMUL-WP] algorithm 5 (p. 20).
228 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
229 */
230 /* Step 2 (1) */
231 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
232 "movdqa %%xmm1, %%xmm4 \n\t" // same
233 "movdqa %%xmm1, %%xmm5 \n\t" // same
234 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
235 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
236 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
237
238 /* Step 2 (2) */
239 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
240 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
241 "pslldq $8, %%xmm3 \n\t" // a+b+c:0
242 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
243
244 /* Steps 3 and 4 */
245 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
246 "movdqa %%xmm1,%%xmm4 \n\t" // same
247 "movdqa %%xmm1,%%xmm5 \n\t" // same
248 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
249 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
250 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
251 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
252 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
253 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
254 // bits carried from d. Now get those\t bits back in.
255 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
256 "movdqa %%xmm1,%%xmm4 \n\t" // same
257 "movdqa %%xmm1,%%xmm5 \n\t" // same
258 "psllq $63, %%xmm3 \n\t" // d<<63:stuff
259 "psllq $62, %%xmm4 \n\t" // d<<62:stuff
260 "psllq $57, %%xmm5 \n\t" // d<<57:stuff
261 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
262 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
263 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
264 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
265 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
266 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
267
268 "movdqu %%xmm0, (%2) \n\t" // done
269 :
270 : "r" (aa), "r" (bb), "r" (cc)
271 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
272
273 /* Now byte-reverse the outputs */
274 for( i = 0; i < 16; i++ )
275 c[i] = cc[15 - i];
276
277 return;
278 }
279
280 /*
281 * Compute decryption round keys from encryption round keys
282 */
mbedtls_aesni_inverse_key(unsigned char * invkey,const unsigned char * fwdkey,int nr)283 void mbedtls_aesni_inverse_key( unsigned char *invkey,
284 const unsigned char *fwdkey, int nr )
285 {
286 unsigned char *ik = invkey;
287 const unsigned char *fk = fwdkey + 16 * nr;
288
289 memcpy( ik, fk, 16 );
290
291 for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
292 asm( "movdqu (%0), %%xmm0 \n\t"
293 AESIMC xmm0_xmm0 "\n\t"
294 "movdqu %%xmm0, (%1) \n\t"
295 :
296 : "r" (fk), "r" (ik)
297 : "memory", "xmm0" );
298
299 memcpy( ik, fk, 16 );
300 }
301
302 /*
303 * Key expansion, 128-bit case
304 */
aesni_setkey_enc_128(unsigned char * rk,const unsigned char * key)305 static void aesni_setkey_enc_128( unsigned char *rk,
306 const unsigned char *key )
307 {
308 asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
309 "movdqu %%xmm0, (%0) \n\t" // as round key 0
310 "jmp 2f \n\t" // skip auxiliary routine
311
312 /*
313 * Finish generating the next round key.
314 *
315 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
316 * with X = rot( sub( r3 ) ) ^ RCON.
317 *
318 * On exit, xmm0 is r7:r6:r5:r4
319 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
320 * and those are written to the round key buffer.
321 */
322 "1: \n\t"
323 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
324 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
325 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
326 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
327 "pslldq $4, %%xmm0 \n\t" // etc
328 "pxor %%xmm0, %%xmm1 \n\t"
329 "pslldq $4, %%xmm0 \n\t"
330 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
331 "add $16, %0 \n\t" // point to next round key
332 "movdqu %%xmm0, (%0) \n\t" // write it
333 "ret \n\t"
334
335 /* Main "loop" */
336 "2: \n\t"
337 AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
338 AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
339 AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
340 AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
341 AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
342 AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
343 AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
344 AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
345 AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
346 AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
347 :
348 : "r" (rk), "r" (key)
349 : "memory", "cc", "0" );
350 }
351
352 /*
353 * Key expansion, 192-bit case
354 */
aesni_setkey_enc_192(unsigned char * rk,const unsigned char * key)355 static void aesni_setkey_enc_192( unsigned char *rk,
356 const unsigned char *key )
357 {
358 asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
359 "movdqu %%xmm0, (%0) \n\t"
360 "add $16, %0 \n\t"
361 "movq 16(%1), %%xmm1 \n\t"
362 "movq %%xmm1, (%0) \n\t"
363 "add $8, %0 \n\t"
364 "jmp 2f \n\t" // skip auxiliary routine
365
366 /*
367 * Finish generating the next 6 quarter-keys.
368 *
369 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
370 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
371 *
372 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
373 * and those are written to the round key buffer.
374 */
375 "1: \n\t"
376 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
377 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
378 "pslldq $4, %%xmm0 \n\t" // etc
379 "pxor %%xmm0, %%xmm2 \n\t"
380 "pslldq $4, %%xmm0 \n\t"
381 "pxor %%xmm0, %%xmm2 \n\t"
382 "pslldq $4, %%xmm0 \n\t"
383 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
384 "movdqu %%xmm0, (%0) \n\t"
385 "add $16, %0 \n\t"
386 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
387 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
388 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
389 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
390 "movq %%xmm1, (%0) \n\t"
391 "add $8, %0 \n\t"
392 "ret \n\t"
393
394 "2: \n\t"
395 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
396 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
397 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
398 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
399 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
400 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
401 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
402 AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
403
404 :
405 : "r" (rk), "r" (key)
406 : "memory", "cc", "0" );
407 }
408
409 /*
410 * Key expansion, 256-bit case
411 */
aesni_setkey_enc_256(unsigned char * rk,const unsigned char * key)412 static void aesni_setkey_enc_256( unsigned char *rk,
413 const unsigned char *key )
414 {
415 asm( "movdqu (%1), %%xmm0 \n\t"
416 "movdqu %%xmm0, (%0) \n\t"
417 "add $16, %0 \n\t"
418 "movdqu 16(%1), %%xmm1 \n\t"
419 "movdqu %%xmm1, (%0) \n\t"
420 "jmp 2f \n\t" // skip auxiliary routine
421
422 /*
423 * Finish generating the next two round keys.
424 *
425 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
426 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
427 *
428 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
429 * and those have been written to the output buffer.
430 */
431 "1: \n\t"
432 "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
433 "pxor %%xmm0, %%xmm2 \n\t"
434 "pslldq $4, %%xmm0 \n\t"
435 "pxor %%xmm0, %%xmm2 \n\t"
436 "pslldq $4, %%xmm0 \n\t"
437 "pxor %%xmm0, %%xmm2 \n\t"
438 "pslldq $4, %%xmm0 \n\t"
439 "pxor %%xmm2, %%xmm0 \n\t"
440 "add $16, %0 \n\t"
441 "movdqu %%xmm0, (%0) \n\t"
442
443 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
444 * and proceed to generate next round key from there */
445 AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
446 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
447 "pxor %%xmm1, %%xmm2 \n\t"
448 "pslldq $4, %%xmm1 \n\t"
449 "pxor %%xmm1, %%xmm2 \n\t"
450 "pslldq $4, %%xmm1 \n\t"
451 "pxor %%xmm1, %%xmm2 \n\t"
452 "pslldq $4, %%xmm1 \n\t"
453 "pxor %%xmm2, %%xmm1 \n\t"
454 "add $16, %0 \n\t"
455 "movdqu %%xmm1, (%0) \n\t"
456 "ret \n\t"
457
458 /*
459 * Main "loop" - Generating one more key than necessary,
460 * see definition of mbedtls_aes_context.buf
461 */
462 "2: \n\t"
463 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
464 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
465 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
466 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
467 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
468 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
469 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
470 :
471 : "r" (rk), "r" (key)
472 : "memory", "cc", "0" );
473 }
474
475 /*
476 * Key expansion, wrapper
477 */
mbedtls_aesni_setkey_enc(unsigned char * rk,const unsigned char * key,size_t bits)478 int mbedtls_aesni_setkey_enc( unsigned char *rk,
479 const unsigned char *key,
480 size_t bits )
481 {
482 switch( bits )
483 {
484 case 128: aesni_setkey_enc_128( rk, key ); break;
485 case 192: aesni_setkey_enc_192( rk, key ); break;
486 case 256: aesni_setkey_enc_256( rk, key ); break;
487 default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
488 }
489
490 return( 0 );
491 }
492
493 #endif /* MBEDTLS_HAVE_X86_64 */
494
495 #endif /* MBEDTLS_AESNI_C */
496