1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements a virtual register map. This maps virtual registers to 11 // physical registers and virtual registers to stack slots. It is created and 12 // updated by a register allocator and then used by a machine code rewriter that 13 // adds spill code and rewrites virtual into physical register references. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H 18 #define LLVM_CODEGEN_VIRTREGMAP_H 19 20 #include "llvm/CodeGen/MachineFunctionPass.h" 21 #include "llvm/CodeGen/LiveInterval.h" 22 #include "llvm/Target/TargetRegisterInfo.h" 23 #include "llvm/ADT/BitVector.h" 24 #include "llvm/ADT/DenseMap.h" 25 #include "llvm/ADT/IndexedMap.h" 26 #include "llvm/ADT/SmallPtrSet.h" 27 #include "llvm/ADT/SmallVector.h" 28 #include <map> 29 30 namespace llvm { 31 class LiveIntervals; 32 class MachineInstr; 33 class MachineFunction; 34 class MachineRegisterInfo; 35 class TargetInstrInfo; 36 class TargetRegisterInfo; 37 class raw_ostream; 38 39 class VirtRegMap : public MachineFunctionPass { 40 public: 41 enum { 42 NO_PHYS_REG = 0, 43 NO_STACK_SLOT = (1L << 30)-1, 44 MAX_STACK_SLOT = (1L << 18)-1 45 }; 46 47 enum ModRef { isRef = 1, isMod = 2, isModRef = 3 }; 48 typedef std::multimap<MachineInstr*, 49 std::pair<unsigned, ModRef> > MI2VirtMapTy; 50 51 private: 52 MachineRegisterInfo *MRI; 53 const TargetInstrInfo *TII; 54 const TargetRegisterInfo *TRI; 55 MachineFunction *MF; 56 57 DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs; 58 59 /// Virt2PhysMap - This is a virtual to physical register 60 /// mapping. Each virtual register is required to have an entry in 61 /// it; even spilled virtual registers (the register mapped to a 62 /// spilled register is the temporary used to load it from the 63 /// stack). 64 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap; 65 66 /// Virt2StackSlotMap - This is virtual register to stack slot 67 /// mapping. Each spilled virtual register has an entry in it 68 /// which corresponds to the stack slot this register is spilled 69 /// at. 70 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap; 71 72 /// Virt2ReMatIdMap - This is virtual register to rematerialization id 73 /// mapping. Each spilled virtual register that should be remat'd has an 74 /// entry in it which corresponds to the remat id. 75 IndexedMap<int, VirtReg2IndexFunctor> Virt2ReMatIdMap; 76 77 /// Virt2SplitMap - This is virtual register to splitted virtual register 78 /// mapping. 79 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap; 80 81 /// Virt2SplitKillMap - This is splitted virtual register to its last use 82 /// (kill) index mapping. 83 IndexedMap<SlotIndex> Virt2SplitKillMap; 84 85 /// ReMatMap - This is virtual register to re-materialized instruction 86 /// mapping. Each virtual register whose definition is going to be 87 /// re-materialized has an entry in it. 88 IndexedMap<MachineInstr*, VirtReg2IndexFunctor> ReMatMap; 89 90 /// MI2VirtMap - This is MachineInstr to virtual register 91 /// mapping. In the case of memory spill code being folded into 92 /// instructions, we need to know which virtual register was 93 /// read/written by this instruction. 94 MI2VirtMapTy MI2VirtMap; 95 96 /// SpillPt2VirtMap - This records the virtual registers which should 97 /// be spilled right after the MachineInstr due to live interval 98 /// splitting. 99 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > > 100 SpillPt2VirtMap; 101 102 /// RestorePt2VirtMap - This records the virtual registers which should 103 /// be restored right before the MachineInstr due to live interval 104 /// splitting. 105 std::map<MachineInstr*, std::vector<unsigned> > RestorePt2VirtMap; 106 107 /// EmergencySpillMap - This records the physical registers that should 108 /// be spilled / restored around the MachineInstr since the register 109 /// allocator has run out of registers. 110 std::map<MachineInstr*, std::vector<unsigned> > EmergencySpillMap; 111 112 /// EmergencySpillSlots - This records emergency spill slots used to 113 /// spill physical registers when the register allocator runs out of 114 /// registers. Ideally only one stack slot is used per function per 115 /// register class. 116 std::map<const TargetRegisterClass*, int> EmergencySpillSlots; 117 118 /// ReMatId - Instead of assigning a stack slot to a to be rematerialized 119 /// virtual register, an unique id is being assigned. This keeps track of 120 /// the highest id used so far. Note, this starts at (1<<18) to avoid 121 /// conflicts with stack slot numbers. 122 int ReMatId; 123 124 /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes. 125 int LowSpillSlot, HighSpillSlot; 126 127 /// SpillSlotToUsesMap - Records uses for each register spill slot. 128 SmallVector<SmallPtrSet<MachineInstr*, 4>, 8> SpillSlotToUsesMap; 129 130 /// ImplicitDefed - One bit for each virtual register. If set it indicates 131 /// the register is implicitly defined. 132 BitVector ImplicitDefed; 133 134 /// UnusedRegs - A list of physical registers that have not been used. 135 BitVector UnusedRegs; 136 137 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT 138 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT 139 140 public: 141 static char ID; VirtRegMap()142 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG), 143 Virt2StackSlotMap(NO_STACK_SLOT), 144 Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0), 145 Virt2SplitKillMap(SlotIndex()), ReMatMap(NULL), 146 ReMatId(MAX_STACK_SLOT+1), 147 LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) { } 148 virtual bool runOnMachineFunction(MachineFunction &MF); 149 getAnalysisUsage(AnalysisUsage & AU)150 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 151 AU.setPreservesAll(); 152 MachineFunctionPass::getAnalysisUsage(AU); 153 } 154 getMachineFunction()155 MachineFunction &getMachineFunction() const { 156 assert(MF && "getMachineFunction called before runOnMAchineFunction"); 157 return *MF; 158 } 159 160 void grow(); 161 162 /// @brief returns true if the specified virtual register is 163 /// mapped to a physical register hasPhys(unsigned virtReg)164 bool hasPhys(unsigned virtReg) const { 165 return getPhys(virtReg) != NO_PHYS_REG; 166 } 167 168 /// @brief returns the physical register mapped to the specified 169 /// virtual register getPhys(unsigned virtReg)170 unsigned getPhys(unsigned virtReg) const { 171 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 172 return Virt2PhysMap[virtReg]; 173 } 174 175 /// @brief creates a mapping for the specified virtual register to 176 /// the specified physical register assignVirt2Phys(unsigned virtReg,unsigned physReg)177 void assignVirt2Phys(unsigned virtReg, unsigned physReg) { 178 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && 179 TargetRegisterInfo::isPhysicalRegister(physReg)); 180 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG && 181 "attempt to assign physical register to already mapped " 182 "virtual register"); 183 Virt2PhysMap[virtReg] = physReg; 184 } 185 186 /// @brief clears the specified virtual register's, physical 187 /// register mapping clearVirt(unsigned virtReg)188 void clearVirt(unsigned virtReg) { 189 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 190 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG && 191 "attempt to clear a not assigned virtual register"); 192 Virt2PhysMap[virtReg] = NO_PHYS_REG; 193 } 194 195 /// @brief clears all virtual to physical register mappings clearAllVirt()196 void clearAllVirt() { 197 Virt2PhysMap.clear(); 198 grow(); 199 } 200 201 /// @brief returns the register allocation preference. 202 unsigned getRegAllocPref(unsigned virtReg); 203 204 /// @brief records virtReg is a split live interval from SReg. setIsSplitFromReg(unsigned virtReg,unsigned SReg)205 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { 206 Virt2SplitMap[virtReg] = SReg; 207 } 208 209 /// @brief returns the live interval virtReg is split from. getPreSplitReg(unsigned virtReg)210 unsigned getPreSplitReg(unsigned virtReg) { 211 return Virt2SplitMap[virtReg]; 212 } 213 214 /// @brief returns true if the specified virtual register is not 215 /// mapped to a stack slot or rematerialized. isAssignedReg(unsigned virtReg)216 bool isAssignedReg(unsigned virtReg) const { 217 if (getStackSlot(virtReg) == NO_STACK_SLOT && 218 getReMatId(virtReg) == NO_STACK_SLOT) 219 return true; 220 // Split register can be assigned a physical register as well as a 221 // stack slot or remat id. 222 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG); 223 } 224 225 /// @brief returns the stack slot mapped to the specified virtual 226 /// register getStackSlot(unsigned virtReg)227 int getStackSlot(unsigned virtReg) const { 228 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 229 return Virt2StackSlotMap[virtReg]; 230 } 231 232 /// @brief returns the rematerialization id mapped to the specified virtual 233 /// register getReMatId(unsigned virtReg)234 int getReMatId(unsigned virtReg) const { 235 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 236 return Virt2ReMatIdMap[virtReg]; 237 } 238 239 /// @brief create a mapping for the specifed virtual register to 240 /// the next available stack slot 241 int assignVirt2StackSlot(unsigned virtReg); 242 /// @brief create a mapping for the specified virtual register to 243 /// the specified stack slot 244 void assignVirt2StackSlot(unsigned virtReg, int frameIndex); 245 246 /// @brief assign an unique re-materialization id to the specified 247 /// virtual register. 248 int assignVirtReMatId(unsigned virtReg); 249 /// @brief assign an unique re-materialization id to the specified 250 /// virtual register. 251 void assignVirtReMatId(unsigned virtReg, int id); 252 253 /// @brief returns true if the specified virtual register is being 254 /// re-materialized. isReMaterialized(unsigned virtReg)255 bool isReMaterialized(unsigned virtReg) const { 256 return ReMatMap[virtReg] != NULL; 257 } 258 259 /// @brief returns the original machine instruction being re-issued 260 /// to re-materialize the specified virtual register. getReMaterializedMI(unsigned virtReg)261 MachineInstr *getReMaterializedMI(unsigned virtReg) const { 262 return ReMatMap[virtReg]; 263 } 264 265 /// @brief records the specified virtual register will be 266 /// re-materialized and the original instruction which will be re-issed 267 /// for this purpose. If parameter all is true, then all uses of the 268 /// registers are rematerialized and it's safe to delete the definition. setVirtIsReMaterialized(unsigned virtReg,MachineInstr * def)269 void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) { 270 ReMatMap[virtReg] = def; 271 } 272 273 /// @brief record the last use (kill) of a split virtual register. addKillPoint(unsigned virtReg,SlotIndex index)274 void addKillPoint(unsigned virtReg, SlotIndex index) { 275 Virt2SplitKillMap[virtReg] = index; 276 } 277 getKillPoint(unsigned virtReg)278 SlotIndex getKillPoint(unsigned virtReg) const { 279 return Virt2SplitKillMap[virtReg]; 280 } 281 282 /// @brief remove the last use (kill) of a split virtual register. removeKillPoint(unsigned virtReg)283 void removeKillPoint(unsigned virtReg) { 284 Virt2SplitKillMap[virtReg] = SlotIndex(); 285 } 286 287 /// @brief returns true if the specified MachineInstr is a spill point. isSpillPt(MachineInstr * Pt)288 bool isSpillPt(MachineInstr *Pt) const { 289 return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end(); 290 } 291 292 /// @brief returns the virtual registers that should be spilled due to 293 /// splitting right after the specified MachineInstr. getSpillPtSpills(MachineInstr * Pt)294 std::vector<std::pair<unsigned,bool> > &getSpillPtSpills(MachineInstr *Pt) { 295 return SpillPt2VirtMap[Pt]; 296 } 297 298 /// @brief records the specified MachineInstr as a spill point for virtReg. addSpillPoint(unsigned virtReg,bool isKill,MachineInstr * Pt)299 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) { 300 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >::iterator 301 I = SpillPt2VirtMap.find(Pt); 302 if (I != SpillPt2VirtMap.end()) 303 I->second.push_back(std::make_pair(virtReg, isKill)); 304 else { 305 std::vector<std::pair<unsigned,bool> > Virts; 306 Virts.push_back(std::make_pair(virtReg, isKill)); 307 SpillPt2VirtMap.insert(std::make_pair(Pt, Virts)); 308 } 309 } 310 311 /// @brief - transfer spill point information from one instruction to 312 /// another. transferSpillPts(MachineInstr * Old,MachineInstr * New)313 void transferSpillPts(MachineInstr *Old, MachineInstr *New) { 314 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >::iterator 315 I = SpillPt2VirtMap.find(Old); 316 if (I == SpillPt2VirtMap.end()) 317 return; 318 while (!I->second.empty()) { 319 unsigned virtReg = I->second.back().first; 320 bool isKill = I->second.back().second; 321 I->second.pop_back(); 322 addSpillPoint(virtReg, isKill, New); 323 } 324 SpillPt2VirtMap.erase(I); 325 } 326 327 /// @brief returns true if the specified MachineInstr is a restore point. isRestorePt(MachineInstr * Pt)328 bool isRestorePt(MachineInstr *Pt) const { 329 return RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end(); 330 } 331 332 /// @brief returns the virtual registers that should be restoreed due to 333 /// splitting right after the specified MachineInstr. getRestorePtRestores(MachineInstr * Pt)334 std::vector<unsigned> &getRestorePtRestores(MachineInstr *Pt) { 335 return RestorePt2VirtMap[Pt]; 336 } 337 338 /// @brief records the specified MachineInstr as a restore point for virtReg. addRestorePoint(unsigned virtReg,MachineInstr * Pt)339 void addRestorePoint(unsigned virtReg, MachineInstr *Pt) { 340 std::map<MachineInstr*, std::vector<unsigned> >::iterator I = 341 RestorePt2VirtMap.find(Pt); 342 if (I != RestorePt2VirtMap.end()) 343 I->second.push_back(virtReg); 344 else { 345 std::vector<unsigned> Virts; 346 Virts.push_back(virtReg); 347 RestorePt2VirtMap.insert(std::make_pair(Pt, Virts)); 348 } 349 } 350 351 /// @brief - transfer restore point information from one instruction to 352 /// another. transferRestorePts(MachineInstr * Old,MachineInstr * New)353 void transferRestorePts(MachineInstr *Old, MachineInstr *New) { 354 std::map<MachineInstr*, std::vector<unsigned> >::iterator I = 355 RestorePt2VirtMap.find(Old); 356 if (I == RestorePt2VirtMap.end()) 357 return; 358 while (!I->second.empty()) { 359 unsigned virtReg = I->second.back(); 360 I->second.pop_back(); 361 addRestorePoint(virtReg, New); 362 } 363 RestorePt2VirtMap.erase(I); 364 } 365 366 /// @brief records that the specified physical register must be spilled 367 /// around the specified machine instr. addEmergencySpill(unsigned PhysReg,MachineInstr * MI)368 void addEmergencySpill(unsigned PhysReg, MachineInstr *MI) { 369 if (EmergencySpillMap.find(MI) != EmergencySpillMap.end()) 370 EmergencySpillMap[MI].push_back(PhysReg); 371 else { 372 std::vector<unsigned> PhysRegs; 373 PhysRegs.push_back(PhysReg); 374 EmergencySpillMap.insert(std::make_pair(MI, PhysRegs)); 375 } 376 } 377 378 /// @brief returns true if one or more physical registers must be spilled 379 /// around the specified instruction. hasEmergencySpills(MachineInstr * MI)380 bool hasEmergencySpills(MachineInstr *MI) const { 381 return EmergencySpillMap.find(MI) != EmergencySpillMap.end(); 382 } 383 384 /// @brief returns the physical registers to be spilled and restored around 385 /// the instruction. getEmergencySpills(MachineInstr * MI)386 std::vector<unsigned> &getEmergencySpills(MachineInstr *MI) { 387 return EmergencySpillMap[MI]; 388 } 389 390 /// @brief - transfer emergency spill information from one instruction to 391 /// another. transferEmergencySpills(MachineInstr * Old,MachineInstr * New)392 void transferEmergencySpills(MachineInstr *Old, MachineInstr *New) { 393 std::map<MachineInstr*,std::vector<unsigned> >::iterator I = 394 EmergencySpillMap.find(Old); 395 if (I == EmergencySpillMap.end()) 396 return; 397 while (!I->second.empty()) { 398 unsigned virtReg = I->second.back(); 399 I->second.pop_back(); 400 addEmergencySpill(virtReg, New); 401 } 402 EmergencySpillMap.erase(I); 403 } 404 405 /// @brief return or get a emergency spill slot for the register class. 406 int getEmergencySpillSlot(const TargetRegisterClass *RC); 407 408 /// @brief Return lowest spill slot index. getLowSpillSlot()409 int getLowSpillSlot() const { 410 return LowSpillSlot; 411 } 412 413 /// @brief Return highest spill slot index. getHighSpillSlot()414 int getHighSpillSlot() const { 415 return HighSpillSlot; 416 } 417 418 /// @brief Records a spill slot use. 419 void addSpillSlotUse(int FrameIndex, MachineInstr *MI); 420 421 /// @brief Returns true if spill slot has been used. isSpillSlotUsed(int FrameIndex)422 bool isSpillSlotUsed(int FrameIndex) const { 423 assert(FrameIndex >= 0 && "Spill slot index should not be negative!"); 424 return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty(); 425 } 426 427 /// @brief Mark the specified register as being implicitly defined. setIsImplicitlyDefined(unsigned VirtReg)428 void setIsImplicitlyDefined(unsigned VirtReg) { 429 ImplicitDefed.set(VirtReg-TargetRegisterInfo::FirstVirtualRegister); 430 } 431 432 /// @brief Returns true if the virtual register is implicitly defined. isImplicitlyDefined(unsigned VirtReg)433 bool isImplicitlyDefined(unsigned VirtReg) const { 434 return ImplicitDefed[VirtReg-TargetRegisterInfo::FirstVirtualRegister]; 435 } 436 437 /// @brief Updates information about the specified virtual register's value 438 /// folded into newMI machine instruction. 439 void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI, 440 ModRef MRInfo); 441 442 /// @brief Updates information about the specified virtual register's value 443 /// folded into the specified machine instruction. 444 void virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo); 445 446 /// @brief returns the virtual registers' values folded in memory 447 /// operands of this instruction 448 std::pair<MI2VirtMapTy::const_iterator, MI2VirtMapTy::const_iterator> getFoldedVirts(MachineInstr * MI)449 getFoldedVirts(MachineInstr* MI) const { 450 return MI2VirtMap.equal_range(MI); 451 } 452 453 /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the 454 /// the folded instruction map and spill point map. 455 void RemoveMachineInstrFromMaps(MachineInstr *MI); 456 457 /// FindUnusedRegisters - Gather a list of allocatable registers that 458 /// have not been allocated to any virtual register. 459 bool FindUnusedRegisters(LiveIntervals* LIs); 460 461 /// HasUnusedRegisters - Return true if there are any allocatable registers 462 /// that have not been allocated to any virtual register. HasUnusedRegisters()463 bool HasUnusedRegisters() const { 464 return !UnusedRegs.none(); 465 } 466 467 /// setRegisterUsed - Remember the physical register is now used. setRegisterUsed(unsigned Reg)468 void setRegisterUsed(unsigned Reg) { 469 UnusedRegs.reset(Reg); 470 } 471 472 /// isRegisterUnused - Return true if the physical register has not been 473 /// used. isRegisterUnused(unsigned Reg)474 bool isRegisterUnused(unsigned Reg) const { 475 return UnusedRegs[Reg]; 476 } 477 478 /// getFirstUnusedRegister - Return the first physical register that has not 479 /// been used. getFirstUnusedRegister(const TargetRegisterClass * RC)480 unsigned getFirstUnusedRegister(const TargetRegisterClass *RC) { 481 int Reg = UnusedRegs.find_first(); 482 while (Reg != -1) { 483 if (allocatableRCRegs[RC][Reg]) 484 return (unsigned)Reg; 485 Reg = UnusedRegs.find_next(Reg); 486 } 487 return 0; 488 } 489 490 void print(raw_ostream &OS, const Module* M = 0) const; 491 void dump() const; 492 }; 493 494 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) { 495 VRM.print(OS); 496 return OS; 497 } 498 } // End llvm namespace 499 500 #endif 501