1 /* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. 2 * Use of this source code is governed by a BSD-style license that can be 3 * found in the LICENSE file. 4 */ 5 6 /* Host communication command constants for Chrome EC */ 7 8 #ifndef __CROS_EC_COMMANDS_H 9 #define __CROS_EC_COMMANDS_H 10 11 /* 12 * Protocol overview 13 * 14 * request: CMD [ P0 P1 P2 ... Pn S ] 15 * response: ERR [ P0 P1 P2 ... Pn S ] 16 * 17 * where the bytes are defined as follow : 18 * - CMD is the command code. (defined by EC_CMD_ constants) 19 * - ERR is the error code. (defined by EC_RES_ constants) 20 * - Px is the optional payload. 21 * it is not sent if the error code is not success. 22 * (defined by ec_params_ and ec_response_ structures) 23 * - S is the checksum which is the sum of all payload bytes. 24 * 25 * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD 26 * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM. 27 * On I2C, all bytes are sent serially in the same message. 28 */ 29 30 /* Current version of this protocol */ 31 #define EC_PROTO_VERSION 0x00000002 32 33 /* Command version mask */ 34 #define EC_VER_MASK(version) (1UL << (version)) 35 36 /* I/O addresses for ACPI commands */ 37 #define EC_LPC_ADDR_ACPI_DATA 0x62 38 #define EC_LPC_ADDR_ACPI_CMD 0x66 39 40 /* I/O addresses for host command */ 41 #define EC_LPC_ADDR_HOST_DATA 0x200 42 #define EC_LPC_ADDR_HOST_CMD 0x204 43 44 /* I/O addresses for host command args and params */ 45 #define EC_LPC_ADDR_HOST_ARGS 0x800 46 #define EC_LPC_ADDR_HOST_PARAM 0x804 47 #define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */ 48 49 /* EC command register bit functions */ 50 #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ 51 #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ 52 #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */ 53 #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */ 54 #define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */ 55 #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ 56 #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ 57 58 #define EC_LPC_ADDR_MEMMAP 0x900 59 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 60 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 61 62 /* The offset address of each type of data in mapped memory. */ 63 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */ 64 #define EC_MEMMAP_FAN 0x10 /* Fan speeds */ 65 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */ 66 #define EC_MEMMAP_ID 0x20 /* 'E' 'C' */ 67 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 68 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 69 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 70 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 71 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 72 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */ 73 #define EC_MEMMAP_SWITCHES 0x30 74 #define EC_MEMMAP_HOST_EVENTS 0x34 75 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 76 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 77 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 78 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */ 79 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 80 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 81 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 82 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 83 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 84 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 85 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 86 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 87 88 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 89 #define EC_TEMP_SENSOR_ENTRIES 16 90 /* 91 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 92 * 93 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 94 */ 95 #define EC_TEMP_SENSOR_B_ENTRIES 8 96 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 97 #define EC_TEMP_SENSOR_ERROR 0xfe 98 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 99 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 100 /* 101 * The offset of temperature value stored in mapped memory. This allows 102 * reporting a temperature range of 200K to 454K = -73C to 181C. 103 */ 104 #define EC_TEMP_SENSOR_OFFSET 200 105 106 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 107 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 108 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 109 110 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 111 #define EC_BATT_FLAG_AC_PRESENT 0x01 112 #define EC_BATT_FLAG_BATT_PRESENT 0x02 113 #define EC_BATT_FLAG_DISCHARGING 0x04 114 #define EC_BATT_FLAG_CHARGING 0x08 115 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 116 117 /* Switch flags at EC_MEMMAP_SWITCHES */ 118 #define EC_SWITCH_LID_OPEN 0x01 119 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 120 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 121 /* Was recovery requested via keyboard; now unused. */ 122 #define EC_SWITCH_IGNORE1 0x08 123 /* Recovery requested via dedicated signal (from servo board) */ 124 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 125 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 126 #define EC_SWITCH_IGNORE0 0x20 127 128 /* Host command interface flags */ 129 /* Host command interface supports LPC args (LPC interface only) */ 130 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 131 132 /* Wireless switch flags */ 133 #define EC_WIRELESS_SWITCH_WLAN 0x01 134 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 135 136 /* 137 * This header file is used in coreboot both in C and ACPI code. The ACPI code 138 * is pre-processed to handle constants but the ASL compiler is unable to 139 * handle actual C code so keep it separate. 140 */ 141 #ifndef __ACPI__ 142 143 /* 144 * Define __packed if someone hasn't beat us to it. Linux kernel style 145 * checking prefers __packed over __attribute__((packed)). 146 */ 147 #ifndef __packed 148 #define __packed __attribute__((packed)) 149 #endif 150 151 /* LPC command status byte masks */ 152 /* EC has written a byte in the data register and host hasn't read it yet */ 153 #define EC_LPC_STATUS_TO_HOST 0x01 154 /* Host has written a command/data byte and the EC hasn't read it yet */ 155 #define EC_LPC_STATUS_FROM_HOST 0x02 156 /* EC is processing a command */ 157 #define EC_LPC_STATUS_PROCESSING 0x04 158 /* Last write to EC was a command, not data */ 159 #define EC_LPC_STATUS_LAST_CMD 0x08 160 /* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */ 161 #define EC_LPC_STATUS_BURST_MODE 0x10 162 /* SCI event is pending (requesting SCI query) */ 163 #define EC_LPC_STATUS_SCI_PENDING 0x20 164 /* SMI event is pending (requesting SMI query) */ 165 #define EC_LPC_STATUS_SMI_PENDING 0x40 166 /* (reserved) */ 167 #define EC_LPC_STATUS_RESERVED 0x80 168 169 /* 170 * EC is busy. This covers both the EC processing a command, and the host has 171 * written a new command but the EC hasn't picked it up yet. 172 */ 173 #define EC_LPC_STATUS_BUSY_MASK \ 174 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 175 176 /* Host command response codes */ 177 enum ec_status { 178 EC_RES_SUCCESS = 0, 179 EC_RES_INVALID_COMMAND = 1, 180 EC_RES_ERROR = 2, 181 EC_RES_INVALID_PARAM = 3, 182 EC_RES_ACCESS_DENIED = 4, 183 EC_RES_INVALID_RESPONSE = 5, 184 EC_RES_INVALID_VERSION = 6, 185 EC_RES_INVALID_CHECKSUM = 7, 186 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 187 EC_RES_UNAVAILABLE = 9, /* No response available */ 188 EC_RES_TIMEOUT = 10, /* We got a timeout */ 189 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 190 }; 191 192 /* 193 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 194 * EC command uses code 0 to mean "no event pending". We explicitly specify 195 * each value in the enum listing so they won't change if we delete/insert an 196 * item or rearrange the list (it needs to be stable across platforms, not 197 * just within a single compiled instance). 198 */ 199 enum host_event_code { 200 EC_HOST_EVENT_LID_CLOSED = 1, 201 EC_HOST_EVENT_LID_OPEN = 2, 202 EC_HOST_EVENT_POWER_BUTTON = 3, 203 EC_HOST_EVENT_AC_CONNECTED = 4, 204 EC_HOST_EVENT_AC_DISCONNECTED = 5, 205 EC_HOST_EVENT_BATTERY_LOW = 6, 206 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 207 EC_HOST_EVENT_BATTERY = 8, 208 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 209 EC_HOST_EVENT_THERMAL_OVERLOAD = 10, 210 EC_HOST_EVENT_THERMAL = 11, 211 EC_HOST_EVENT_USB_CHARGER = 12, 212 EC_HOST_EVENT_KEY_PRESSED = 13, 213 /* 214 * EC has finished initializing the host interface. The host can check 215 * for this event following sending a EC_CMD_REBOOT_EC command to 216 * determine when the EC is ready to accept subsequent commands. 217 */ 218 EC_HOST_EVENT_INTERFACE_READY = 14, 219 /* Keyboard recovery combo has been pressed */ 220 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 221 222 /* Shutdown due to thermal overload */ 223 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 224 /* Shutdown due to battery level too low */ 225 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 226 227 /* 228 * The high bit of the event mask is not used as a host event code. If 229 * it reads back as set, then the entire event mask should be 230 * considered invalid by the host. This can happen when reading the 231 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 232 * not initialized on the EC, or improperly configured on the host. 233 */ 234 EC_HOST_EVENT_INVALID = 32 235 }; 236 /* Host event mask */ 237 #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1)) 238 239 /* Arguments at EC_LPC_ADDR_HOST_ARGS */ 240 struct ec_lpc_host_args { 241 uint8_t flags; 242 uint8_t command_version; 243 uint8_t data_size; 244 /* 245 * Checksum; sum of command + flags + command_version + data_size + 246 * all params/response data bytes. 247 */ 248 uint8_t checksum; 249 } __packed; 250 251 /* Flags for ec_lpc_host_args.flags */ 252 /* 253 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 254 * params. 255 * 256 * If EC gets a command and this flag is not set, this is an old-style command. 257 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 258 * unknown length. EC must respond with an old-style response (that is, 259 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 260 */ 261 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 262 /* 263 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 264 * 265 * If EC responds to a command and this flag is not set, this is an old-style 266 * response. Command version is 0 and response data from EC is at 267 * EC_LPC_ADDR_OLD_PARAM with unknown length. 268 */ 269 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 270 271 /* 272 * Notes on commands: 273 * 274 * Each command is an 8-byte command value. Commands which take params or 275 * return response data specify structs for that data. If no struct is 276 * specified, the command does not input or output data, respectively. 277 * Parameter/response length is implicit in the structs. Some underlying 278 * communication protocols (I2C, SPI) may add length or checksum headers, but 279 * those are implementation-dependent and not defined here. 280 */ 281 282 /*****************************************************************************/ 283 /* General / test commands */ 284 285 /* 286 * Get protocol version, used to deal with non-backward compatible protocol 287 * changes. 288 */ 289 #define EC_CMD_PROTO_VERSION 0x00 290 291 struct ec_response_proto_version { 292 uint32_t version; 293 } __packed; 294 295 /* 296 * Hello. This is a simple command to test the EC is responsive to 297 * commands. 298 */ 299 #define EC_CMD_HELLO 0x01 300 301 struct ec_params_hello { 302 uint32_t in_data; /* Pass anything here */ 303 } __packed; 304 305 struct ec_response_hello { 306 uint32_t out_data; /* Output will be in_data + 0x01020304 */ 307 } __packed; 308 309 /* Get version number */ 310 #define EC_CMD_GET_VERSION 0x02 311 312 enum ec_current_image { 313 EC_IMAGE_UNKNOWN = 0, 314 EC_IMAGE_RO, 315 EC_IMAGE_RW 316 }; 317 318 struct ec_response_get_version { 319 /* Null-terminated version strings for RO, RW */ 320 char version_string_ro[32]; 321 char version_string_rw[32]; 322 char reserved[32]; /* Was previously RW-B string */ 323 uint32_t current_image; /* One of ec_current_image */ 324 } __packed; 325 326 /* Read test */ 327 #define EC_CMD_READ_TEST 0x03 328 329 struct ec_params_read_test { 330 uint32_t offset; /* Starting value for read buffer */ 331 uint32_t size; /* Size to read in bytes */ 332 } __packed; 333 334 struct ec_response_read_test { 335 uint32_t data[32]; 336 } __packed; 337 338 /* 339 * Get build information 340 * 341 * Response is null-terminated string. 342 */ 343 #define EC_CMD_GET_BUILD_INFO 0x04 344 345 /* Get chip info */ 346 #define EC_CMD_GET_CHIP_INFO 0x05 347 348 struct ec_response_get_chip_info { 349 /* Null-terminated strings */ 350 char vendor[32]; 351 char name[32]; 352 char revision[32]; /* Mask version */ 353 } __packed; 354 355 /* Get board HW version */ 356 #define EC_CMD_GET_BOARD_VERSION 0x06 357 358 struct ec_response_board_version { 359 uint16_t board_version; /* A monotonously incrementing number. */ 360 } __packed; 361 362 /* 363 * Read memory-mapped data. 364 * 365 * This is an alternate interface to memory-mapped data for bus protocols 366 * which don't support direct-mapped memory - I2C, SPI, etc. 367 * 368 * Response is params.size bytes of data. 369 */ 370 #define EC_CMD_READ_MEMMAP 0x07 371 372 struct ec_params_read_memmap { 373 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */ 374 uint8_t size; /* Size to read in bytes */ 375 } __packed; 376 377 /* Read versions supported for a command */ 378 #define EC_CMD_GET_CMD_VERSIONS 0x08 379 380 struct ec_params_get_cmd_versions { 381 uint8_t cmd; /* Command to check */ 382 } __packed; 383 384 struct ec_response_get_cmd_versions { 385 /* 386 * Mask of supported versions; use EC_VER_MASK() to compare with a 387 * desired version. 388 */ 389 uint32_t version_mask; 390 } __packed; 391 392 /* 393 * Check EC communications status (busy). This is needed on i2c/spi but not 394 * on lpc since it has its own out-of-band busy indicator. 395 * 396 * lpc must read the status from the command register. Attempting this on 397 * lpc will overwrite the args/parameter space and corrupt its data. 398 */ 399 #define EC_CMD_GET_COMMS_STATUS 0x09 400 401 /* Avoid using ec_status which is for return values */ 402 enum ec_comms_status { 403 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ 404 }; 405 406 struct ec_response_get_comms_status { 407 uint32_t flags; /* Mask of enum ec_comms_status */ 408 } __packed; 409 410 411 /*****************************************************************************/ 412 /* Flash commands */ 413 414 /* Get flash info */ 415 #define EC_CMD_FLASH_INFO 0x10 416 417 struct ec_response_flash_info { 418 /* Usable flash size, in bytes */ 419 uint32_t flash_size; 420 /* 421 * Write block size. Write offset and size must be a multiple 422 * of this. 423 */ 424 uint32_t write_block_size; 425 /* 426 * Erase block size. Erase offset and size must be a multiple 427 * of this. 428 */ 429 uint32_t erase_block_size; 430 /* 431 * Protection block size. Protection offset and size must be a 432 * multiple of this. 433 */ 434 uint32_t protect_block_size; 435 } __packed; 436 437 /* 438 * Read flash 439 * 440 * Response is params.size bytes of data. 441 */ 442 #define EC_CMD_FLASH_READ 0x11 443 444 struct ec_params_flash_read { 445 uint32_t offset; /* Byte offset to read */ 446 uint32_t size; /* Size to read in bytes */ 447 } __packed; 448 449 /* Write flash */ 450 #define EC_CMD_FLASH_WRITE 0x12 451 452 struct ec_params_flash_write { 453 uint32_t offset; /* Byte offset to write */ 454 uint32_t size; /* Size to write in bytes */ 455 /* 456 * Data to write. Could really use EC_PARAM_SIZE - 8, but tidiest to 457 * use a power of 2 so writes stay aligned. 458 */ 459 uint8_t data[64]; 460 } __packed; 461 462 /* Erase flash */ 463 #define EC_CMD_FLASH_ERASE 0x13 464 465 struct ec_params_flash_erase { 466 uint32_t offset; /* Byte offset to erase */ 467 uint32_t size; /* Size to erase in bytes */ 468 } __packed; 469 470 /* 471 * Get/set flash protection. 472 * 473 * If mask!=0, sets/clear the requested bits of flags. Depending on the 474 * firmware write protect GPIO, not all flags will take effect immediately; 475 * some flags require a subsequent hard reset to take effect. Check the 476 * returned flags bits to see what actually happened. 477 * 478 * If mask=0, simply returns the current flags state. 479 */ 480 #define EC_CMD_FLASH_PROTECT 0x15 481 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 482 483 /* Flags for flash protection */ 484 /* RO flash code protected when the EC boots */ 485 #define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0) 486 /* 487 * RO flash code protected now. If this bit is set, at-boot status cannot 488 * be changed. 489 */ 490 #define EC_FLASH_PROTECT_RO_NOW (1 << 1) 491 /* Entire flash code protected now, until reboot. */ 492 #define EC_FLASH_PROTECT_ALL_NOW (1 << 2) 493 /* Flash write protect GPIO is asserted now */ 494 #define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3) 495 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 496 #define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4) 497 /* 498 * Error - flash protection is in inconsistent state. At least one bank of 499 * flash which should be protected is not protected. Usually fixed by 500 * re-requesting the desired flags, or by a hard reset if that fails. 501 */ 502 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) 503 /* Entile flash code protected when the EC boots */ 504 #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) 505 506 struct ec_params_flash_protect { 507 uint32_t mask; /* Bits in flags to apply */ 508 uint32_t flags; /* New flags to apply */ 509 } __packed; 510 511 struct ec_response_flash_protect { 512 /* Current value of flash protect flags */ 513 uint32_t flags; 514 /* 515 * Flags which are valid on this platform. This allows the caller 516 * to distinguish between flags which aren't set vs. flags which can't 517 * be set on this platform. 518 */ 519 uint32_t valid_flags; 520 /* Flags which can be changed given the current protection state */ 521 uint32_t writable_flags; 522 } __packed; 523 524 /* 525 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 526 * write protect. These commands may be reused with version > 0. 527 */ 528 529 /* Get the region offset/size */ 530 #define EC_CMD_FLASH_REGION_INFO 0x16 531 #define EC_VER_FLASH_REGION_INFO 1 532 533 enum ec_flash_region { 534 /* Region which holds read-only EC image */ 535 EC_FLASH_REGION_RO, 536 /* Region which holds rewritable EC image */ 537 EC_FLASH_REGION_RW, 538 /* 539 * Region which should be write-protected in the factory (a superset of 540 * EC_FLASH_REGION_RO) 541 */ 542 EC_FLASH_REGION_WP_RO, 543 }; 544 545 struct ec_params_flash_region_info { 546 uint32_t region; /* enum ec_flash_region */ 547 } __packed; 548 549 struct ec_response_flash_region_info { 550 uint32_t offset; 551 uint32_t size; 552 } __packed; 553 554 /* Read/write VbNvContext */ 555 #define EC_CMD_VBNV_CONTEXT 0x17 556 #define EC_VER_VBNV_CONTEXT 1 557 #define EC_VBNV_BLOCK_SIZE 16 558 559 enum ec_vbnvcontext_op { 560 EC_VBNV_CONTEXT_OP_READ, 561 EC_VBNV_CONTEXT_OP_WRITE, 562 }; 563 564 struct ec_params_vbnvcontext { 565 uint32_t op; 566 uint8_t block[EC_VBNV_BLOCK_SIZE]; 567 } __packed; 568 569 struct ec_response_vbnvcontext { 570 uint8_t block[EC_VBNV_BLOCK_SIZE]; 571 } __packed; 572 573 /*****************************************************************************/ 574 /* PWM commands */ 575 576 /* Get fan target RPM */ 577 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20 578 579 struct ec_response_pwm_get_fan_rpm { 580 uint32_t rpm; 581 } __packed; 582 583 /* Set target fan RPM */ 584 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21 585 586 struct ec_params_pwm_set_fan_target_rpm { 587 uint32_t rpm; 588 } __packed; 589 590 /* Get keyboard backlight */ 591 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 592 593 struct ec_response_pwm_get_keyboard_backlight { 594 uint8_t percent; 595 uint8_t enabled; 596 } __packed; 597 598 /* Set keyboard backlight */ 599 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 600 601 struct ec_params_pwm_set_keyboard_backlight { 602 uint8_t percent; 603 } __packed; 604 605 /* Set target fan PWM duty cycle */ 606 #define EC_CMD_PWM_SET_FAN_DUTY 0x24 607 608 struct ec_params_pwm_set_fan_duty { 609 uint32_t percent; 610 } __packed; 611 612 /*****************************************************************************/ 613 /* 614 * Lightbar commands. This looks worse than it is. Since we only use one HOST 615 * command to say "talk to the lightbar", we put the "and tell it to do X" part 616 * into a subcommand. We'll make separate structs for subcommands with 617 * different input args, so that we know how much to expect. 618 */ 619 #define EC_CMD_LIGHTBAR_CMD 0x28 620 621 struct rgb_s { 622 uint8_t r, g, b; 623 }; 624 625 #define LB_BATTERY_LEVELS 4 626 /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a 627 * host command, but the alignment is the same regardless. Keep it that way. 628 */ 629 struct lightbar_params { 630 /* Timing */ 631 int google_ramp_up; 632 int google_ramp_down; 633 int s3s0_ramp_up; 634 int s0_tick_delay[2]; /* AC=0/1 */ 635 int s0a_tick_delay[2]; /* AC=0/1 */ 636 int s0s3_ramp_down; 637 int s3_sleep_for; 638 int s3_ramp_up; 639 int s3_ramp_down; 640 641 /* Oscillation */ 642 uint8_t new_s0; 643 uint8_t osc_min[2]; /* AC=0/1 */ 644 uint8_t osc_max[2]; /* AC=0/1 */ 645 uint8_t w_ofs[2]; /* AC=0/1 */ 646 647 /* Brightness limits based on the backlight and AC. */ 648 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 649 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 650 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 651 652 /* Battery level thresholds */ 653 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 654 655 /* Map [AC][battery_level] to color index */ 656 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 657 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 658 659 /* Color palette */ 660 struct rgb_s color[8]; /* 0-3 are Google colors */ 661 } __packed; 662 663 struct ec_params_lightbar { 664 uint8_t cmd; /* Command (see enum lightbar_command) */ 665 union { 666 struct { 667 /* no args */ 668 } dump, off, on, init, get_seq, get_params; 669 670 struct { 671 uint8_t num; 672 } brightness, seq, demo; 673 674 struct { 675 uint8_t ctrl, reg, value; 676 } reg; 677 678 struct { 679 uint8_t led, red, green, blue; 680 } rgb; 681 682 struct lightbar_params set_params; 683 }; 684 } __packed; 685 686 struct ec_response_lightbar { 687 union { 688 struct dump { 689 struct { 690 uint8_t reg; 691 uint8_t ic0; 692 uint8_t ic1; 693 } vals[23]; 694 } dump; 695 696 struct get_seq { 697 uint8_t num; 698 } get_seq; 699 700 struct lightbar_params get_params; 701 702 struct { 703 /* no return params */ 704 } off, on, init, brightness, seq, reg, rgb, demo, set_params; 705 }; 706 } __packed; 707 708 /* Lightbar commands */ 709 enum lightbar_command { 710 LIGHTBAR_CMD_DUMP = 0, 711 LIGHTBAR_CMD_OFF = 1, 712 LIGHTBAR_CMD_ON = 2, 713 LIGHTBAR_CMD_INIT = 3, 714 LIGHTBAR_CMD_BRIGHTNESS = 4, 715 LIGHTBAR_CMD_SEQ = 5, 716 LIGHTBAR_CMD_REG = 6, 717 LIGHTBAR_CMD_RGB = 7, 718 LIGHTBAR_CMD_GET_SEQ = 8, 719 LIGHTBAR_CMD_DEMO = 9, 720 LIGHTBAR_CMD_GET_PARAMS = 10, 721 LIGHTBAR_CMD_SET_PARAMS = 11, 722 LIGHTBAR_NUM_CMDS 723 }; 724 725 /*****************************************************************************/ 726 /* Verified boot commands */ 727 728 /* 729 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 730 * reused for other purposes with version > 0. 731 */ 732 733 /* Verified boot hash command */ 734 #define EC_CMD_VBOOT_HASH 0x2A 735 736 struct ec_params_vboot_hash { 737 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 738 uint8_t hash_type; /* enum ec_vboot_hash_type */ 739 uint8_t nonce_size; /* Nonce size; may be 0 */ 740 uint8_t reserved0; /* Reserved; set 0 */ 741 uint32_t offset; /* Offset in flash to hash */ 742 uint32_t size; /* Number of bytes to hash */ 743 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 744 } __packed; 745 746 struct ec_response_vboot_hash { 747 uint8_t status; /* enum ec_vboot_hash_status */ 748 uint8_t hash_type; /* enum ec_vboot_hash_type */ 749 uint8_t digest_size; /* Size of hash digest in bytes */ 750 uint8_t reserved0; /* Ignore; will be 0 */ 751 uint32_t offset; /* Offset in flash which was hashed */ 752 uint32_t size; /* Number of bytes hashed */ 753 uint8_t hash_digest[64]; /* Hash digest data */ 754 } __packed; 755 756 enum ec_vboot_hash_cmd { 757 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 758 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 759 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 760 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 761 }; 762 763 enum ec_vboot_hash_type { 764 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 765 }; 766 767 enum ec_vboot_hash_status { 768 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 769 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 770 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 771 }; 772 773 /* 774 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 775 * If one of these is specified, the EC will automatically update offset and 776 * size to the correct values for the specified image (RO or RW). 777 */ 778 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 779 #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd 780 781 /*****************************************************************************/ 782 /* USB charging control commands */ 783 784 /* Set USB port charging mode */ 785 #define EC_CMD_USB_CHARGE_SET_MODE 0x30 786 787 struct ec_params_usb_charge_set_mode { 788 uint8_t usb_port_id; 789 uint8_t mode; 790 } __packed; 791 792 /*****************************************************************************/ 793 /* Persistent storage for host */ 794 795 /* Maximum bytes that can be read/written in a single command */ 796 #define EC_PSTORE_SIZE_MAX 64 797 798 /* Get persistent storage info */ 799 #define EC_CMD_PSTORE_INFO 0x40 800 801 struct ec_response_pstore_info { 802 /* Persistent storage size, in bytes */ 803 uint32_t pstore_size; 804 /* Access size; read/write offset and size must be a multiple of this */ 805 uint32_t access_size; 806 } __packed; 807 808 /* 809 * Read persistent storage 810 * 811 * Response is params.size bytes of data. 812 */ 813 #define EC_CMD_PSTORE_READ 0x41 814 815 struct ec_params_pstore_read { 816 uint32_t offset; /* Byte offset to read */ 817 uint32_t size; /* Size to read in bytes */ 818 } __packed; 819 820 /* Write persistent storage */ 821 #define EC_CMD_PSTORE_WRITE 0x42 822 823 struct ec_params_pstore_write { 824 uint32_t offset; /* Byte offset to write */ 825 uint32_t size; /* Size to write in bytes */ 826 uint8_t data[EC_PSTORE_SIZE_MAX]; 827 } __packed; 828 829 /*****************************************************************************/ 830 /* Real-time clock */ 831 832 /* RTC params and response structures */ 833 struct ec_params_rtc { 834 uint32_t time; 835 } __packed; 836 837 struct ec_response_rtc { 838 uint32_t time; 839 } __packed; 840 841 /* These use ec_response_rtc */ 842 #define EC_CMD_RTC_GET_VALUE 0x44 843 #define EC_CMD_RTC_GET_ALARM 0x45 844 845 /* These all use ec_params_rtc */ 846 #define EC_CMD_RTC_SET_VALUE 0x46 847 #define EC_CMD_RTC_SET_ALARM 0x47 848 849 /*****************************************************************************/ 850 /* Port80 log access */ 851 852 /* Get last port80 code from previous boot */ 853 #define EC_CMD_PORT80_LAST_BOOT 0x48 854 855 struct ec_response_port80_last_boot { 856 uint16_t code; 857 } __packed; 858 859 /*****************************************************************************/ 860 /* Thermal engine commands */ 861 862 /* Set thershold value */ 863 #define EC_CMD_THERMAL_SET_THRESHOLD 0x50 864 865 struct ec_params_thermal_set_threshold { 866 uint8_t sensor_type; 867 uint8_t threshold_id; 868 uint16_t value; 869 } __packed; 870 871 /* Get threshold value */ 872 #define EC_CMD_THERMAL_GET_THRESHOLD 0x51 873 874 struct ec_params_thermal_get_threshold { 875 uint8_t sensor_type; 876 uint8_t threshold_id; 877 } __packed; 878 879 struct ec_response_thermal_get_threshold { 880 uint16_t value; 881 } __packed; 882 883 /* Toggle automatic fan control */ 884 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52 885 886 /* Get TMP006 calibration data */ 887 #define EC_CMD_TMP006_GET_CALIBRATION 0x53 888 889 struct ec_params_tmp006_get_calibration { 890 uint8_t index; 891 } __packed; 892 893 struct ec_response_tmp006_get_calibration { 894 float s0; 895 float b0; 896 float b1; 897 float b2; 898 } __packed; 899 900 /* Set TMP006 calibration data */ 901 #define EC_CMD_TMP006_SET_CALIBRATION 0x54 902 903 struct ec_params_tmp006_set_calibration { 904 uint8_t index; 905 uint8_t reserved[3]; /* Reserved; set 0 */ 906 float s0; 907 float b0; 908 float b1; 909 float b2; 910 } __packed; 911 912 /*****************************************************************************/ 913 /* CROS_EC - Matrix KeyBoard Protocol */ 914 915 /* 916 * Read key state 917 * 918 * Returns raw data for keyboard cols; see ec_response_cros_ec_info.cols for 919 * expected response size. 920 */ 921 #define EC_CMD_CROS_EC_STATE 0x60 922 923 /* Provide information about the matrix : number of rows and columns */ 924 #define EC_CMD_CROS_EC_INFO 0x61 925 926 struct ec_response_cros_ec_info { 927 uint32_t rows; 928 uint32_t cols; 929 uint8_t switches; 930 } __packed; 931 932 /* Simulate key press */ 933 #define EC_CMD_CROS_EC_SIMULATE_KEY 0x62 934 935 struct ec_params_cros_ec_simulate_key { 936 uint8_t col; 937 uint8_t row; 938 uint8_t pressed; 939 } __packed; 940 941 /* Configure keyboard scanning */ 942 #define EC_CMD_CROS_EC_SET_CONFIG 0x64 943 #define EC_CMD_CROS_EC_GET_CONFIG 0x65 944 945 /* flags */ 946 enum cros_ec_config_flags { 947 EC_CROS_EC_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 948 }; 949 950 enum cros_ec_config_valid { 951 EC_CROS_EC_VALID_SCAN_PERIOD = 1 << 0, 952 EC_CROS_EC_VALID_POLL_TIMEOUT = 1 << 1, 953 EC_CROS_EC_VALID_MIN_POST_SCAN_DELAY = 1 << 3, 954 EC_CROS_EC_VALID_OUTPUT_SETTLE = 1 << 4, 955 EC_CROS_EC_VALID_DEBOUNCE_DOWN = 1 << 5, 956 EC_CROS_EC_VALID_DEBOUNCE_UP = 1 << 6, 957 EC_CROS_EC_VALID_FIFO_MAX_DEPTH = 1 << 7, 958 }; 959 960 /* Configuration for our key scanning algorithm */ 961 struct ec_cros_ec_config { 962 uint32_t valid_mask; /* valid fields */ 963 uint8_t flags; /* some flags (enum cros_ec_config_flags) */ 964 uint8_t valid_flags; /* which flags are valid */ 965 uint16_t scan_period_us; /* period between start of scans */ 966 /* revert to interrupt mode after no activity for this long */ 967 uint32_t poll_timeout_us; 968 /* 969 * minimum post-scan relax time. Once we finish a scan we check 970 * the time until we are due to start the next one. If this time is 971 * shorter this field, we use this instead. 972 */ 973 uint16_t min_post_scan_delay_us; 974 /* delay between setting up output and waiting for it to settle */ 975 uint16_t output_settle_us; 976 uint16_t debounce_down_us; /* time for debounce on key down */ 977 uint16_t debounce_up_us; /* time for debounce on key up */ 978 /* maximum depth to allow for fifo (0 = no keyscan output) */ 979 uint8_t fifo_max_depth; 980 } __packed; 981 982 struct ec_params_cros_ec_set_config { 983 struct ec_cros_ec_config config; 984 } __packed; 985 986 struct ec_response_cros_ec_get_config { 987 struct ec_cros_ec_config config; 988 } __packed; 989 990 /* Run the key scan emulation */ 991 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 992 993 enum ec_keyscan_seq_cmd { 994 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 995 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 996 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 997 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 998 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 999 }; 1000 1001 enum ec_collect_flags { 1002 /* 1003 * Indicates this scan was processed by the EC. Due to timing, some 1004 * scans may be skipped. 1005 */ 1006 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, 1007 }; 1008 1009 struct ec_collect_item { 1010 uint8_t flags; /* some flags (enum ec_collect_flags) */ 1011 }; 1012 1013 struct ec_params_keyscan_seq_ctrl { 1014 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 1015 union { 1016 struct { 1017 uint8_t active; /* still active */ 1018 uint8_t num_items; /* number of items */ 1019 /* Current item being presented */ 1020 uint8_t cur_item; 1021 } status; 1022 struct { 1023 /* 1024 * Absolute time for this scan, measured from the 1025 * start of the sequence. 1026 */ 1027 uint32_t time_us; 1028 uint8_t scan[0]; /* keyscan data */ 1029 } add; 1030 struct { 1031 uint8_t start_item; /* First item to return */ 1032 uint8_t num_items; /* Number of items to return */ 1033 } collect; 1034 }; 1035 } __packed; 1036 1037 struct ec_result_keyscan_seq_ctrl { 1038 union { 1039 struct { 1040 uint8_t num_items; /* Number of items */ 1041 /* Data for each item */ 1042 struct ec_collect_item item[0]; 1043 } collect; 1044 }; 1045 } __packed; 1046 1047 /*****************************************************************************/ 1048 /* Temperature sensor commands */ 1049 1050 /* Read temperature sensor info */ 1051 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x70 1052 1053 struct ec_params_temp_sensor_get_info { 1054 uint8_t id; 1055 } __packed; 1056 1057 struct ec_response_temp_sensor_get_info { 1058 char sensor_name[32]; 1059 uint8_t sensor_type; 1060 } __packed; 1061 1062 /*****************************************************************************/ 1063 1064 /* 1065 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 1066 * commands accidentally sent to the wrong interface. See the ACPI section 1067 * below. 1068 */ 1069 1070 /*****************************************************************************/ 1071 /* Host event commands */ 1072 1073 /* 1074 * Host event mask params and response structures, shared by all of the host 1075 * event commands below. 1076 */ 1077 struct ec_params_host_event_mask { 1078 uint32_t mask; 1079 } __packed; 1080 1081 struct ec_response_host_event_mask { 1082 uint32_t mask; 1083 } __packed; 1084 1085 /* These all use ec_response_host_event_mask */ 1086 #define EC_CMD_HOST_EVENT_GET_B 0x87 1087 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88 1088 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89 1089 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d 1090 1091 /* These all use ec_params_host_event_mask */ 1092 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a 1093 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b 1094 #define EC_CMD_HOST_EVENT_CLEAR 0x8c 1095 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e 1096 #define EC_CMD_HOST_EVENT_CLEAR_B 0x8f 1097 1098 /*****************************************************************************/ 1099 /* Switch commands */ 1100 1101 /* Enable/disable LCD backlight */ 1102 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90 1103 1104 struct ec_params_switch_enable_backlight { 1105 uint8_t enabled; 1106 } __packed; 1107 1108 /* Enable/disable WLAN/Bluetooth */ 1109 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 1110 1111 struct ec_params_switch_enable_wireless { 1112 uint8_t enabled; 1113 } __packed; 1114 1115 /*****************************************************************************/ 1116 /* GPIO commands. Only available on EC if write protect has been disabled. */ 1117 1118 /* Set GPIO output value */ 1119 #define EC_CMD_GPIO_SET 0x92 1120 1121 struct ec_params_gpio_set { 1122 char name[32]; 1123 uint8_t val; 1124 } __packed; 1125 1126 /* Get GPIO value */ 1127 #define EC_CMD_GPIO_GET 0x93 1128 1129 struct ec_params_gpio_get { 1130 char name[32]; 1131 } __packed; 1132 struct ec_response_gpio_get { 1133 uint8_t val; 1134 } __packed; 1135 1136 /*****************************************************************************/ 1137 /* I2C commands. Only available when flash write protect is unlocked. */ 1138 1139 /* Read I2C bus */ 1140 #define EC_CMD_I2C_READ 0x94 1141 1142 struct ec_params_i2c_read { 1143 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 1144 uint8_t read_size; /* Either 8 or 16. */ 1145 uint8_t port; 1146 uint8_t offset; 1147 } __packed; 1148 struct ec_response_i2c_read { 1149 uint16_t data; 1150 } __packed; 1151 1152 /* Write I2C bus */ 1153 #define EC_CMD_I2C_WRITE 0x95 1154 1155 struct ec_params_i2c_write { 1156 uint16_t data; 1157 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 1158 uint8_t write_size; /* Either 8 or 16. */ 1159 uint8_t port; 1160 uint8_t offset; 1161 } __packed; 1162 1163 /*****************************************************************************/ 1164 /* Charge state commands. Only available when flash write protect unlocked. */ 1165 1166 /* Force charge state machine to stop in idle mode */ 1167 #define EC_CMD_CHARGE_FORCE_IDLE 0x96 1168 1169 struct ec_params_force_idle { 1170 uint8_t enabled; 1171 } __packed; 1172 1173 /*****************************************************************************/ 1174 /* Console commands. Only available when flash write protect is unlocked. */ 1175 1176 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 1177 #define EC_CMD_CONSOLE_SNAPSHOT 0x97 1178 1179 /* 1180 * Read next chunk of data from saved snapshot. 1181 * 1182 * Response is null-terminated string. Empty string, if there is no more 1183 * remaining output. 1184 */ 1185 #define EC_CMD_CONSOLE_READ 0x98 1186 1187 /*****************************************************************************/ 1188 1189 /* 1190 * Cut off battery power output if the battery supports. 1191 * 1192 * For unsupported battery, just don't implement this command and lets EC 1193 * return EC_RES_INVALID_COMMAND. 1194 */ 1195 #define EC_CMD_BATTERY_CUT_OFF 0x99 1196 1197 /*****************************************************************************/ 1198 /* USB port mux control. */ 1199 1200 /* 1201 * Switch USB mux or return to automatic switching. 1202 */ 1203 #define EC_CMD_USB_MUX 0x9a 1204 1205 struct ec_params_usb_mux { 1206 uint8_t mux; 1207 } __packed; 1208 1209 /*****************************************************************************/ 1210 /* LDOs / FETs control. */ 1211 1212 enum ec_ldo_state { 1213 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 1214 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 1215 }; 1216 1217 /* 1218 * Switch on/off a LDO. 1219 */ 1220 #define EC_CMD_LDO_SET 0x9b 1221 1222 struct ec_params_ldo_set { 1223 uint8_t index; 1224 uint8_t state; 1225 } __packed; 1226 1227 /* 1228 * Get LDO state. 1229 */ 1230 #define EC_CMD_LDO_GET 0x9c 1231 1232 struct ec_params_ldo_get { 1233 uint8_t index; 1234 } __packed; 1235 1236 struct ec_response_ldo_get { 1237 uint8_t state; 1238 } __packed; 1239 1240 /*****************************************************************************/ 1241 /* Power info. */ 1242 1243 /* 1244 * Get power info. 1245 */ 1246 #define EC_CMD_POWER_INFO 0x9d 1247 1248 struct ec_response_power_info { 1249 uint32_t usb_dev_type; 1250 uint16_t voltage_ac; 1251 uint16_t voltage_system; 1252 uint16_t current_system; 1253 uint16_t usb_current_limit; 1254 } __packed; 1255 1256 /*****************************************************************************/ 1257 /* I2C passthru command */ 1258 1259 #define EC_CMD_I2C_PASSTHRU 0x9e 1260 1261 /* Slave address is 10 (not 7) bit */ 1262 #define EC_I2C_FLAG_10BIT (1 << 16) 1263 1264 /* Read data; if not present, message is a write */ 1265 #define EC_I2C_FLAG_READ (1 << 15) 1266 1267 /* Mask for address */ 1268 #define EC_I2C_ADDR_MASK 0x3ff 1269 1270 #define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */ 1271 #define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */ 1272 1273 /* Any error */ 1274 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 1275 1276 struct ec_params_i2c_passthru_msg { 1277 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 1278 uint16_t len; /* Number of bytes to write*/ 1279 } __packed; 1280 1281 struct ec_params_i2c_passthru { 1282 uint8_t port; /* I2C port number */ 1283 uint8_t num_msgs; /* Number of messages */ 1284 struct ec_params_i2c_passthru_msg msg[]; 1285 /* Data for all messages is concatenated here */ 1286 } __packed; 1287 1288 struct ec_response_i2c_passthru { 1289 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 1290 uint8_t num_msgs; /* Number of messages processed */ 1291 uint8_t data[]; /* Data for all messages concatenated here */ 1292 } __packed; 1293 1294 1295 /*****************************************************************************/ 1296 /* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */ 1297 1298 /* 1299 * Dump charge state machine context. 1300 * 1301 * Response is a binary dump of charge state machine context. 1302 */ 1303 #define EC_CMD_CHARGE_DUMP 0xa0 1304 1305 /* 1306 * Set maximum battery charging current. 1307 */ 1308 #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 1309 1310 struct ec_params_current_limit { 1311 uint32_t limit; /* in mA */ 1312 } __packed; 1313 1314 /* 1315 * Set maximum external power current. 1316 */ 1317 #define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2 1318 1319 struct ec_params_ext_power_current_limit { 1320 uint32_t limit; /* in mA */ 1321 } __packed; 1322 1323 /*****************************************************************************/ 1324 /* Smart battery pass-through */ 1325 1326 /* Get / Set 16-bit smart battery registers */ 1327 #define EC_CMD_SB_READ_WORD 0xb0 1328 #define EC_CMD_SB_WRITE_WORD 0xb1 1329 1330 /* Get / Set string smart battery parameters 1331 * formatted as SMBUS "block". 1332 */ 1333 #define EC_CMD_SB_READ_BLOCK 0xb2 1334 #define EC_CMD_SB_WRITE_BLOCK 0xb3 1335 1336 struct ec_params_sb_rd { 1337 uint8_t reg; 1338 } __packed; 1339 1340 struct ec_response_sb_rd_word { 1341 uint16_t value; 1342 } __packed; 1343 1344 struct ec_params_sb_wr_word { 1345 uint8_t reg; 1346 uint16_t value; 1347 } __packed; 1348 1349 struct ec_response_sb_rd_block { 1350 uint8_t data[32]; 1351 } __packed; 1352 1353 struct ec_params_sb_wr_block { 1354 uint8_t reg; 1355 uint16_t data[32]; 1356 } __packed; 1357 1358 /*****************************************************************************/ 1359 /* System commands */ 1360 1361 /* 1362 * TODO: this is a confusing name, since it doesn't necessarily reboot the EC. 1363 * Rename to "set image" or something similar. 1364 */ 1365 #define EC_CMD_REBOOT_EC 0xd2 1366 1367 /* Command */ 1368 enum ec_reboot_cmd { 1369 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 1370 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 1371 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */ 1372 /* (command 3 was jump to RW-B) */ 1373 EC_REBOOT_COLD = 4, /* Cold-reboot */ 1374 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 1375 EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ 1376 }; 1377 1378 /* Flags for ec_params_reboot_ec.reboot_flags */ 1379 #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ 1380 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ 1381 1382 struct ec_params_reboot_ec { 1383 uint8_t cmd; /* enum ec_reboot_cmd */ 1384 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 1385 } __packed; 1386 1387 /* 1388 * Get information on last EC panic. 1389 * 1390 * Returns variable-length platform-dependent panic information. See panic.h 1391 * for details. 1392 */ 1393 #define EC_CMD_GET_PANIC_INFO 0xd3 1394 1395 /*****************************************************************************/ 1396 /* 1397 * ACPI commands 1398 * 1399 * These are valid ONLY on the ACPI command/data port. 1400 */ 1401 1402 /* 1403 * ACPI Read Embedded Controller 1404 * 1405 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 1406 * 1407 * Use the following sequence: 1408 * 1409 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 1410 * - Wait for EC_LPC_CMDR_PENDING bit to clear 1411 * - Write address to EC_LPC_ADDR_ACPI_DATA 1412 * - Wait for EC_LPC_CMDR_DATA bit to set 1413 * - Read value from EC_LPC_ADDR_ACPI_DATA 1414 */ 1415 #define EC_CMD_ACPI_READ 0x80 1416 1417 /* 1418 * ACPI Write Embedded Controller 1419 * 1420 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 1421 * 1422 * Use the following sequence: 1423 * 1424 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 1425 * - Wait for EC_LPC_CMDR_PENDING bit to clear 1426 * - Write address to EC_LPC_ADDR_ACPI_DATA 1427 * - Wait for EC_LPC_CMDR_PENDING bit to clear 1428 * - Write value to EC_LPC_ADDR_ACPI_DATA 1429 */ 1430 #define EC_CMD_ACPI_WRITE 0x81 1431 1432 /* 1433 * ACPI Query Embedded Controller 1434 * 1435 * This clears the lowest-order bit in the currently pending host events, and 1436 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 1437 * event 0x80000000 = 32), or 0 if no event was pending. 1438 */ 1439 #define EC_CMD_ACPI_QUERY_EVENT 0x84 1440 1441 /* Valid addresses in ACPI memory space, for read/write commands */ 1442 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 1443 #define EC_ACPI_MEM_VERSION 0x00 1444 /* 1445 * Test location; writing value here updates test compliment byte to (0xff - 1446 * value). 1447 */ 1448 #define EC_ACPI_MEM_TEST 0x01 1449 /* Test compliment; writes here are ignored. */ 1450 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 1451 /* Keyboard backlight brightness percent (0 - 100) */ 1452 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 1453 1454 /* Current version of ACPI memory address space */ 1455 #define EC_ACPI_MEM_VERSION_CURRENT 1 1456 1457 1458 /*****************************************************************************/ 1459 /* 1460 * Special commands 1461 * 1462 * These do not follow the normal rules for commands. See each command for 1463 * details. 1464 */ 1465 1466 /* 1467 * Reboot NOW 1468 * 1469 * This command will work even when the EC LPC interface is busy, because the 1470 * reboot command is processed at interrupt level. Note that when the EC 1471 * reboots, the host will reboot too, so there is no response to this command. 1472 * 1473 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 1474 */ 1475 #define EC_CMD_REBOOT 0xd1 /* Think "die" */ 1476 1477 /* 1478 * Resend last response (not supported on LPC). 1479 * 1480 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 1481 * there was no previous command, or the previous command's response was too 1482 * big to save. 1483 */ 1484 #define EC_CMD_RESEND_RESPONSE 0xdb 1485 1486 /* 1487 * This header byte on a command indicate version 0. Any header byte less 1488 * than this means that we are talking to an old EC which doesn't support 1489 * versioning. In that case, we assume version 0. 1490 * 1491 * Header bytes greater than this indicate a later version. For example, 1492 * EC_CMD_VERSION0 + 1 means we are using version 1. 1493 * 1494 * The old EC interface must not use commands 0dc or higher. 1495 */ 1496 #define EC_CMD_VERSION0 0xdc 1497 1498 #endif /* !__ACPI__ */ 1499 1500 #endif /* __CROS_EC_COMMANDS_H */ 1501