xref: /netbsd/sys/arch/powerpc/ibm4xx/dev/gpiic_opb.c (revision beecddb6)
1 /*	$NetBSD: gpiic_opb.c,v 1.12 2021/08/07 16:19:03 thorpej Exp $	*/
2 
3 /*
4  * Copyright 2002, 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #include "locators.h"
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43 #include <sys/errno.h>
44 #include <sys/mutex.h>
45 #include <sys/cpu.h>
46 
47 #include <dev/i2c/i2cvar.h>
48 #include <dev/i2c/i2c_bitbang.h>
49 
50 #include <powerpc/ibm4xx/cpu.h>
51 #include <powerpc/ibm4xx/dev/opbvar.h>
52 #include <powerpc/ibm4xx/dev/gpiicreg.h>
53 
54 struct gpiic_softc {
55 	device_t sc_dev;
56 	bus_space_tag_t sc_bust;
57 	bus_space_handle_t sc_bush;
58 	uint8_t sc_txen;
59 	uint8_t sc_tx;
60 	struct i2c_controller sc_i2c;
61 	struct i2c_bitbang_ops sc_bops;
62 };
63 
64 static int	gpiic_match(device_t, cfdata_t, void *);
65 static void	gpiic_attach(device_t, device_t, void *);
66 
67 CFATTACH_DECL_NEW(gpiic, sizeof(struct gpiic_softc),
68     gpiic_match, gpiic_attach, NULL, NULL);
69 
70 static int	gpiic_send_start(void *, int);
71 static int	gpiic_send_stop(void *, int);
72 static int	gpiic_initiate_xfer(void *, i2c_addr_t, int);
73 static int	gpiic_read_byte(void *, uint8_t *, int);
74 static int	gpiic_write_byte(void *, uint8_t, int);
75 static void	gpiic_set_dir(void *, uint32_t);
76 static void	gpiic_set_bits(void *, uint32_t);
77 static uint32_t	gpiic_read_bits(void *);
78 
79 static int
gpiic_match(device_t parent,cfdata_t cf,void * args)80 gpiic_match(device_t parent, cfdata_t cf, void *args)
81 {
82 	struct opb_attach_args * const oaa = args;
83 
84 	if (strcmp(oaa->opb_name, cf->cf_name) != 0)
85 		return 0;
86 
87 	return (1);
88 }
89 
90 static void
gpiic_attach(device_t parent,device_t self,void * args)91 gpiic_attach(device_t parent, device_t self, void *args)
92 {
93 	struct gpiic_softc * const sc = device_private(self);
94 	struct opb_attach_args * const oaa = args;
95 	struct i2cbus_attach_args iba;
96 
97 	aprint_naive(": IIC controller\n");
98 	aprint_normal(": On-Chip IIC controller\n");
99 
100 	sc->sc_dev = self;
101 	sc->sc_bust = oaa->opb_bt;
102 
103 	bus_space_map(sc->sc_bust, oaa->opb_addr, IIC_NREG, 0, &sc->sc_bush);
104 
105 	sc->sc_txen = 0;
106 	sc->sc_tx = IIC_DIRECTCNTL_SCC | IIC_DIRECTCNTL_SDAC;
107 	iic_tag_init(&sc->sc_i2c);
108 	sc->sc_i2c.ic_cookie = sc;
109 	sc->sc_i2c.ic_send_start = gpiic_send_start;
110 	sc->sc_i2c.ic_send_stop = gpiic_send_stop;
111 	sc->sc_i2c.ic_initiate_xfer = gpiic_initiate_xfer;
112 	sc->sc_i2c.ic_read_byte = gpiic_read_byte;
113 	sc->sc_i2c.ic_write_byte = gpiic_write_byte;
114 
115 	sc->sc_bops.ibo_set_dir = gpiic_set_dir;
116 	sc->sc_bops.ibo_set_bits = gpiic_set_bits;
117 	sc->sc_bops.ibo_read_bits = gpiic_read_bits;
118 	sc->sc_bops.ibo_bits[I2C_BIT_SDA] = IIC_DIRECTCNTL_SDAC;
119 	sc->sc_bops.ibo_bits[I2C_BIT_SCL] = IIC_DIRECTCNTL_SCC;
120 	sc->sc_bops.ibo_bits[I2C_BIT_OUTPUT] = 1;
121 	sc->sc_bops.ibo_bits[I2C_BIT_INPUT] = 0;
122 
123 	/*
124 	 * Put the controller into Soft Reset. This allows us to
125 	 * manually bit-bang the I2C clock/data lines.
126 	 */
127 	bus_space_write_1(sc->sc_bust, sc->sc_bush, IIC_XTCNTLSS,
128 	    IIC_XTCNTLSS_SRST);
129 	delay(10);
130 	bus_space_write_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL,
131 	    IIC_DIRECTCNTL_SCC | IIC_DIRECTCNTL_SDAC);
132 
133 	memset(&iba, 0, sizeof(iba));
134 	iba.iba_tag = &sc->sc_i2c;
135 	config_found(self, &iba, iicbus_print, CFARGS_NONE);
136 }
137 
138 static int
gpiic_send_start(void * arg,int flags)139 gpiic_send_start(void *arg, int flags)
140 {
141 	struct gpiic_softc * const sc = arg;
142 
143 	return (i2c_bitbang_send_start(sc, flags, &sc->sc_bops));
144 }
145 
146 static int
gpiic_send_stop(void * arg,int flags)147 gpiic_send_stop(void *arg, int flags)
148 {
149 	struct gpiic_softc * const sc = arg;
150 
151 	return (i2c_bitbang_send_stop(sc, flags, &sc->sc_bops));
152 }
153 
154 static int
gpiic_initiate_xfer(void * arg,i2c_addr_t addr,int flags)155 gpiic_initiate_xfer(void *arg, i2c_addr_t addr, int flags)
156 {
157 	struct gpiic_softc * const sc = arg;
158 
159 	return (i2c_bitbang_initiate_xfer(sc, addr, flags, &sc->sc_bops));
160 }
161 
162 static int
gpiic_read_byte(void * arg,uint8_t * vp,int flags)163 gpiic_read_byte(void *arg, uint8_t *vp, int flags)
164 {
165 	struct gpiic_softc * const sc = arg;
166 
167 	return (i2c_bitbang_read_byte(sc, vp, flags, &sc->sc_bops));
168 }
169 
170 static int
gpiic_write_byte(void * arg,uint8_t v,int flags)171 gpiic_write_byte(void *arg, uint8_t v, int flags)
172 {
173 	struct gpiic_softc * const sc = arg;
174 
175 	return (i2c_bitbang_write_byte(sc, v, flags, &sc->sc_bops));
176 }
177 
178 static void
gpiic_set_dir(void * arg,uint32_t bits)179 gpiic_set_dir(void *arg, uint32_t bits)
180 {
181 	struct gpiic_softc * const sc = arg;
182 	uint8_t tx, txen;
183 
184 	txen = (uint8_t)bits;
185 	if (sc->sc_txen == txen)
186 		return;
187 
188 	sc->sc_txen = txen;
189 
190 	tx = sc->sc_tx;
191 	if (sc->sc_txen == 0)
192 		tx |= IIC_DIRECTCNTL_SDAC;
193 	bus_space_write_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL, tx);
194 }
195 
196 static void
gpiic_set_bits(void * arg,uint32_t bits)197 gpiic_set_bits(void *arg, uint32_t bits)
198 {
199 	struct gpiic_softc * const sc = arg;
200 
201 	sc->sc_tx = (uint8_t)bits;
202 	if (sc->sc_txen == 0)
203 		bits |= IIC_DIRECTCNTL_SDAC;
204 
205 	bus_space_write_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL, bits);
206 }
207 
208 static uint32_t
gpiic_read_bits(void * arg)209 gpiic_read_bits(void *arg)
210 {
211 	struct gpiic_softc * const sc = arg;
212 	uint8_t rv;
213 
214 	rv = bus_space_read_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL) << 2;
215 	rv &= (IIC_DIRECTCNTL_SCC | IIC_DIRECTCNTL_SDAC);
216 
217 	return ((uint32_t)rv);
218 }
219