1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Medifield PNW Camera Imaging ISP subsystem.
4  *
5  * Copyright (c) 2010 Intel Corporation. All Rights Reserved.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License version
9  * 2 as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  *
17  */
18 #ifndef ATOMISP_PLATFORM_H_
19 #define ATOMISP_PLATFORM_H_
20 
21 #include <asm/intel-family.h>
22 #include <asm/processor.h>
23 
24 #include <linux/i2c.h>
25 #include <media/v4l2-subdev.h>
26 #include "atomisp.h"
27 
28 #define MAX_SENSORS_PER_PORT 4
29 #define MAX_STREAMS_PER_CHANNEL 2
30 
31 #define CAMERA_MODULE_ID_LEN 64
32 
33 enum atomisp_bayer_order {
34 	atomisp_bayer_order_grbg,
35 	atomisp_bayer_order_rggb,
36 	atomisp_bayer_order_bggr,
37 	atomisp_bayer_order_gbrg
38 };
39 
40 enum atomisp_input_stream_id {
41 	ATOMISP_INPUT_STREAM_GENERAL = 0,
42 	ATOMISP_INPUT_STREAM_CAPTURE = 0,
43 	ATOMISP_INPUT_STREAM_POSTVIEW,
44 	ATOMISP_INPUT_STREAM_PREVIEW,
45 	ATOMISP_INPUT_STREAM_VIDEO,
46 	ATOMISP_INPUT_STREAM_NUM
47 };
48 
49 enum atomisp_input_format {
50 	ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY,/* 8 bits per subpixel (legacy) */
51 	ATOMISP_INPUT_FORMAT_YUV420_8, /* 8 bits per subpixel */
52 	ATOMISP_INPUT_FORMAT_YUV420_10,/* 10 bits per subpixel */
53 	ATOMISP_INPUT_FORMAT_YUV420_16,/* 16 bits per subpixel */
54 	ATOMISP_INPUT_FORMAT_YUV422_8, /* UYVY..UVYV, 8 bits per subpixel */
55 	ATOMISP_INPUT_FORMAT_YUV422_10,/* UYVY..UVYV, 10 bits per subpixel */
56 	ATOMISP_INPUT_FORMAT_YUV422_16,/* UYVY..UVYV, 16 bits per subpixel */
57 	ATOMISP_INPUT_FORMAT_RGB_444,  /* BGR..BGR, 4 bits per subpixel */
58 	ATOMISP_INPUT_FORMAT_RGB_555,  /* BGR..BGR, 5 bits per subpixel */
59 	ATOMISP_INPUT_FORMAT_RGB_565,  /* BGR..BGR, 5 bits B and R, 6 bits G */
60 	ATOMISP_INPUT_FORMAT_RGB_666,  /* BGR..BGR, 6 bits per subpixel */
61 	ATOMISP_INPUT_FORMAT_RGB_888,  /* BGR..BGR, 8 bits per subpixel */
62 	ATOMISP_INPUT_FORMAT_RAW_6,    /* RAW data, 6 bits per pixel */
63 	ATOMISP_INPUT_FORMAT_RAW_7,    /* RAW data, 7 bits per pixel */
64 	ATOMISP_INPUT_FORMAT_RAW_8,    /* RAW data, 8 bits per pixel */
65 	ATOMISP_INPUT_FORMAT_RAW_10,   /* RAW data, 10 bits per pixel */
66 	ATOMISP_INPUT_FORMAT_RAW_12,   /* RAW data, 12 bits per pixel */
67 	ATOMISP_INPUT_FORMAT_RAW_14,   /* RAW data, 14 bits per pixel */
68 	ATOMISP_INPUT_FORMAT_RAW_16,   /* RAW data, 16 bits per pixel */
69 	ATOMISP_INPUT_FORMAT_BINARY_8, /* Binary byte stream. */
70 
71 	/* CSI2-MIPI specific format: Generic short packet data. It is used to
72 	 * keep the timing information for the opening/closing of shutters,
73 	 * triggering of flashes and etc.
74 	 */
75 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT1,  /* Generic Short Packet Code 1 */
76 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT2,  /* Generic Short Packet Code 2 */
77 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT3,  /* Generic Short Packet Code 3 */
78 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT4,  /* Generic Short Packet Code 4 */
79 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT5,  /* Generic Short Packet Code 5 */
80 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT6,  /* Generic Short Packet Code 6 */
81 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT7,  /* Generic Short Packet Code 7 */
82 	ATOMISP_INPUT_FORMAT_GENERIC_SHORT8,  /* Generic Short Packet Code 8 */
83 
84 	/* CSI2-MIPI specific format: YUV data.
85 	 */
86 	ATOMISP_INPUT_FORMAT_YUV420_8_SHIFT,  /* YUV420 8-bit (Chroma Shifted
87 						 Pixel Sampling) */
88 	ATOMISP_INPUT_FORMAT_YUV420_10_SHIFT, /* YUV420 8-bit (Chroma Shifted
89 						 Pixel Sampling) */
90 
91 	/* CSI2-MIPI specific format: Generic long packet data
92 	 */
93 	ATOMISP_INPUT_FORMAT_EMBEDDED, /* Embedded 8-bit non Image Data */
94 
95 	/* CSI2-MIPI specific format: User defined byte-based data. For example,
96 	 * the data transmitter (e.g. the SoC sensor) can keep the JPEG data as
97 	 * the User Defined Data Type 4 and the MPEG data as the
98 	 * User Defined Data Type 7.
99 	 */
100 	ATOMISP_INPUT_FORMAT_USER_DEF1,  /* User defined 8-bit data type 1 */
101 	ATOMISP_INPUT_FORMAT_USER_DEF2,  /* User defined 8-bit data type 2 */
102 	ATOMISP_INPUT_FORMAT_USER_DEF3,  /* User defined 8-bit data type 3 */
103 	ATOMISP_INPUT_FORMAT_USER_DEF4,  /* User defined 8-bit data type 4 */
104 	ATOMISP_INPUT_FORMAT_USER_DEF5,  /* User defined 8-bit data type 5 */
105 	ATOMISP_INPUT_FORMAT_USER_DEF6,  /* User defined 8-bit data type 6 */
106 	ATOMISP_INPUT_FORMAT_USER_DEF7,  /* User defined 8-bit data type 7 */
107 	ATOMISP_INPUT_FORMAT_USER_DEF8,  /* User defined 8-bit data type 8 */
108 };
109 
110 #define N_ATOMISP_INPUT_FORMAT (ATOMISP_INPUT_FORMAT_USER_DEF8 + 1)
111 
112 struct intel_v4l2_subdev_table {
113 	enum atomisp_camera_port port;
114 	unsigned int lanes;
115 	struct v4l2_subdev *subdev;
116 };
117 
118 /*
119  *  Sensor of external ISP can send multiple steams with different mipi data
120  * type in the same virtual channel. This information needs to come from the
121  * sensor or external ISP
122  */
123 struct atomisp_isys_config_info {
124 	u8 input_format;
125 	u16 width;
126 	u16 height;
127 };
128 
129 struct atomisp_input_stream_info {
130 	enum atomisp_input_stream_id stream;
131 	u8 enable;
132 	/* Sensor driver fills ch_id with the id
133 	   of the virtual channel. */
134 	u8 ch_id;
135 	/* Tells how many streams in this virtual channel. If 0 ignore rest
136 	 * and the input format will be from mipi_info */
137 	u8 isys_configs;
138 	/*
139 	 * if more isys_configs is more than 0, sensor needs to configure the
140 	 * input format differently. width and height can be 0. If width and
141 	 * height is not zero, then the corresponsing data needs to be set
142 	 */
143 	struct atomisp_isys_config_info isys_info[MAX_STREAMS_PER_CHANNEL];
144 };
145 
146 struct camera_sensor_platform_data {
147 	int (*flisclk_ctrl)(struct v4l2_subdev *subdev, int flag);
148 	int (*csi_cfg)(struct v4l2_subdev *subdev, int flag);
149 
150 	/*
151 	 * New G-Min power and GPIO interface to control individual
152 	 * lines as implemented on all known camera modules.
153 	 */
154 	int (*gpio0_ctrl)(struct v4l2_subdev *subdev, int on);
155 	int (*gpio1_ctrl)(struct v4l2_subdev *subdev, int on);
156 	int (*v1p8_ctrl)(struct v4l2_subdev *subdev, int on);
157 	int (*v2p8_ctrl)(struct v4l2_subdev *subdev, int on);
158 	int (*v1p2_ctrl)(struct v4l2_subdev *subdev, int on);
159 };
160 
161 struct camera_mipi_info {
162 	enum atomisp_camera_port        port;
163 	unsigned int                    num_lanes;
164 	enum atomisp_input_format       input_format;
165 	enum atomisp_bayer_order        raw_bayer_order;
166 	enum atomisp_input_format       metadata_format;
167 	u32                             metadata_width;
168 	u32                             metadata_height;
169 	const u32                       *metadata_effective_width;
170 };
171 
172 const struct intel_v4l2_subdev_table *atomisp_platform_get_subdevs(void);
173 int atomisp_register_sensor_no_gmin(struct v4l2_subdev *subdev, u32 lanes,
174 				    enum atomisp_input_format format,
175 				    enum atomisp_bayer_order bayer_order);
176 void atomisp_unregister_subdev(struct v4l2_subdev *subdev);
177 
178 int v4l2_get_acpi_sensor_info(struct device *dev, char **module_id_str);
179 
180 /* API from old platform_camera.h, new CPUID implementation */
181 #define __IS_SOC(x) (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && \
182 		     boot_cpu_data.x86 == 6 &&                       \
183 		     boot_cpu_data.x86_model == (x))
184 #define __IS_SOCS(x,y) (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && \
185 		        boot_cpu_data.x86 == 6 &&                       \
186 		        (boot_cpu_data.x86_model == (x) || \
187 		         boot_cpu_data.x86_model == (y)))
188 
189 #define IS_MFLD	__IS_SOC(INTEL_FAM6_ATOM_SALTWELL_MID)
190 #define IS_BYT	__IS_SOC(INTEL_FAM6_ATOM_SILVERMONT)
191 #define IS_CHT	__IS_SOC(INTEL_FAM6_ATOM_AIRMONT)
192 #define IS_MRFD	__IS_SOC(INTEL_FAM6_ATOM_SILVERMONT_MID)
193 #define IS_MOFD	__IS_SOC(INTEL_FAM6_ATOM_AIRMONT_MID)
194 
195 /* Both CHT and MOFD come with ISP2401 */
196 #define IS_ISP2401 __IS_SOCS(INTEL_FAM6_ATOM_AIRMONT, \
197 			     INTEL_FAM6_ATOM_AIRMONT_MID)
198 
199 #endif /* ATOMISP_PLATFORM_H_ */
200