1 /* $NetBSD: nouveau_nvkm_engine_disp_sorgv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $ */
2
3 /*
4 * Copyright 2018 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24 #include <sys/cdefs.h>
25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_sorgv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $");
26
27 #include "ior.h"
28
29 #include <subdev/timer.h>
30
31 void
gv100_sor_dp_watermark(struct nvkm_ior * sor,int head,u8 watermark)32 gv100_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark)
33 {
34 struct nvkm_device *device = sor->disp->engine.subdev.device;
35 const u32 hoff = head * 0x800;
36 nvkm_mask(device, 0x616550 + hoff, 0x0c00003f, 0x08000000 | watermark);
37 }
38
39 void
gv100_sor_dp_audio_sym(struct nvkm_ior * sor,int head,u16 h,u32 v)40 gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v)
41 {
42 struct nvkm_device *device = sor->disp->engine.subdev.device;
43 const u32 hoff = head * 0x800;
44 nvkm_mask(device, 0x616568 + hoff, 0x0000ffff, h);
45 nvkm_mask(device, 0x61656c + hoff, 0x00ffffff, v);
46 }
47
48 void
gv100_sor_dp_audio(struct nvkm_ior * sor,int head,bool enable)49 gv100_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
50 {
51 struct nvkm_device *device = sor->disp->engine.subdev.device;
52 const u32 hoff = 0x800 * head;
53 const u32 data = 0x80000000 | (0x00000001 * enable);
54 const u32 mask = 0x8000000d;
55 nvkm_mask(device, 0x616560 + hoff, mask, data);
56 nvkm_msec(device, 2000,
57 if (!(nvkm_rd32(device, 0x616560 + hoff) & 0x80000000))
58 break;
59 );
60 }
61
62 void
gv100_sor_state(struct nvkm_ior * sor,struct nvkm_ior_state * state)63 gv100_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state)
64 {
65 struct nvkm_device *device = sor->disp->engine.subdev.device;
66 const u32 coff = (state == &sor->arm) * 0x8000 + sor->id * 0x20;
67 u32 ctrl = nvkm_rd32(device, 0x680300 + coff);
68
69 state->proto_evo = (ctrl & 0x00000f00) >> 8;
70 switch (state->proto_evo) {
71 case 0: state->proto = LVDS; state->link = 1; break;
72 case 1: state->proto = TMDS; state->link = 1; break;
73 case 2: state->proto = TMDS; state->link = 2; break;
74 case 5: state->proto = TMDS; state->link = 3; break;
75 case 8: state->proto = DP; state->link = 1; break;
76 case 9: state->proto = DP; state->link = 2; break;
77 default:
78 state->proto = UNKNOWN;
79 break;
80 }
81
82 state->head = ctrl & 0x000000ff;
83 }
84
85 static const struct nvkm_ior_func
86 gv100_sor = {
87 .route = {
88 .get = gm200_sor_route_get,
89 .set = gm200_sor_route_set,
90 },
91 .state = gv100_sor_state,
92 .power = nv50_sor_power,
93 .clock = gf119_sor_clock,
94 .hdmi = {
95 .ctrl = gv100_hdmi_ctrl,
96 .scdc = gm200_hdmi_scdc,
97 },
98 .dp = {
99 .lanes = { 0, 1, 2, 3 },
100 .links = gf119_sor_dp_links,
101 .power = g94_sor_dp_power,
102 .pattern = gm107_sor_dp_pattern,
103 .drive = gm200_sor_dp_drive,
104 .audio = gv100_sor_dp_audio,
105 .audio_sym = gv100_sor_dp_audio_sym,
106 .watermark = gv100_sor_dp_watermark,
107 },
108 .hda = {
109 .hpd = gf119_hda_hpd,
110 .eld = gf119_hda_eld,
111 },
112 };
113
114 int
gv100_sor_new(struct nvkm_disp * disp,int id)115 gv100_sor_new(struct nvkm_disp *disp, int id)
116 {
117 return nvkm_ior_new_(&gv100_sor, disp, SOR, id);
118 }
119
120 int
gv100_sor_cnt(struct nvkm_disp * disp,unsigned long * pmask)121 gv100_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask)
122 {
123 struct nvkm_device *device = disp->engine.subdev.device;
124 *pmask = (nvkm_rd32(device, 0x610060) & 0x0000ff00) >> 8;
125 return (nvkm_rd32(device, 0x610074) & 0x00000f00) >> 8;
126 }
127