1 /*-
2 * Copyright (c) 2012 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /*
28 * RME HDSPe driver for FreeBSD.
29 * Supported cards: AIO, RayDAT.
30 */
31
32 #include <dev/sound/pcm/sound.h>
33 #include <dev/sound/pci/hdspe.h>
34 #include <dev/sound/chip.h>
35
36 #include <bus/pci/pcireg.h>
37 #include <bus/pci/pcivar.h>
38
39 #include <mixer_if.h>
40
41 SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/hdspe.c 267581 2014-06-17 16:07:57Z jhb $");
42
43 static struct hdspe_channel chan_map_aio[] = {
44 { 0, 1, "line", 1, 1 },
45 { 6, 7, "phone", 1, 0 },
46 { 8, 9, "aes", 1, 1 },
47 { 10, 11, "s/pdif", 1, 1 },
48 { 12, 16, "adat", 1, 1 },
49
50 /* Single or double speed. */
51 { 14, 18, "adat", 1, 1 },
52
53 /* Single speed only. */
54 { 13, 15, "adat", 1, 1 },
55 { 17, 19, "adat", 1, 1 },
56
57 { 0, 0, NULL, 0, 0 },
58 };
59
60 static struct hdspe_channel chan_map_rd[] = {
61 { 0, 1, "aes", 1, 1 },
62 { 2, 3, "s/pdif", 1, 1 },
63 { 4, 5, "adat", 1, 1 },
64 { 6, 7, "adat", 1, 1 },
65 { 8, 9, "adat", 1, 1 },
66 { 10, 11, "adat", 1, 1 },
67
68 /* Single or double speed. */
69 { 12, 13, "adat", 1, 1 },
70 { 14, 15, "adat", 1, 1 },
71 { 16, 17, "adat", 1, 1 },
72 { 18, 19, "adat", 1, 1 },
73
74 /* Single speed only. */
75 { 20, 21, "adat", 1, 1 },
76 { 22, 23, "adat", 1, 1 },
77 { 24, 25, "adat", 1, 1 },
78 { 26, 27, "adat", 1, 1 },
79 { 28, 29, "adat", 1, 1 },
80 { 30, 31, "adat", 1, 1 },
81 { 32, 33, "adat", 1, 1 },
82 { 34, 35, "adat", 1, 1 },
83
84 { 0, 0, NULL, 0, 0 },
85 };
86
87 static void
hdspe_intr(void * p)88 hdspe_intr(void *p)
89 {
90 struct sc_info *sc = (struct sc_info *)p;
91 struct sc_pcminfo *scp;
92 device_t *devlist;
93 int devcount, status;
94 int i, err;
95
96 snd_mtxlock(sc->lock);
97
98 status = hdspe_read_1(sc, HDSPE_STATUS_REG);
99 if (status & HDSPE_AUDIO_IRQ_PENDING) {
100 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
101 return;
102
103 for (i = 0; i < devcount; i++) {
104 scp = device_get_ivars(devlist[i]);
105 if (scp->ih != NULL)
106 scp->ih(scp);
107 }
108
109 hdspe_write_1(sc, HDSPE_INTERRUPT_ACK, 0);
110 kfree(devlist, M_TEMP);
111 }
112
113 snd_mtxunlock(sc->lock);
114 }
115
116 static void
hdspe_dmapsetmap(void * arg,bus_dma_segment_t * segs,int nseg,int error)117 hdspe_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
118 {
119 #if 0
120 struct sc_info *sc = (struct sc_info *)arg;
121 device_printf(sc->dev, "hdspe_dmapsetmap()\n");
122 #endif
123 }
124
125 static int
hdspe_alloc_resources(struct sc_info * sc)126 hdspe_alloc_resources(struct sc_info *sc)
127 {
128
129 /* Allocate resource. */
130 sc->csid = PCIR_BAR(0);
131 sc->cs = bus_alloc_resource(sc->dev, SYS_RES_MEMORY,
132 &sc->csid, 0, ~0, 1, RF_ACTIVE);
133
134 if (!sc->cs) {
135 device_printf(sc->dev, "Unable to map SYS_RES_MEMORY.\n");
136 return (ENXIO);
137 }
138 sc->cst = rman_get_bustag(sc->cs);
139 sc->csh = rman_get_bushandle(sc->cs);
140
141
142 /* Allocate interrupt resource. */
143 sc->irqid = 0;
144 sc->irq = bus_alloc_resource(sc->dev, SYS_RES_IRQ, &sc->irqid,
145 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
146
147 if (!sc->irq ||
148 bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE,
149 hdspe_intr, sc, &sc->ih, NULL)) {
150 device_printf(sc->dev, "Unable to alloc interrupt resource.\n");
151 return (ENXIO);
152 }
153
154 /* Allocate DMA resources. */
155 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev),
156 /*alignment*/4,
157 /*boundary*/0,
158 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
159 /*highaddr*/BUS_SPACE_MAXADDR,
160 /*maxsize*/2 * HDSPE_DMASEGSIZE,
161 /*nsegments*/2,
162 /*maxsegsz*/HDSPE_DMASEGSIZE,
163 /*flags*/0,
164 /*dmatag*/&sc->dmat) != 0) {
165 device_printf(sc->dev, "Unable to create dma tag.\n");
166 return (ENXIO);
167 }
168
169 sc->bufsize = HDSPE_DMASEGSIZE;
170
171 /* pbuf (play buffer). */
172 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf,
173 BUS_DMA_NOWAIT, &sc->pmap)) {
174 device_printf(sc->dev, "Can't alloc pbuf.\n");
175 return (ENXIO);
176 }
177
178 if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->bufsize,
179 hdspe_dmapsetmap, sc, 0)) {
180 device_printf(sc->dev, "Can't load pbuf.\n");
181 return (ENXIO);
182 }
183
184 /* rbuf (rec buffer). */
185 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf,
186 BUS_DMA_NOWAIT, &sc->rmap)) {
187 device_printf(sc->dev, "Can't alloc rbuf.\n");
188 return (ENXIO);
189 }
190
191 if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->bufsize,
192 hdspe_dmapsetmap, sc, 0)) {
193 device_printf(sc->dev, "Can't load rbuf.\n");
194 return (ENXIO);
195 }
196
197 bzero(sc->pbuf, sc->bufsize);
198 bzero(sc->rbuf, sc->bufsize);
199
200 return (0);
201 }
202
203 static void
hdspe_map_dmabuf(struct sc_info * sc)204 hdspe_map_dmabuf(struct sc_info *sc)
205 {
206 uint32_t paddr,raddr;
207 int i;
208
209 paddr = vtophys(sc->pbuf);
210 raddr = vtophys(sc->rbuf);
211
212 for (i = 0; i < HDSPE_MAX_SLOTS * 16; i++) {
213 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_OUT + 4 * i,
214 paddr + i * 4096);
215 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_IN + 4 * i,
216 raddr + i * 4096);
217 }
218 }
219
220 static int
hdspe_probe(device_t dev)221 hdspe_probe(device_t dev)
222 {
223 uint32_t rev;
224
225 if (pci_get_vendor(dev) == PCI_VENDOR_XILINX &&
226 pci_get_device(dev) == PCI_DEVICE_XILINX_HDSPE) {
227 rev = pci_get_revid(dev);
228 switch (rev) {
229 case PCI_REVISION_AIO:
230 device_set_desc(dev, "RME HDSPe AIO");
231 return 0;
232 case PCI_REVISION_RAYDAT:
233 device_set_desc(dev, "RME HDSPe RayDAT");
234 return 0;
235 }
236 }
237
238 return (ENXIO);
239 }
240
241 static int
hdspe_init(struct sc_info * sc)242 hdspe_init(struct sc_info *sc)
243 {
244 long long period;
245
246 /* Set defaults. */
247 sc->ctrl_register |= HDSPM_CLOCK_MODE_MASTER;
248
249 /* Set latency. */
250 sc->period = 32;
251 sc->ctrl_register = hdspe_encode_latency(7);
252
253 /* Set rate. */
254 sc->speed = HDSPE_SPEED_DEFAULT;
255 sc->ctrl_register &= ~HDSPE_FREQ_MASK;
256 sc->ctrl_register |= HDSPE_FREQ_MASK_DEFAULT;
257 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register);
258
259 switch (sc->type) {
260 case RAYDAT:
261 case AIO:
262 period = HDSPE_FREQ_AIO;
263 break;
264 default:
265 return (ENXIO);
266 }
267
268 /* Set DDS value. */
269 period /= sc->speed;
270 hdspe_write_4(sc, HDSPE_FREQ_REG, period);
271
272 /* Other settings. */
273 sc->settings_register = 0;
274 hdspe_write_4(sc, HDSPE_SETTINGS_REG, sc->settings_register);
275
276 return 0;
277 }
278
279 static int
hdspe_attach(device_t dev)280 hdspe_attach(device_t dev)
281 {
282 struct sc_info *sc;
283 struct sc_pcminfo *scp;
284 struct hdspe_channel *chan_map;
285 uint32_t rev;
286 int i, err;
287
288 #if 0
289 device_printf(dev, "hdspe_attach()\n");
290 #endif
291
292 sc = device_get_softc(dev);
293 sc->lock = snd_mtxcreate(device_get_nameunit(dev),
294 "snd_hdspe softc");
295 sc->dev = dev;
296
297 pci_enable_busmaster(dev);
298 rev = pci_get_revid(dev);
299 switch (rev) {
300 case PCI_REVISION_AIO:
301 sc->type = AIO;
302 chan_map = chan_map_aio;
303 break;
304 case PCI_REVISION_RAYDAT:
305 sc->type = RAYDAT;
306 chan_map = chan_map_rd;
307 break;
308 default:
309 return ENXIO;
310 }
311
312 /* Allocate resources. */
313 err = hdspe_alloc_resources(sc);
314 if (err) {
315 device_printf(dev, "Unable to allocate system resources.\n");
316 return ENXIO;
317 }
318
319 if (hdspe_init(sc) != 0)
320 return ENXIO;
321
322 for (i = 0; i < HDSPE_MAX_CHANS && chan_map[i].descr != NULL; i++) {
323 scp = kmalloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_WAITOK | M_ZERO);
324 scp->hc = &chan_map[i];
325 scp->sc = sc;
326 scp->dev = device_add_child(dev, "pcm", -1);
327 device_set_ivars(scp->dev, scp);
328 }
329
330 hdspe_map_dmabuf(sc);
331
332 return (bus_generic_attach(dev));
333 }
334
335 static void
hdspe_dmafree(struct sc_info * sc)336 hdspe_dmafree(struct sc_info *sc)
337 {
338
339 bus_dmamap_unload(sc->dmat, sc->rmap);
340 bus_dmamap_unload(sc->dmat, sc->pmap);
341 bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap);
342 bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap);
343 sc->rbuf = sc->pbuf = NULL;
344 }
345
346 static int
hdspe_detach(device_t dev)347 hdspe_detach(device_t dev)
348 {
349 struct sc_info *sc;
350 int err;
351
352 sc = device_get_softc(dev);
353 if (sc == NULL) {
354 device_printf(dev,"Can't detach: softc is null.\n");
355 return 0;
356 }
357
358 err = device_delete_children(dev);
359 if (err)
360 return (err);
361
362 hdspe_dmafree(sc);
363
364 if (sc->ih)
365 bus_teardown_intr(dev, sc->irq, sc->ih);
366 if (sc->dmat)
367 bus_dma_tag_destroy(sc->dmat);
368 if (sc->irq)
369 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
370 if (sc->cs)
371 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->cs);
372 if (sc->lock)
373 snd_mtxfree(sc->lock);
374
375 return 0;
376 }
377
378 static device_method_t hdspe_methods[] = {
379 DEVMETHOD(device_probe, hdspe_probe),
380 DEVMETHOD(device_attach, hdspe_attach),
381 DEVMETHOD(device_detach, hdspe_detach),
382 { 0, 0 }
383 };
384
385 static driver_t hdspe_driver = {
386 "hdspe",
387 hdspe_methods,
388 PCM_SOFTC_SIZE,
389 };
390
391 static devclass_t hdspe_devclass;
392
393 DRIVER_MODULE(snd_hdspe, pci, hdspe_driver, hdspe_devclass, NULL, NULL);
394