1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (c) 2015 Linaro Ltd.
4 * Copyright (c) 2015 Hisilicon Limited.
5 */
6
7 #include "hisi_sas.h"
8 #define DRV_NAME "hisi_sas"
9
10 #define DEV_IS_GONE(dev) \
11 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
12
13 static int hisi_sas_softreset_ata_disk(struct domain_device *device);
14 static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
15 void *funcdata);
16 static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
17 struct domain_device *device);
18 static void hisi_sas_dev_gone(struct domain_device *device);
19
20 struct hisi_sas_internal_abort_data {
21 bool rst_ha_timeout; /* reset the HA for timeout */
22 };
23
hisi_sas_get_ata_protocol(struct host_to_dev_fis * fis,int direction)24 u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
25 {
26 switch (fis->command) {
27 case ATA_CMD_FPDMA_WRITE:
28 case ATA_CMD_FPDMA_READ:
29 case ATA_CMD_FPDMA_RECV:
30 case ATA_CMD_FPDMA_SEND:
31 case ATA_CMD_NCQ_NON_DATA:
32 return HISI_SAS_SATA_PROTOCOL_FPDMA;
33
34 case ATA_CMD_DOWNLOAD_MICRO:
35 case ATA_CMD_ID_ATA:
36 case ATA_CMD_PMP_READ:
37 case ATA_CMD_READ_LOG_EXT:
38 case ATA_CMD_PIO_READ:
39 case ATA_CMD_PIO_READ_EXT:
40 case ATA_CMD_PMP_WRITE:
41 case ATA_CMD_WRITE_LOG_EXT:
42 case ATA_CMD_PIO_WRITE:
43 case ATA_CMD_PIO_WRITE_EXT:
44 return HISI_SAS_SATA_PROTOCOL_PIO;
45
46 case ATA_CMD_DSM:
47 case ATA_CMD_DOWNLOAD_MICRO_DMA:
48 case ATA_CMD_PMP_READ_DMA:
49 case ATA_CMD_PMP_WRITE_DMA:
50 case ATA_CMD_READ:
51 case ATA_CMD_READ_EXT:
52 case ATA_CMD_READ_LOG_DMA_EXT:
53 case ATA_CMD_READ_STREAM_DMA_EXT:
54 case ATA_CMD_TRUSTED_RCV_DMA:
55 case ATA_CMD_TRUSTED_SND_DMA:
56 case ATA_CMD_WRITE:
57 case ATA_CMD_WRITE_EXT:
58 case ATA_CMD_WRITE_FUA_EXT:
59 case ATA_CMD_WRITE_QUEUED:
60 case ATA_CMD_WRITE_LOG_DMA_EXT:
61 case ATA_CMD_WRITE_STREAM_DMA_EXT:
62 case ATA_CMD_ZAC_MGMT_IN:
63 return HISI_SAS_SATA_PROTOCOL_DMA;
64
65 case ATA_CMD_CHK_POWER:
66 case ATA_CMD_DEV_RESET:
67 case ATA_CMD_EDD:
68 case ATA_CMD_FLUSH:
69 case ATA_CMD_FLUSH_EXT:
70 case ATA_CMD_VERIFY:
71 case ATA_CMD_VERIFY_EXT:
72 case ATA_CMD_SET_FEATURES:
73 case ATA_CMD_STANDBY:
74 case ATA_CMD_STANDBYNOW1:
75 case ATA_CMD_ZAC_MGMT_OUT:
76 return HISI_SAS_SATA_PROTOCOL_NONDATA;
77
78 case ATA_CMD_SET_MAX:
79 switch (fis->features) {
80 case ATA_SET_MAX_PASSWD:
81 case ATA_SET_MAX_LOCK:
82 return HISI_SAS_SATA_PROTOCOL_PIO;
83
84 case ATA_SET_MAX_PASSWD_DMA:
85 case ATA_SET_MAX_UNLOCK_DMA:
86 return HISI_SAS_SATA_PROTOCOL_DMA;
87
88 default:
89 return HISI_SAS_SATA_PROTOCOL_NONDATA;
90 }
91
92 default:
93 {
94 if (direction == DMA_NONE)
95 return HISI_SAS_SATA_PROTOCOL_NONDATA;
96 return HISI_SAS_SATA_PROTOCOL_PIO;
97 }
98 }
99 }
100 EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
101
hisi_sas_sata_done(struct sas_task * task,struct hisi_sas_slot * slot)102 void hisi_sas_sata_done(struct sas_task *task,
103 struct hisi_sas_slot *slot)
104 {
105 struct task_status_struct *ts = &task->task_status;
106 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
107 struct hisi_sas_status_buffer *status_buf =
108 hisi_sas_status_buf_addr_mem(slot);
109 u8 *iu = &status_buf->iu[0];
110 struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
111
112 resp->frame_len = sizeof(struct dev_to_host_fis);
113 memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
114
115 ts->buf_valid_size = sizeof(*resp);
116 }
117 EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
118
119 /*
120 * This function assumes linkrate mask fits in 8 bits, which it
121 * does for all HW versions supported.
122 */
hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)123 u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
124 {
125 u8 rate = 0;
126 int i;
127
128 max -= SAS_LINK_RATE_1_5_GBPS;
129 for (i = 0; i <= max; i++)
130 rate |= 1 << (i * 2);
131 return rate;
132 }
133 EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
134
dev_to_hisi_hba(struct domain_device * device)135 static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
136 {
137 return device->port->ha->lldd_ha;
138 }
139
to_hisi_sas_port(struct asd_sas_port * sas_port)140 struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
141 {
142 return container_of(sas_port, struct hisi_sas_port, sas_port);
143 }
144 EXPORT_SYMBOL_GPL(to_hisi_sas_port);
145
hisi_sas_stop_phys(struct hisi_hba * hisi_hba)146 void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
147 {
148 int phy_no;
149
150 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
151 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
152 }
153 EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
154
hisi_sas_slot_index_clear(struct hisi_hba * hisi_hba,int slot_idx)155 static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
156 {
157 void *bitmap = hisi_hba->slot_index_tags;
158
159 __clear_bit(slot_idx, bitmap);
160 }
161
hisi_sas_slot_index_free(struct hisi_hba * hisi_hba,int slot_idx)162 static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
163 {
164 if (hisi_hba->hw->slot_index_alloc ||
165 slot_idx < HISI_SAS_RESERVED_IPTT) {
166 spin_lock(&hisi_hba->lock);
167 hisi_sas_slot_index_clear(hisi_hba, slot_idx);
168 spin_unlock(&hisi_hba->lock);
169 }
170 }
171
hisi_sas_slot_index_set(struct hisi_hba * hisi_hba,int slot_idx)172 static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
173 {
174 void *bitmap = hisi_hba->slot_index_tags;
175
176 __set_bit(slot_idx, bitmap);
177 }
178
hisi_sas_slot_index_alloc(struct hisi_hba * hisi_hba,struct request * rq)179 static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba,
180 struct request *rq)
181 {
182 int index;
183 void *bitmap = hisi_hba->slot_index_tags;
184
185 if (rq)
186 return rq->tag + HISI_SAS_RESERVED_IPTT;
187
188 spin_lock(&hisi_hba->lock);
189 index = find_next_zero_bit(bitmap, HISI_SAS_RESERVED_IPTT,
190 hisi_hba->last_slot_index + 1);
191 if (index >= HISI_SAS_RESERVED_IPTT) {
192 index = find_next_zero_bit(bitmap,
193 HISI_SAS_RESERVED_IPTT,
194 0);
195 if (index >= HISI_SAS_RESERVED_IPTT) {
196 spin_unlock(&hisi_hba->lock);
197 return -SAS_QUEUE_FULL;
198 }
199 }
200 hisi_sas_slot_index_set(hisi_hba, index);
201 hisi_hba->last_slot_index = index;
202 spin_unlock(&hisi_hba->lock);
203
204 return index;
205 }
206
hisi_sas_slot_task_free(struct hisi_hba * hisi_hba,struct sas_task * task,struct hisi_sas_slot * slot,bool need_lock)207 void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
208 struct hisi_sas_slot *slot, bool need_lock)
209 {
210 int device_id = slot->device_id;
211 struct hisi_sas_device *sas_dev = &hisi_hba->devices[device_id];
212
213 if (task) {
214 struct device *dev = hisi_hba->dev;
215
216 if (!task->lldd_task)
217 return;
218
219 task->lldd_task = NULL;
220
221 if (!sas_protocol_ata(task->task_proto)) {
222 if (slot->n_elem) {
223 if (task->task_proto & SAS_PROTOCOL_SSP)
224 dma_unmap_sg(dev, task->scatter,
225 task->num_scatter,
226 task->data_dir);
227 else
228 dma_unmap_sg(dev, &task->smp_task.smp_req,
229 1, DMA_TO_DEVICE);
230 }
231 if (slot->n_elem_dif) {
232 struct sas_ssp_task *ssp_task = &task->ssp_task;
233 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
234
235 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
236 scsi_prot_sg_count(scsi_cmnd),
237 task->data_dir);
238 }
239 }
240 }
241
242 if (need_lock) {
243 spin_lock(&sas_dev->lock);
244 list_del_init(&slot->entry);
245 spin_unlock(&sas_dev->lock);
246 } else {
247 list_del_init(&slot->entry);
248 }
249
250 memset(slot, 0, offsetof(struct hisi_sas_slot, buf));
251
252 hisi_sas_slot_index_free(hisi_hba, slot->idx);
253 }
254 EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
255
hisi_sas_task_prep_smp(struct hisi_hba * hisi_hba,struct hisi_sas_slot * slot)256 static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
257 struct hisi_sas_slot *slot)
258 {
259 hisi_hba->hw->prep_smp(hisi_hba, slot);
260 }
261
hisi_sas_task_prep_ssp(struct hisi_hba * hisi_hba,struct hisi_sas_slot * slot)262 static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
263 struct hisi_sas_slot *slot)
264 {
265 hisi_hba->hw->prep_ssp(hisi_hba, slot);
266 }
267
hisi_sas_task_prep_ata(struct hisi_hba * hisi_hba,struct hisi_sas_slot * slot)268 static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
269 struct hisi_sas_slot *slot)
270 {
271 hisi_hba->hw->prep_stp(hisi_hba, slot);
272 }
273
hisi_sas_task_prep_abort(struct hisi_hba * hisi_hba,struct hisi_sas_slot * slot)274 static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
275 struct hisi_sas_slot *slot)
276 {
277 hisi_hba->hw->prep_abort(hisi_hba, slot);
278 }
279
hisi_sas_dma_unmap(struct hisi_hba * hisi_hba,struct sas_task * task,int n_elem)280 static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba,
281 struct sas_task *task, int n_elem)
282 {
283 struct device *dev = hisi_hba->dev;
284
285 if (!sas_protocol_ata(task->task_proto) && n_elem) {
286 if (task->num_scatter) {
287 dma_unmap_sg(dev, task->scatter, task->num_scatter,
288 task->data_dir);
289 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
290 dma_unmap_sg(dev, &task->smp_task.smp_req,
291 1, DMA_TO_DEVICE);
292 }
293 }
294 }
295
hisi_sas_dma_map(struct hisi_hba * hisi_hba,struct sas_task * task,int * n_elem)296 static int hisi_sas_dma_map(struct hisi_hba *hisi_hba,
297 struct sas_task *task, int *n_elem)
298 {
299 struct device *dev = hisi_hba->dev;
300 int rc;
301
302 if (sas_protocol_ata(task->task_proto)) {
303 *n_elem = task->num_scatter;
304 } else {
305 unsigned int req_len;
306
307 if (task->num_scatter) {
308 *n_elem = dma_map_sg(dev, task->scatter,
309 task->num_scatter, task->data_dir);
310 if (!*n_elem) {
311 rc = -ENOMEM;
312 goto prep_out;
313 }
314 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
315 *n_elem = dma_map_sg(dev, &task->smp_task.smp_req,
316 1, DMA_TO_DEVICE);
317 if (!*n_elem) {
318 rc = -ENOMEM;
319 goto prep_out;
320 }
321 req_len = sg_dma_len(&task->smp_task.smp_req);
322 if (req_len & 0x3) {
323 rc = -EINVAL;
324 goto err_out_dma_unmap;
325 }
326 }
327 }
328
329 if (*n_elem > HISI_SAS_SGE_PAGE_CNT) {
330 dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT\n",
331 *n_elem);
332 rc = -EINVAL;
333 goto err_out_dma_unmap;
334 }
335 return 0;
336
337 err_out_dma_unmap:
338 /* It would be better to call dma_unmap_sg() here, but it's messy */
339 hisi_sas_dma_unmap(hisi_hba, task, *n_elem);
340 prep_out:
341 return rc;
342 }
343
hisi_sas_dif_dma_unmap(struct hisi_hba * hisi_hba,struct sas_task * task,int n_elem_dif)344 static void hisi_sas_dif_dma_unmap(struct hisi_hba *hisi_hba,
345 struct sas_task *task, int n_elem_dif)
346 {
347 struct device *dev = hisi_hba->dev;
348
349 if (n_elem_dif) {
350 struct sas_ssp_task *ssp_task = &task->ssp_task;
351 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
352
353 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
354 scsi_prot_sg_count(scsi_cmnd),
355 task->data_dir);
356 }
357 }
358
hisi_sas_dif_dma_map(struct hisi_hba * hisi_hba,int * n_elem_dif,struct sas_task * task)359 static int hisi_sas_dif_dma_map(struct hisi_hba *hisi_hba,
360 int *n_elem_dif, struct sas_task *task)
361 {
362 struct device *dev = hisi_hba->dev;
363 struct sas_ssp_task *ssp_task;
364 struct scsi_cmnd *scsi_cmnd;
365 int rc;
366
367 if (task->num_scatter) {
368 ssp_task = &task->ssp_task;
369 scsi_cmnd = ssp_task->cmd;
370
371 if (scsi_prot_sg_count(scsi_cmnd)) {
372 *n_elem_dif = dma_map_sg(dev,
373 scsi_prot_sglist(scsi_cmnd),
374 scsi_prot_sg_count(scsi_cmnd),
375 task->data_dir);
376
377 if (!*n_elem_dif)
378 return -ENOMEM;
379
380 if (*n_elem_dif > HISI_SAS_SGE_DIF_PAGE_CNT) {
381 dev_err(dev, "task prep: n_elem_dif(%d) too large\n",
382 *n_elem_dif);
383 rc = -EINVAL;
384 goto err_out_dif_dma_unmap;
385 }
386 }
387 }
388
389 return 0;
390
391 err_out_dif_dma_unmap:
392 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
393 scsi_prot_sg_count(scsi_cmnd), task->data_dir);
394 return rc;
395 }
396
397 static
hisi_sas_task_deliver(struct hisi_hba * hisi_hba,struct hisi_sas_slot * slot,struct hisi_sas_dq * dq,struct hisi_sas_device * sas_dev)398 void hisi_sas_task_deliver(struct hisi_hba *hisi_hba,
399 struct hisi_sas_slot *slot,
400 struct hisi_sas_dq *dq,
401 struct hisi_sas_device *sas_dev)
402 {
403 struct hisi_sas_cmd_hdr *cmd_hdr_base;
404 int dlvry_queue_slot, dlvry_queue;
405 struct sas_task *task = slot->task;
406 int wr_q_index;
407
408 spin_lock(&dq->lock);
409 wr_q_index = dq->wr_point;
410 dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
411 list_add_tail(&slot->delivery, &dq->list);
412 spin_unlock(&dq->lock);
413 spin_lock(&sas_dev->lock);
414 list_add_tail(&slot->entry, &sas_dev->list);
415 spin_unlock(&sas_dev->lock);
416
417 dlvry_queue = dq->id;
418 dlvry_queue_slot = wr_q_index;
419
420 slot->device_id = sas_dev->device_id;
421 slot->dlvry_queue = dlvry_queue;
422 slot->dlvry_queue_slot = dlvry_queue_slot;
423 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
424 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
425
426 task->lldd_task = slot;
427
428 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
429 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
430 memset(hisi_sas_status_buf_addr_mem(slot), 0,
431 sizeof(struct hisi_sas_err_record));
432
433 switch (task->task_proto) {
434 case SAS_PROTOCOL_SMP:
435 hisi_sas_task_prep_smp(hisi_hba, slot);
436 break;
437 case SAS_PROTOCOL_SSP:
438 hisi_sas_task_prep_ssp(hisi_hba, slot);
439 break;
440 case SAS_PROTOCOL_SATA:
441 case SAS_PROTOCOL_STP:
442 case SAS_PROTOCOL_STP_ALL:
443 hisi_sas_task_prep_ata(hisi_hba, slot);
444 break;
445 case SAS_PROTOCOL_INTERNAL_ABORT:
446 hisi_sas_task_prep_abort(hisi_hba, slot);
447 break;
448 default:
449 return;
450 }
451
452 /* Make slot memories observable before marking as ready */
453 smp_wmb();
454 WRITE_ONCE(slot->ready, 1);
455
456 spin_lock(&dq->lock);
457 hisi_hba->hw->start_delivery(dq);
458 spin_unlock(&dq->lock);
459 }
460
hisi_sas_queue_command(struct sas_task * task,gfp_t gfp_flags)461 static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
462 {
463 int n_elem = 0, n_elem_dif = 0;
464 struct domain_device *device = task->dev;
465 struct asd_sas_port *sas_port = device->port;
466 struct hisi_sas_device *sas_dev = device->lldd_dev;
467 bool internal_abort = sas_is_internal_abort(task);
468 struct hisi_sas_dq *dq = NULL;
469 struct hisi_sas_port *port;
470 struct hisi_hba *hisi_hba;
471 struct hisi_sas_slot *slot;
472 struct request *rq = NULL;
473 struct device *dev;
474 int rc;
475
476 if (!sas_port) {
477 struct task_status_struct *ts = &task->task_status;
478
479 ts->resp = SAS_TASK_UNDELIVERED;
480 ts->stat = SAS_PHY_DOWN;
481 /*
482 * libsas will use dev->port, should
483 * not call task_done for sata
484 */
485 if (device->dev_type != SAS_SATA_DEV && !internal_abort)
486 task->task_done(task);
487 return -ECOMM;
488 }
489
490 hisi_hba = dev_to_hisi_hba(device);
491 dev = hisi_hba->dev;
492
493 switch (task->task_proto) {
494 case SAS_PROTOCOL_SSP:
495 case SAS_PROTOCOL_SMP:
496 case SAS_PROTOCOL_SATA:
497 case SAS_PROTOCOL_STP:
498 case SAS_PROTOCOL_STP_ALL:
499 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) {
500 if (!gfpflags_allow_blocking(gfp_flags))
501 return -EINVAL;
502
503 down(&hisi_hba->sem);
504 up(&hisi_hba->sem);
505 }
506
507 if (DEV_IS_GONE(sas_dev)) {
508 if (sas_dev)
509 dev_info(dev, "task prep: device %d not ready\n",
510 sas_dev->device_id);
511 else
512 dev_info(dev, "task prep: device %016llx not ready\n",
513 SAS_ADDR(device->sas_addr));
514
515 return -ECOMM;
516 }
517
518 port = to_hisi_sas_port(sas_port);
519 if (!port->port_attached) {
520 dev_info(dev, "task prep: %s port%d not attach device\n",
521 dev_is_sata(device) ? "SATA/STP" : "SAS",
522 device->port->id);
523
524 return -ECOMM;
525 }
526
527 rq = sas_task_find_rq(task);
528 if (rq) {
529 unsigned int dq_index;
530 u32 blk_tag;
531
532 blk_tag = blk_mq_unique_tag(rq);
533 dq_index = blk_mq_unique_tag_to_hwq(blk_tag);
534 dq = &hisi_hba->dq[dq_index];
535 } else {
536 int queue;
537
538 if (hisi_hba->iopoll_q_cnt) {
539 /*
540 * Use interrupt queue (queue 0) to deliver and complete
541 * internal IOs of libsas or libata when there is at least
542 * one iopoll queue
543 */
544 queue = 0;
545 } else {
546 struct Scsi_Host *shost = hisi_hba->shost;
547 struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
548
549 queue = qmap->mq_map[raw_smp_processor_id()];
550 }
551 dq = &hisi_hba->dq[queue];
552 }
553 break;
554 case SAS_PROTOCOL_INTERNAL_ABORT:
555 if (!hisi_hba->hw->prep_abort)
556 return TMF_RESP_FUNC_FAILED;
557
558 if (test_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags))
559 return -EIO;
560
561 hisi_hba = dev_to_hisi_hba(device);
562
563 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
564 return -EINVAL;
565
566 port = to_hisi_sas_port(sas_port);
567 dq = &hisi_hba->dq[task->abort_task.qid];
568 break;
569 default:
570 dev_err(hisi_hba->dev, "task prep: unknown/unsupported proto (0x%x)\n",
571 task->task_proto);
572 return -EINVAL;
573 }
574
575 rc = hisi_sas_dma_map(hisi_hba, task, &n_elem);
576 if (rc < 0)
577 goto prep_out;
578
579 if (!sas_protocol_ata(task->task_proto)) {
580 rc = hisi_sas_dif_dma_map(hisi_hba, &n_elem_dif, task);
581 if (rc < 0)
582 goto err_out_dma_unmap;
583 }
584
585 if (!internal_abort && hisi_hba->hw->slot_index_alloc)
586 rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device);
587 else
588 rc = hisi_sas_slot_index_alloc(hisi_hba, rq);
589
590 if (rc < 0)
591 goto err_out_dif_dma_unmap;
592
593 slot = &hisi_hba->slot_info[rc];
594 slot->n_elem = n_elem;
595 slot->n_elem_dif = n_elem_dif;
596 slot->task = task;
597 slot->port = port;
598
599 slot->tmf = task->tmf;
600 slot->is_internal = !!task->tmf || internal_abort;
601
602 /* protect task_prep and start_delivery sequence */
603 hisi_sas_task_deliver(hisi_hba, slot, dq, sas_dev);
604
605 return 0;
606
607 err_out_dif_dma_unmap:
608 if (!sas_protocol_ata(task->task_proto))
609 hisi_sas_dif_dma_unmap(hisi_hba, task, n_elem_dif);
610 err_out_dma_unmap:
611 hisi_sas_dma_unmap(hisi_hba, task, n_elem);
612 prep_out:
613 dev_err(dev, "task exec: failed[%d]!\n", rc);
614 return rc;
615 }
616
hisi_sas_bytes_dmaed(struct hisi_hba * hisi_hba,int phy_no,gfp_t gfp_flags)617 static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no,
618 gfp_t gfp_flags)
619 {
620 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
621 struct asd_sas_phy *sas_phy = &phy->sas_phy;
622
623 if (!phy->phy_attached)
624 return;
625
626 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags);
627
628 if (sas_phy->phy) {
629 struct sas_phy *sphy = sas_phy->phy;
630
631 sphy->negotiated_linkrate = sas_phy->linkrate;
632 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
633 sphy->maximum_linkrate_hw =
634 hisi_hba->hw->phy_get_max_linkrate();
635 if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
636 sphy->minimum_linkrate = phy->minimum_linkrate;
637
638 if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
639 sphy->maximum_linkrate = phy->maximum_linkrate;
640 }
641
642 if (phy->phy_type & PORT_TYPE_SAS) {
643 struct sas_identify_frame *id;
644
645 id = (struct sas_identify_frame *)phy->frame_rcvd;
646 id->dev_type = phy->identify.device_type;
647 id->initiator_bits = SAS_PROTOCOL_ALL;
648 id->target_bits = phy->identify.target_port_protocols;
649 } else if (phy->phy_type & PORT_TYPE_SATA) {
650 /* Nothing */
651 }
652
653 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
654 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
655 }
656
hisi_sas_alloc_dev(struct domain_device * device)657 static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
658 {
659 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
660 struct hisi_sas_device *sas_dev = NULL;
661 int last = hisi_hba->last_dev_id;
662 int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES;
663 int i;
664
665 spin_lock(&hisi_hba->lock);
666 for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) {
667 if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
668 int queue = i % hisi_hba->queue_count;
669 struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
670
671 hisi_hba->devices[i].device_id = i;
672 sas_dev = &hisi_hba->devices[i];
673 sas_dev->dev_status = HISI_SAS_DEV_INIT;
674 sas_dev->dev_type = device->dev_type;
675 sas_dev->hisi_hba = hisi_hba;
676 sas_dev->sas_device = device;
677 sas_dev->dq = dq;
678 spin_lock_init(&sas_dev->lock);
679 INIT_LIST_HEAD(&hisi_hba->devices[i].list);
680 break;
681 }
682 i++;
683 }
684 hisi_hba->last_dev_id = i;
685 spin_unlock(&hisi_hba->lock);
686
687 return sas_dev;
688 }
689
hisi_sas_sync_poll_cq(struct hisi_sas_cq * cq)690 static void hisi_sas_sync_poll_cq(struct hisi_sas_cq *cq)
691 {
692 /* make sure CQ entries being processed are processed to completion */
693 spin_lock(&cq->poll_lock);
694 spin_unlock(&cq->poll_lock);
695 }
696
hisi_sas_queue_is_poll(struct hisi_sas_cq * cq)697 static bool hisi_sas_queue_is_poll(struct hisi_sas_cq *cq)
698 {
699 struct hisi_hba *hisi_hba = cq->hisi_hba;
700
701 if (cq->id < hisi_hba->queue_count - hisi_hba->iopoll_q_cnt)
702 return false;
703 return true;
704 }
705
hisi_sas_sync_cq(struct hisi_sas_cq * cq)706 static void hisi_sas_sync_cq(struct hisi_sas_cq *cq)
707 {
708 if (hisi_sas_queue_is_poll(cq))
709 hisi_sas_sync_poll_cq(cq);
710 else
711 synchronize_irq(cq->irq_no);
712 }
713
hisi_sas_sync_poll_cqs(struct hisi_hba * hisi_hba)714 void hisi_sas_sync_poll_cqs(struct hisi_hba *hisi_hba)
715 {
716 int i;
717
718 for (i = 0; i < hisi_hba->queue_count; i++) {
719 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
720
721 if (hisi_sas_queue_is_poll(cq))
722 hisi_sas_sync_poll_cq(cq);
723 }
724 }
725 EXPORT_SYMBOL_GPL(hisi_sas_sync_poll_cqs);
726
hisi_sas_sync_cqs(struct hisi_hba * hisi_hba)727 void hisi_sas_sync_cqs(struct hisi_hba *hisi_hba)
728 {
729 int i;
730
731 for (i = 0; i < hisi_hba->queue_count; i++) {
732 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
733
734 hisi_sas_sync_cq(cq);
735 }
736 }
737 EXPORT_SYMBOL_GPL(hisi_sas_sync_cqs);
738
hisi_sas_tmf_aborted(struct sas_task * task)739 static void hisi_sas_tmf_aborted(struct sas_task *task)
740 {
741 struct hisi_sas_slot *slot = task->lldd_task;
742 struct domain_device *device = task->dev;
743 struct hisi_sas_device *sas_dev = device->lldd_dev;
744 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
745
746 if (slot) {
747 struct hisi_sas_cq *cq =
748 &hisi_hba->cq[slot->dlvry_queue];
749 /*
750 * sync irq or poll queue to avoid free'ing task
751 * before using task in IO completion
752 */
753 hisi_sas_sync_cq(cq);
754 slot->task = NULL;
755 }
756 }
757
758 #define HISI_SAS_DISK_RECOVER_CNT 3
hisi_sas_init_device(struct domain_device * device)759 static int hisi_sas_init_device(struct domain_device *device)
760 {
761 int rc = TMF_RESP_FUNC_COMPLETE;
762 struct scsi_lun lun;
763 int retry = HISI_SAS_DISK_RECOVER_CNT;
764 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
765
766 switch (device->dev_type) {
767 case SAS_END_DEVICE:
768 int_to_scsilun(0, &lun);
769
770 while (retry-- > 0) {
771 rc = sas_abort_task_set(device, lun.scsi_lun);
772 if (rc == TMF_RESP_FUNC_COMPLETE) {
773 hisi_sas_release_task(hisi_hba, device);
774 break;
775 }
776 }
777 break;
778 case SAS_SATA_DEV:
779 case SAS_SATA_PM:
780 case SAS_SATA_PM_PORT:
781 case SAS_SATA_PENDING:
782 /*
783 * If an expander is swapped when a SATA disk is attached then
784 * we should issue a hard reset to clear previous affiliation
785 * of STP target port, see SPL (chapter 6.19.4).
786 *
787 * However we don't need to issue a hard reset here for these
788 * reasons:
789 * a. When probing the device, libsas/libata already issues a
790 * hard reset in sas_probe_sata() -> ata_port_probe().
791 * Note that in hisi_sas_debug_I_T_nexus_reset() we take care
792 * to issue a hard reset by checking the dev status (== INIT).
793 * b. When resetting the controller, this is simply unnecessary.
794 */
795 while (retry-- > 0) {
796 rc = hisi_sas_softreset_ata_disk(device);
797 if (!rc)
798 break;
799 }
800 break;
801 default:
802 break;
803 }
804
805 return rc;
806 }
807
hisi_sas_slave_alloc(struct scsi_device * sdev)808 int hisi_sas_slave_alloc(struct scsi_device *sdev)
809 {
810 struct domain_device *ddev = sdev_to_domain_dev(sdev);
811 struct hisi_sas_device *sas_dev = ddev->lldd_dev;
812 int rc;
813
814 rc = sas_slave_alloc(sdev);
815 if (rc)
816 return rc;
817
818 rc = hisi_sas_init_device(ddev);
819 if (rc)
820 return rc;
821 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
822 return 0;
823 }
824 EXPORT_SYMBOL_GPL(hisi_sas_slave_alloc);
825
hisi_sas_dev_found(struct domain_device * device)826 static int hisi_sas_dev_found(struct domain_device *device)
827 {
828 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
829 struct domain_device *parent_dev = device->parent;
830 struct hisi_sas_device *sas_dev;
831 struct device *dev = hisi_hba->dev;
832 int rc;
833
834 if (hisi_hba->hw->alloc_dev)
835 sas_dev = hisi_hba->hw->alloc_dev(device);
836 else
837 sas_dev = hisi_sas_alloc_dev(device);
838 if (!sas_dev) {
839 dev_err(dev, "fail alloc dev: max support %d devices\n",
840 HISI_SAS_MAX_DEVICES);
841 return -EINVAL;
842 }
843
844 device->lldd_dev = sas_dev;
845 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
846
847 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
848 int phy_no;
849
850 phy_no = sas_find_attached_phy_id(&parent_dev->ex_dev, device);
851 if (phy_no < 0) {
852 dev_info(dev, "dev found: no attached "
853 "dev:%016llx at ex:%016llx\n",
854 SAS_ADDR(device->sas_addr),
855 SAS_ADDR(parent_dev->sas_addr));
856 rc = phy_no;
857 goto err_out;
858 }
859 }
860
861 dev_info(dev, "dev[%d:%x] found\n",
862 sas_dev->device_id, sas_dev->dev_type);
863
864 return 0;
865
866 err_out:
867 hisi_sas_dev_gone(device);
868 return rc;
869 }
870
hisi_sas_device_configure(struct scsi_device * sdev,struct queue_limits * lim)871 int hisi_sas_device_configure(struct scsi_device *sdev,
872 struct queue_limits *lim)
873 {
874 struct domain_device *dev = sdev_to_domain_dev(sdev);
875 int ret = sas_device_configure(sdev, lim);
876
877 if (ret)
878 return ret;
879 if (!dev_is_sata(dev))
880 sas_change_queue_depth(sdev, 64);
881
882 return 0;
883 }
884 EXPORT_SYMBOL_GPL(hisi_sas_device_configure);
885
hisi_sas_scan_start(struct Scsi_Host * shost)886 void hisi_sas_scan_start(struct Scsi_Host *shost)
887 {
888 struct hisi_hba *hisi_hba = shost_priv(shost);
889
890 hisi_hba->hw->phys_init(hisi_hba);
891 }
892 EXPORT_SYMBOL_GPL(hisi_sas_scan_start);
893
hisi_sas_scan_finished(struct Scsi_Host * shost,unsigned long time)894 int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
895 {
896 struct hisi_hba *hisi_hba = shost_priv(shost);
897 struct sas_ha_struct *sha = &hisi_hba->sha;
898
899 /* Wait for PHY up interrupt to occur */
900 if (time < HZ)
901 return 0;
902
903 sas_drain_work(sha);
904 return 1;
905 }
906 EXPORT_SYMBOL_GPL(hisi_sas_scan_finished);
907
hisi_sas_phyup_work_common(struct work_struct * work,enum hisi_sas_phy_event event)908 static void hisi_sas_phyup_work_common(struct work_struct *work,
909 enum hisi_sas_phy_event event)
910 {
911 struct hisi_sas_phy *phy =
912 container_of(work, typeof(*phy), works[event]);
913 struct hisi_hba *hisi_hba = phy->hisi_hba;
914 struct asd_sas_phy *sas_phy = &phy->sas_phy;
915 int phy_no = sas_phy->id;
916
917 phy->wait_phyup_cnt = 0;
918 if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
919 hisi_hba->hw->sl_notify_ssp(hisi_hba, phy_no);
920 hisi_sas_bytes_dmaed(hisi_hba, phy_no, GFP_KERNEL);
921 }
922
hisi_sas_phyup_work(struct work_struct * work)923 static void hisi_sas_phyup_work(struct work_struct *work)
924 {
925 hisi_sas_phyup_work_common(work, HISI_PHYE_PHY_UP);
926 }
927
hisi_sas_linkreset_work(struct work_struct * work)928 static void hisi_sas_linkreset_work(struct work_struct *work)
929 {
930 struct hisi_sas_phy *phy =
931 container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
932 struct asd_sas_phy *sas_phy = &phy->sas_phy;
933
934 hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
935 }
936
hisi_sas_phyup_pm_work(struct work_struct * work)937 static void hisi_sas_phyup_pm_work(struct work_struct *work)
938 {
939 struct hisi_sas_phy *phy =
940 container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP_PM]);
941 struct hisi_hba *hisi_hba = phy->hisi_hba;
942 struct device *dev = hisi_hba->dev;
943
944 hisi_sas_phyup_work_common(work, HISI_PHYE_PHY_UP_PM);
945 pm_runtime_put_sync(dev);
946 }
947
948 static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
949 [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
950 [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
951 [HISI_PHYE_PHY_UP_PM] = hisi_sas_phyup_pm_work,
952 };
953
hisi_sas_notify_phy_event(struct hisi_sas_phy * phy,enum hisi_sas_phy_event event)954 bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
955 enum hisi_sas_phy_event event)
956 {
957 struct hisi_hba *hisi_hba = phy->hisi_hba;
958
959 if (WARN_ON(event >= HISI_PHYES_NUM))
960 return false;
961
962 return queue_work(hisi_hba->wq, &phy->works[event]);
963 }
964 EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
965
hisi_sas_wait_phyup_timedout(struct timer_list * t)966 static void hisi_sas_wait_phyup_timedout(struct timer_list *t)
967 {
968 struct hisi_sas_phy *phy = from_timer(phy, t, timer);
969 struct hisi_hba *hisi_hba = phy->hisi_hba;
970 struct device *dev = hisi_hba->dev;
971 int phy_no = phy->sas_phy.id;
972
973 dev_warn(dev, "phy%d wait phyup timeout, issuing link reset\n", phy_no);
974 hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET);
975 }
976
977 #define HISI_SAS_WAIT_PHYUP_RETRIES 10
978
hisi_sas_phy_oob_ready(struct hisi_hba * hisi_hba,int phy_no)979 void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no)
980 {
981 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
982 struct device *dev = hisi_hba->dev;
983 unsigned long flags;
984
985 dev_dbg(dev, "phy%d OOB ready\n", phy_no);
986 spin_lock_irqsave(&phy->lock, flags);
987 if (phy->phy_attached) {
988 spin_unlock_irqrestore(&phy->lock, flags);
989 return;
990 }
991
992 if (!timer_pending(&phy->timer)) {
993 if (phy->wait_phyup_cnt < HISI_SAS_WAIT_PHYUP_RETRIES) {
994 phy->wait_phyup_cnt++;
995 phy->timer.expires = jiffies +
996 HISI_SAS_WAIT_PHYUP_TIMEOUT;
997 add_timer(&phy->timer);
998 spin_unlock_irqrestore(&phy->lock, flags);
999 return;
1000 }
1001
1002 dev_warn(dev, "phy%d failed to come up %d times, giving up\n",
1003 phy_no, phy->wait_phyup_cnt);
1004 phy->wait_phyup_cnt = 0;
1005 }
1006 spin_unlock_irqrestore(&phy->lock, flags);
1007 }
1008
1009 EXPORT_SYMBOL_GPL(hisi_sas_phy_oob_ready);
1010
hisi_sas_phy_init(struct hisi_hba * hisi_hba,int phy_no)1011 static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
1012 {
1013 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1014 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1015 int i;
1016
1017 phy->hisi_hba = hisi_hba;
1018 phy->port = NULL;
1019 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
1020 phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
1021 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
1022 sas_phy->iproto = SAS_PROTOCOL_ALL;
1023 sas_phy->tproto = 0;
1024 sas_phy->role = PHY_ROLE_INITIATOR;
1025 sas_phy->oob_mode = OOB_NOT_CONNECTED;
1026 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
1027 sas_phy->id = phy_no;
1028 sas_phy->sas_addr = &hisi_hba->sas_addr[0];
1029 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
1030 sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
1031 sas_phy->lldd_phy = phy;
1032
1033 for (i = 0; i < HISI_PHYES_NUM; i++)
1034 INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
1035
1036 spin_lock_init(&phy->lock);
1037
1038 timer_setup(&phy->timer, hisi_sas_wait_phyup_timedout, 0);
1039 }
1040
1041 /* Wrapper to ensure we track hisi_sas_phy.enable properly */
hisi_sas_phy_enable(struct hisi_hba * hisi_hba,int phy_no,int enable)1042 void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, int enable)
1043 {
1044 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1045 struct asd_sas_phy *aphy = &phy->sas_phy;
1046 struct sas_phy *sphy = aphy->phy;
1047 unsigned long flags;
1048
1049 spin_lock_irqsave(&phy->lock, flags);
1050
1051 if (enable) {
1052 /* We may have been enabled already; if so, don't touch */
1053 if (!phy->enable)
1054 sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
1055 hisi_hba->hw->phy_start(hisi_hba, phy_no);
1056 } else {
1057 sphy->negotiated_linkrate = SAS_PHY_DISABLED;
1058 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
1059 }
1060 phy->enable = enable;
1061 spin_unlock_irqrestore(&phy->lock, flags);
1062 }
1063 EXPORT_SYMBOL_GPL(hisi_sas_phy_enable);
1064
hisi_sas_port_notify_formed(struct asd_sas_phy * sas_phy)1065 static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
1066 {
1067 struct hisi_sas_phy *phy = sas_phy->lldd_phy;
1068 struct asd_sas_port *sas_port = sas_phy->port;
1069 struct hisi_sas_port *port;
1070
1071 if (!sas_port)
1072 return;
1073
1074 port = to_hisi_sas_port(sas_port);
1075 port->port_attached = 1;
1076 port->id = phy->port_id;
1077 phy->port = port;
1078 sas_port->lldd_port = port;
1079 }
1080
hisi_sas_do_release_task(struct hisi_hba * hisi_hba,struct sas_task * task,struct hisi_sas_slot * slot,bool need_lock)1081 static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
1082 struct hisi_sas_slot *slot, bool need_lock)
1083 {
1084 if (task) {
1085 unsigned long flags;
1086 struct task_status_struct *ts;
1087
1088 ts = &task->task_status;
1089
1090 ts->resp = SAS_TASK_COMPLETE;
1091 ts->stat = SAS_ABORTED_TASK;
1092 spin_lock_irqsave(&task->task_state_lock, flags);
1093 task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
1094 if (!slot->is_internal && task->task_proto != SAS_PROTOCOL_SMP)
1095 task->task_state_flags |= SAS_TASK_STATE_DONE;
1096 spin_unlock_irqrestore(&task->task_state_lock, flags);
1097 }
1098
1099 hisi_sas_slot_task_free(hisi_hba, task, slot, need_lock);
1100 }
1101
hisi_sas_release_task(struct hisi_hba * hisi_hba,struct domain_device * device)1102 static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
1103 struct domain_device *device)
1104 {
1105 struct hisi_sas_slot *slot, *slot2;
1106 struct hisi_sas_device *sas_dev = device->lldd_dev;
1107
1108 spin_lock(&sas_dev->lock);
1109 list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
1110 hisi_sas_do_release_task(hisi_hba, slot->task, slot, false);
1111
1112 spin_unlock(&sas_dev->lock);
1113 }
1114
hisi_sas_release_tasks(struct hisi_hba * hisi_hba)1115 void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
1116 {
1117 struct hisi_sas_device *sas_dev;
1118 struct domain_device *device;
1119 int i;
1120
1121 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1122 sas_dev = &hisi_hba->devices[i];
1123 device = sas_dev->sas_device;
1124
1125 if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
1126 !device)
1127 continue;
1128
1129 hisi_sas_release_task(hisi_hba, device);
1130 }
1131 }
1132 EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
1133
hisi_sas_dereg_device(struct hisi_hba * hisi_hba,struct domain_device * device)1134 static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
1135 struct domain_device *device)
1136 {
1137 if (hisi_hba->hw->dereg_device)
1138 hisi_hba->hw->dereg_device(hisi_hba, device);
1139 }
1140
1141 static int
hisi_sas_internal_task_abort_dev(struct hisi_sas_device * sas_dev,bool rst_ha_timeout)1142 hisi_sas_internal_task_abort_dev(struct hisi_sas_device *sas_dev,
1143 bool rst_ha_timeout)
1144 {
1145 struct hisi_sas_internal_abort_data data = { rst_ha_timeout };
1146 struct domain_device *device = sas_dev->sas_device;
1147 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
1148 int i, rc;
1149
1150 for (i = 0; i < hisi_hba->cq_nvecs; i++) {
1151 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
1152 const struct cpumask *mask = cq->irq_mask;
1153
1154 if (mask && !cpumask_intersects(cpu_online_mask, mask))
1155 continue;
1156 rc = sas_execute_internal_abort_dev(device, i, &data);
1157 if (rc)
1158 return rc;
1159 }
1160
1161 return 0;
1162 }
1163
hisi_sas_dev_gone(struct domain_device * device)1164 static void hisi_sas_dev_gone(struct domain_device *device)
1165 {
1166 struct hisi_sas_device *sas_dev = device->lldd_dev;
1167 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1168 struct device *dev = hisi_hba->dev;
1169 int ret = 0;
1170
1171 dev_info(dev, "dev[%d:%x] is gone\n",
1172 sas_dev->device_id, sas_dev->dev_type);
1173
1174 down(&hisi_hba->sem);
1175 if (!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags)) {
1176 hisi_sas_internal_task_abort_dev(sas_dev, true);
1177
1178 hisi_sas_dereg_device(hisi_hba, device);
1179
1180 ret = hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
1181 device->lldd_dev = NULL;
1182 }
1183
1184 if (hisi_hba->hw->free_device)
1185 hisi_hba->hw->free_device(sas_dev);
1186
1187 /* Don't mark it as SAS_PHY_UNUSED if failed to clear ITCT */
1188 if (!ret)
1189 sas_dev->dev_type = SAS_PHY_UNUSED;
1190 sas_dev->sas_device = NULL;
1191 up(&hisi_hba->sem);
1192 }
1193
hisi_sas_phy_set_linkrate(struct hisi_hba * hisi_hba,int phy_no,struct sas_phy_linkrates * r)1194 static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no,
1195 struct sas_phy_linkrates *r)
1196 {
1197 struct sas_phy_linkrates _r;
1198
1199 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1200 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1201 enum sas_linkrate min, max;
1202
1203 if (r->minimum_linkrate > SAS_LINK_RATE_1_5_GBPS)
1204 return -EINVAL;
1205
1206 if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1207 max = sas_phy->phy->maximum_linkrate;
1208 min = r->minimum_linkrate;
1209 } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1210 max = r->maximum_linkrate;
1211 min = sas_phy->phy->minimum_linkrate;
1212 } else
1213 return -EINVAL;
1214
1215 _r.maximum_linkrate = max;
1216 _r.minimum_linkrate = min;
1217
1218 sas_phy->phy->maximum_linkrate = max;
1219 sas_phy->phy->minimum_linkrate = min;
1220
1221 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
1222 msleep(100);
1223 hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);
1224 hisi_sas_phy_enable(hisi_hba, phy_no, 1);
1225
1226 return 0;
1227 }
1228
hisi_sas_control_phy(struct asd_sas_phy * sas_phy,enum phy_func func,void * funcdata)1229 static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
1230 void *funcdata)
1231 {
1232 struct hisi_sas_phy *phy = container_of(sas_phy,
1233 struct hisi_sas_phy, sas_phy);
1234 struct sas_ha_struct *sas_ha = sas_phy->ha;
1235 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
1236 struct device *dev = hisi_hba->dev;
1237 DECLARE_COMPLETION_ONSTACK(completion);
1238 int phy_no = sas_phy->id;
1239 u8 sts = phy->phy_attached;
1240 int ret = 0;
1241
1242 down(&hisi_hba->sem);
1243 phy->reset_completion = &completion;
1244
1245 switch (func) {
1246 case PHY_FUNC_HARD_RESET:
1247 hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
1248 break;
1249
1250 case PHY_FUNC_LINK_RESET:
1251 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
1252 msleep(100);
1253 hisi_sas_phy_enable(hisi_hba, phy_no, 1);
1254 break;
1255
1256 case PHY_FUNC_DISABLE:
1257 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
1258 goto out;
1259
1260 case PHY_FUNC_SET_LINK_RATE:
1261 ret = hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata);
1262 break;
1263
1264 case PHY_FUNC_GET_EVENTS:
1265 if (hisi_hba->hw->get_events) {
1266 hisi_hba->hw->get_events(hisi_hba, phy_no);
1267 goto out;
1268 }
1269 fallthrough;
1270 case PHY_FUNC_RELEASE_SPINUP_HOLD:
1271 default:
1272 ret = -EOPNOTSUPP;
1273 goto out;
1274 }
1275
1276 if (sts && !wait_for_completion_timeout(&completion,
1277 HISI_SAS_WAIT_PHYUP_TIMEOUT)) {
1278 dev_warn(dev, "phy%d wait phyup timed out for func %d\n",
1279 phy_no, func);
1280 if (phy->in_reset)
1281 ret = -ETIMEDOUT;
1282 }
1283
1284 out:
1285 phy->reset_completion = NULL;
1286
1287 up(&hisi_hba->sem);
1288 return ret;
1289 }
1290
hisi_sas_fill_ata_reset_cmd(struct ata_device * dev,bool reset,int pmp,u8 * fis)1291 static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
1292 bool reset, int pmp, u8 *fis)
1293 {
1294 struct ata_taskfile tf;
1295
1296 ata_tf_init(dev, &tf);
1297 if (reset)
1298 tf.ctl |= ATA_SRST;
1299 else
1300 tf.ctl &= ~ATA_SRST;
1301 tf.command = ATA_CMD_DEV_RESET;
1302 ata_tf_to_fis(&tf, pmp, 0, fis);
1303 }
1304
hisi_sas_softreset_ata_disk(struct domain_device * device)1305 static int hisi_sas_softreset_ata_disk(struct domain_device *device)
1306 {
1307 u8 fis[20] = {0};
1308 struct ata_port *ap = device->sata_dev.ap;
1309 struct ata_link *link;
1310 int rc = TMF_RESP_FUNC_FAILED;
1311 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1312 struct device *dev = hisi_hba->dev;
1313
1314 ata_for_each_link(link, ap, EDGE) {
1315 int pmp = sata_srst_pmp(link);
1316
1317 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1318 rc = sas_execute_ata_cmd(device, fis, -1);
1319 if (rc != TMF_RESP_FUNC_COMPLETE)
1320 break;
1321 }
1322
1323 if (rc == TMF_RESP_FUNC_COMPLETE) {
1324 ata_for_each_link(link, ap, EDGE) {
1325 int pmp = sata_srst_pmp(link);
1326
1327 hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
1328 rc = sas_execute_ata_cmd(device, fis, -1);
1329 if (rc != TMF_RESP_FUNC_COMPLETE)
1330 dev_err(dev, "ata disk %016llx de-reset failed\n",
1331 SAS_ADDR(device->sas_addr));
1332 }
1333 } else {
1334 dev_err(dev, "ata disk %016llx reset failed\n",
1335 SAS_ADDR(device->sas_addr));
1336 }
1337
1338 if (rc == TMF_RESP_FUNC_COMPLETE)
1339 hisi_sas_release_task(hisi_hba, device);
1340
1341 return rc;
1342 }
1343
hisi_sas_refresh_port_id(struct hisi_hba * hisi_hba)1344 static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
1345 {
1346 u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
1347 int i;
1348
1349 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1350 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1351 struct domain_device *device = sas_dev->sas_device;
1352 struct asd_sas_port *sas_port;
1353 struct hisi_sas_port *port;
1354 struct hisi_sas_phy *phy = NULL;
1355 struct asd_sas_phy *sas_phy;
1356
1357 if ((sas_dev->dev_type == SAS_PHY_UNUSED)
1358 || !device || !device->port)
1359 continue;
1360
1361 sas_port = device->port;
1362 port = to_hisi_sas_port(sas_port);
1363
1364 spin_lock(&sas_port->phy_list_lock);
1365 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
1366 if (state & BIT(sas_phy->id)) {
1367 phy = sas_phy->lldd_phy;
1368 break;
1369 }
1370 spin_unlock(&sas_port->phy_list_lock);
1371
1372 if (phy) {
1373 port->id = phy->port_id;
1374
1375 /* Update linkrate of directly attached device. */
1376 if (!device->parent)
1377 device->linkrate = phy->sas_phy.linkrate;
1378
1379 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
1380 } else if (!port->port_attached)
1381 port->id = 0xff;
1382 }
1383 }
1384
hisi_sas_rescan_topology(struct hisi_hba * hisi_hba,u32 state)1385 static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state)
1386 {
1387 struct asd_sas_port *_sas_port = NULL;
1388 int phy_no;
1389
1390 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
1391 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1392 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1393 struct asd_sas_port *sas_port = sas_phy->port;
1394 bool do_port_check = _sas_port != sas_port;
1395
1396 if (!sas_phy->phy->enabled)
1397 continue;
1398
1399 /* Report PHY state change to libsas */
1400 if (state & BIT(phy_no)) {
1401 if (do_port_check && sas_port && sas_port->port_dev) {
1402 struct domain_device *dev = sas_port->port_dev;
1403
1404 _sas_port = sas_port;
1405
1406 if (dev_is_expander(dev->dev_type))
1407 sas_notify_port_event(sas_phy,
1408 PORTE_BROADCAST_RCVD,
1409 GFP_KERNEL);
1410 }
1411 } else {
1412 hisi_sas_phy_down(hisi_hba, phy_no, 0, GFP_KERNEL);
1413 }
1414 }
1415 }
1416
hisi_sas_reset_init_all_devices(struct hisi_hba * hisi_hba)1417 static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
1418 {
1419 struct hisi_sas_device *sas_dev;
1420 struct domain_device *device;
1421 int i;
1422
1423 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1424 sas_dev = &hisi_hba->devices[i];
1425 device = sas_dev->sas_device;
1426
1427 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1428 continue;
1429
1430 hisi_sas_init_device(device);
1431 }
1432 }
1433
hisi_sas_send_ata_reset_each_phy(struct hisi_hba * hisi_hba,struct asd_sas_port * sas_port,struct domain_device * device)1434 static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba,
1435 struct asd_sas_port *sas_port,
1436 struct domain_device *device)
1437 {
1438 struct ata_port *ap = device->sata_dev.ap;
1439 struct device *dev = hisi_hba->dev;
1440 int rc = TMF_RESP_FUNC_FAILED;
1441 struct ata_link *link;
1442 u8 fis[20] = {0};
1443 int i;
1444
1445 for (i = 0; i < hisi_hba->n_phy; i++) {
1446 if (!(sas_port->phy_mask & BIT(i)))
1447 continue;
1448
1449 ata_for_each_link(link, ap, EDGE) {
1450 int pmp = sata_srst_pmp(link);
1451
1452 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1453 rc = sas_execute_ata_cmd(device, fis, i);
1454 if (rc != TMF_RESP_FUNC_COMPLETE) {
1455 dev_err(dev, "phy%d ata reset failed rc=%d\n",
1456 i, rc);
1457 break;
1458 }
1459 }
1460 }
1461 }
1462
hisi_sas_terminate_stp_reject(struct hisi_hba * hisi_hba)1463 static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba)
1464 {
1465 struct device *dev = hisi_hba->dev;
1466 int port_no, rc, i;
1467
1468 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1469 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1470 struct domain_device *device = sas_dev->sas_device;
1471
1472 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1473 continue;
1474
1475 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
1476 if (rc < 0)
1477 dev_err(dev, "STP reject: abort dev failed %d\n", rc);
1478 }
1479
1480 for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) {
1481 struct hisi_sas_port *port = &hisi_hba->port[port_no];
1482 struct asd_sas_port *sas_port = &port->sas_port;
1483 struct domain_device *port_dev = sas_port->port_dev;
1484 struct domain_device *device;
1485
1486 if (!port_dev || !dev_is_expander(port_dev->dev_type))
1487 continue;
1488
1489 /* Try to find a SATA device */
1490 list_for_each_entry(device, &sas_port->dev_list,
1491 dev_list_node) {
1492 if (dev_is_sata(device)) {
1493 hisi_sas_send_ata_reset_each_phy(hisi_hba,
1494 sas_port,
1495 device);
1496 break;
1497 }
1498 }
1499 }
1500 }
1501
hisi_sas_controller_reset_prepare(struct hisi_hba * hisi_hba)1502 void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba)
1503 {
1504 struct Scsi_Host *shost = hisi_hba->shost;
1505
1506 hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba);
1507
1508 scsi_block_requests(shost);
1509 hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);
1510
1511 /*
1512 * hisi_hba->timer is only used for v1/v2 hw, and check hw->sht
1513 * which is also only used for v1/v2 hw to skip it for v3 hw
1514 */
1515 if (hisi_hba->hw->sht)
1516 del_timer_sync(&hisi_hba->timer);
1517
1518 set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1519 }
1520 EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare);
1521
hisi_sas_async_init_wait_phyup(void * data,async_cookie_t cookie)1522 static void hisi_sas_async_init_wait_phyup(void *data, async_cookie_t cookie)
1523 {
1524 struct hisi_sas_phy *phy = data;
1525 struct hisi_hba *hisi_hba = phy->hisi_hba;
1526 struct device *dev = hisi_hba->dev;
1527 DECLARE_COMPLETION_ONSTACK(completion);
1528 int phy_no = phy->sas_phy.id;
1529
1530 phy->reset_completion = &completion;
1531 hisi_sas_phy_enable(hisi_hba, phy_no, 1);
1532 if (!wait_for_completion_timeout(&completion,
1533 HISI_SAS_WAIT_PHYUP_TIMEOUT))
1534 dev_warn(dev, "phy%d wait phyup timed out\n", phy_no);
1535
1536 phy->reset_completion = NULL;
1537 }
1538
hisi_sas_controller_reset_done(struct hisi_hba * hisi_hba)1539 void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba)
1540 {
1541 struct Scsi_Host *shost = hisi_hba->shost;
1542 ASYNC_DOMAIN_EXCLUSIVE(async);
1543 int phy_no;
1544
1545 /* Init and wait for PHYs to come up and all libsas event finished. */
1546 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
1547 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1548
1549 if (!(hisi_hba->phy_state & BIT(phy_no)))
1550 continue;
1551
1552 async_schedule_domain(hisi_sas_async_init_wait_phyup,
1553 phy, &async);
1554 }
1555
1556 async_synchronize_full_domain(&async);
1557 hisi_sas_refresh_port_id(hisi_hba);
1558 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1559
1560 if (hisi_hba->reject_stp_links_msk)
1561 hisi_sas_terminate_stp_reject(hisi_hba);
1562 hisi_sas_reset_init_all_devices(hisi_hba);
1563 scsi_unblock_requests(shost);
1564 clear_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags);
1565 up(&hisi_hba->sem);
1566
1567 hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state);
1568 }
1569 EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done);
1570
hisi_sas_controller_prereset(struct hisi_hba * hisi_hba)1571 static int hisi_sas_controller_prereset(struct hisi_hba *hisi_hba)
1572 {
1573 if (!hisi_hba->hw->soft_reset)
1574 return -ENOENT;
1575
1576 down(&hisi_hba->sem);
1577 if (test_and_set_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags)) {
1578 up(&hisi_hba->sem);
1579 return -EPERM;
1580 }
1581
1582 if (hisi_sas_debugfs_enable)
1583 hisi_hba->hw->debugfs_snapshot_regs(hisi_hba);
1584
1585 return 0;
1586 }
1587
hisi_sas_controller_reset(struct hisi_hba * hisi_hba)1588 static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
1589 {
1590 struct device *dev = hisi_hba->dev;
1591 struct Scsi_Host *shost = hisi_hba->shost;
1592 int rc;
1593
1594 dev_info(dev, "controller resetting...\n");
1595 hisi_sas_controller_reset_prepare(hisi_hba);
1596
1597 rc = hisi_hba->hw->soft_reset(hisi_hba);
1598 if (rc) {
1599 dev_warn(dev, "controller reset failed (%d)\n", rc);
1600 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1601 up(&hisi_hba->sem);
1602 scsi_unblock_requests(shost);
1603 clear_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags);
1604 return rc;
1605 }
1606 clear_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags);
1607
1608 hisi_sas_controller_reset_done(hisi_hba);
1609 dev_info(dev, "controller reset complete\n");
1610
1611 return 0;
1612 }
1613
hisi_sas_abort_task(struct sas_task * task)1614 static int hisi_sas_abort_task(struct sas_task *task)
1615 {
1616 struct hisi_sas_internal_abort_data internal_abort_data = { false };
1617 struct domain_device *device = task->dev;
1618 struct hisi_sas_device *sas_dev = device->lldd_dev;
1619 struct hisi_sas_slot *slot = task->lldd_task;
1620 struct hisi_hba *hisi_hba;
1621 struct device *dev;
1622 int rc = TMF_RESP_FUNC_FAILED;
1623 unsigned long flags;
1624
1625 if (!sas_dev)
1626 return TMF_RESP_FUNC_FAILED;
1627
1628 hisi_hba = dev_to_hisi_hba(task->dev);
1629 dev = hisi_hba->dev;
1630
1631 spin_lock_irqsave(&task->task_state_lock, flags);
1632 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1633 struct hisi_sas_cq *cq;
1634
1635 if (slot) {
1636 /*
1637 * sync irq or poll queue to avoid free'ing task
1638 * before using task in IO completion
1639 */
1640 cq = &hisi_hba->cq[slot->dlvry_queue];
1641 hisi_sas_sync_cq(cq);
1642 }
1643 spin_unlock_irqrestore(&task->task_state_lock, flags);
1644 rc = TMF_RESP_FUNC_COMPLETE;
1645 goto out;
1646 }
1647 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1648 spin_unlock_irqrestore(&task->task_state_lock, flags);
1649
1650 if (!slot)
1651 goto out;
1652
1653 if (task->task_proto & SAS_PROTOCOL_SSP) {
1654 u16 tag = slot->idx;
1655 int rc2;
1656
1657 rc = sas_abort_task(task, tag);
1658 rc2 = sas_execute_internal_abort_single(device, tag,
1659 slot->dlvry_queue, &internal_abort_data);
1660 if (rc2 < 0) {
1661 dev_err(dev, "abort task: internal abort (%d)\n", rc2);
1662 return TMF_RESP_FUNC_FAILED;
1663 }
1664
1665 /*
1666 * If the TMF finds that the IO is not in the device and also
1667 * the internal abort does not succeed, then it is safe to
1668 * free the slot.
1669 * Note: if the internal abort succeeds then the slot
1670 * will have already been completed
1671 */
1672 if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
1673 if (task->lldd_task)
1674 hisi_sas_do_release_task(hisi_hba, task, slot, true);
1675 }
1676 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1677 task->task_proto & SAS_PROTOCOL_STP) {
1678 if (task->dev->dev_type == SAS_SATA_DEV) {
1679 struct ata_queued_cmd *qc = task->uldd_task;
1680
1681 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
1682 if (rc < 0) {
1683 dev_err(dev, "abort task: internal abort failed\n");
1684 goto out;
1685 }
1686 hisi_sas_dereg_device(hisi_hba, device);
1687
1688 /*
1689 * If an ATA internal command times out in ATA EH, it
1690 * need to execute soft reset, so check the scsicmd
1691 */
1692 if ((sas_dev->dev_status == HISI_SAS_DEV_NCQ_ERR) &&
1693 qc && qc->scsicmd) {
1694 hisi_sas_do_release_task(hisi_hba, task, slot, true);
1695 rc = TMF_RESP_FUNC_COMPLETE;
1696 } else {
1697 rc = hisi_sas_softreset_ata_disk(device);
1698 }
1699 }
1700 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
1701 /* SMP */
1702 u32 tag = slot->idx;
1703 struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue];
1704
1705 rc = sas_execute_internal_abort_single(device,
1706 tag, slot->dlvry_queue,
1707 &internal_abort_data);
1708 if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
1709 task->lldd_task) {
1710 /*
1711 * sync irq or poll queue to avoid free'ing task
1712 * before using task in IO completion
1713 */
1714 hisi_sas_sync_cq(cq);
1715 slot->task = NULL;
1716 }
1717 }
1718
1719 out:
1720 if (rc != TMF_RESP_FUNC_COMPLETE)
1721 dev_notice(dev, "abort task: rc=%d\n", rc);
1722 return rc;
1723 }
1724
hisi_sas_abort_task_set(struct domain_device * device,u8 * lun)1725 static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
1726 {
1727 struct hisi_sas_device *sas_dev = device->lldd_dev;
1728 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1729 struct device *dev = hisi_hba->dev;
1730 int rc;
1731
1732 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
1733 if (rc < 0) {
1734 dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
1735 return TMF_RESP_FUNC_FAILED;
1736 }
1737 hisi_sas_dereg_device(hisi_hba, device);
1738
1739 rc = sas_abort_task_set(device, lun);
1740 if (rc == TMF_RESP_FUNC_COMPLETE)
1741 hisi_sas_release_task(hisi_hba, device);
1742
1743 return rc;
1744 }
1745
hisi_sas_debug_I_T_nexus_reset(struct domain_device * device)1746 static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
1747 {
1748 struct sas_phy *local_phy = sas_get_local_phy(device);
1749 struct hisi_sas_device *sas_dev = device->lldd_dev;
1750 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1751 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
1752 int rc, reset_type;
1753
1754 if (!local_phy->enabled) {
1755 sas_put_local_phy(local_phy);
1756 return -ENODEV;
1757 }
1758
1759 if (scsi_is_sas_phy_local(local_phy)) {
1760 struct asd_sas_phy *sas_phy =
1761 sas_ha->sas_phy[local_phy->number];
1762 struct hisi_sas_phy *phy =
1763 container_of(sas_phy, struct hisi_sas_phy, sas_phy);
1764 unsigned long flags;
1765
1766 spin_lock_irqsave(&phy->lock, flags);
1767 phy->in_reset = 1;
1768 spin_unlock_irqrestore(&phy->lock, flags);
1769 }
1770
1771 reset_type = (sas_dev->dev_status == HISI_SAS_DEV_INIT ||
1772 !dev_is_sata(device)) ? true : false;
1773
1774 rc = sas_phy_reset(local_phy, reset_type);
1775 sas_put_local_phy(local_phy);
1776
1777 if (scsi_is_sas_phy_local(local_phy)) {
1778 struct asd_sas_phy *sas_phy =
1779 sas_ha->sas_phy[local_phy->number];
1780 struct hisi_sas_phy *phy =
1781 container_of(sas_phy, struct hisi_sas_phy, sas_phy);
1782 unsigned long flags;
1783
1784 spin_lock_irqsave(&phy->lock, flags);
1785 phy->in_reset = 0;
1786 spin_unlock_irqrestore(&phy->lock, flags);
1787
1788 /* report PHY down if timed out */
1789 if (rc == -ETIMEDOUT)
1790 hisi_sas_phy_down(hisi_hba, sas_phy->id, 0, GFP_KERNEL);
1791 return rc;
1792 }
1793
1794 /* Remote phy */
1795 if (rc)
1796 return rc;
1797
1798 if (dev_is_sata(device)) {
1799 struct ata_link *link = &device->sata_dev.ap->link;
1800
1801 rc = ata_wait_after_reset(link, jiffies + HISI_SAS_WAIT_PHYUP_TIMEOUT,
1802 smp_ata_check_ready_type);
1803 } else {
1804 msleep(2000);
1805 }
1806
1807 return rc;
1808 }
1809
hisi_sas_I_T_nexus_reset(struct domain_device * device)1810 static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
1811 {
1812 struct hisi_sas_device *sas_dev = device->lldd_dev;
1813 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1814 struct device *dev = hisi_hba->dev;
1815 int rc;
1816
1817 if (sas_dev->dev_status == HISI_SAS_DEV_NCQ_ERR)
1818 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
1819
1820 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
1821 if (rc < 0) {
1822 dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
1823 return TMF_RESP_FUNC_FAILED;
1824 }
1825 hisi_sas_dereg_device(hisi_hba, device);
1826
1827 rc = hisi_sas_debug_I_T_nexus_reset(device);
1828 if (rc == TMF_RESP_FUNC_COMPLETE && dev_is_sata(device)) {
1829 struct sas_phy *local_phy;
1830
1831 rc = hisi_sas_softreset_ata_disk(device);
1832 switch (rc) {
1833 case -ECOMM:
1834 rc = -ENODEV;
1835 break;
1836 case TMF_RESP_FUNC_FAILED:
1837 case -EMSGSIZE:
1838 case -EIO:
1839 local_phy = sas_get_local_phy(device);
1840 rc = sas_phy_enable(local_phy, 0);
1841 if (!rc) {
1842 local_phy->enabled = 0;
1843 dev_err(dev, "Disabled local phy of ATA disk %016llx due to softreset fail (%d)\n",
1844 SAS_ADDR(device->sas_addr), rc);
1845 rc = -ENODEV;
1846 }
1847 sas_put_local_phy(local_phy);
1848 break;
1849 default:
1850 break;
1851 }
1852 }
1853
1854 if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
1855 hisi_sas_release_task(hisi_hba, device);
1856
1857 return rc;
1858 }
1859
hisi_sas_lu_reset(struct domain_device * device,u8 * lun)1860 static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
1861 {
1862 struct hisi_sas_device *sas_dev = device->lldd_dev;
1863 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1864 struct device *dev = hisi_hba->dev;
1865 int rc = TMF_RESP_FUNC_FAILED;
1866
1867 /* Clear internal IO and then lu reset */
1868 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
1869 if (rc < 0) {
1870 dev_err(dev, "lu_reset: internal abort failed\n");
1871 goto out;
1872 }
1873 hisi_sas_dereg_device(hisi_hba, device);
1874
1875 if (dev_is_sata(device)) {
1876 struct sas_phy *phy;
1877
1878 phy = sas_get_local_phy(device);
1879
1880 rc = sas_phy_reset(phy, true);
1881
1882 if (rc == 0)
1883 hisi_sas_release_task(hisi_hba, device);
1884 sas_put_local_phy(phy);
1885 } else {
1886 rc = sas_lu_reset(device, lun);
1887 if (rc == TMF_RESP_FUNC_COMPLETE)
1888 hisi_sas_release_task(hisi_hba, device);
1889 }
1890 out:
1891 if (rc != TMF_RESP_FUNC_COMPLETE)
1892 dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
1893 sas_dev->device_id, rc);
1894 return rc;
1895 }
1896
hisi_sas_async_I_T_nexus_reset(void * data,async_cookie_t cookie)1897 static void hisi_sas_async_I_T_nexus_reset(void *data, async_cookie_t cookie)
1898 {
1899 struct domain_device *device = data;
1900 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1901 int rc;
1902
1903 rc = hisi_sas_debug_I_T_nexus_reset(device);
1904 if (rc != TMF_RESP_FUNC_COMPLETE)
1905 dev_info(hisi_hba->dev, "I_T_nexus reset fail for dev:%016llx rc=%d\n",
1906 SAS_ADDR(device->sas_addr), rc);
1907 }
1908
hisi_sas_clear_nexus_ha(struct sas_ha_struct * sas_ha)1909 static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
1910 {
1911 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
1912 HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
1913 ASYNC_DOMAIN_EXCLUSIVE(async);
1914 int i;
1915
1916 queue_work(hisi_hba->wq, &r.work);
1917 wait_for_completion(r.completion);
1918 if (!r.done)
1919 return TMF_RESP_FUNC_FAILED;
1920
1921 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1922 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1923 struct domain_device *device = sas_dev->sas_device;
1924
1925 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device ||
1926 dev_is_expander(device->dev_type))
1927 continue;
1928
1929 async_schedule_domain(hisi_sas_async_I_T_nexus_reset,
1930 device, &async);
1931 }
1932
1933 async_synchronize_full_domain(&async);
1934 hisi_sas_release_tasks(hisi_hba);
1935
1936 return TMF_RESP_FUNC_COMPLETE;
1937 }
1938
hisi_sas_query_task(struct sas_task * task)1939 static int hisi_sas_query_task(struct sas_task *task)
1940 {
1941 int rc = TMF_RESP_FUNC_FAILED;
1942
1943 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1944 struct hisi_sas_slot *slot = task->lldd_task;
1945 u32 tag = slot->idx;
1946
1947 rc = sas_query_task(task, tag);
1948 switch (rc) {
1949 /* The task is still in Lun, release it then */
1950 case TMF_RESP_FUNC_SUCC:
1951 /* The task is not in Lun or failed, reset the phy */
1952 case TMF_RESP_FUNC_FAILED:
1953 case TMF_RESP_FUNC_COMPLETE:
1954 break;
1955 default:
1956 rc = TMF_RESP_FUNC_FAILED;
1957 break;
1958 }
1959 }
1960 return rc;
1961 }
1962
hisi_sas_internal_abort_timeout(struct sas_task * task,void * data)1963 static bool hisi_sas_internal_abort_timeout(struct sas_task *task,
1964 void *data)
1965 {
1966 struct domain_device *device = task->dev;
1967 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1968 struct hisi_sas_internal_abort_data *timeout = data;
1969
1970 if (hisi_sas_debugfs_enable) {
1971 /*
1972 * If timeout occurs in device gone scenario, to avoid
1973 * circular dependency like:
1974 * hisi_sas_dev_gone() -> down() -> ... ->
1975 * hisi_sas_internal_abort_timeout() -> down().
1976 */
1977 if (!timeout->rst_ha_timeout)
1978 down(&hisi_hba->sem);
1979 hisi_hba->hw->debugfs_snapshot_regs(hisi_hba);
1980 if (!timeout->rst_ha_timeout)
1981 up(&hisi_hba->sem);
1982 }
1983
1984 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1985 pr_err("Internal abort: timeout %016llx\n",
1986 SAS_ADDR(device->sas_addr));
1987 } else {
1988 struct hisi_sas_slot *slot = task->lldd_task;
1989
1990 set_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags);
1991
1992 if (slot) {
1993 struct hisi_sas_cq *cq =
1994 &hisi_hba->cq[slot->dlvry_queue];
1995 /*
1996 * sync irq or poll queue to avoid free'ing task
1997 * before using task in IO completion
1998 */
1999 hisi_sas_sync_cq(cq);
2000 slot->task = NULL;
2001 }
2002
2003 if (timeout->rst_ha_timeout) {
2004 pr_err("Internal abort: timeout and not done %016llx. Queuing reset.\n",
2005 SAS_ADDR(device->sas_addr));
2006 queue_work(hisi_hba->wq, &hisi_hba->rst_work);
2007 } else {
2008 pr_err("Internal abort: timeout and not done %016llx.\n",
2009 SAS_ADDR(device->sas_addr));
2010 }
2011
2012 return true;
2013 }
2014
2015 return false;
2016 }
2017
hisi_sas_port_formed(struct asd_sas_phy * sas_phy)2018 static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
2019 {
2020 hisi_sas_port_notify_formed(sas_phy);
2021 }
2022
hisi_sas_write_gpio(struct sas_ha_struct * sha,u8 reg_type,u8 reg_index,u8 reg_count,u8 * write_data)2023 static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
2024 u8 reg_index, u8 reg_count, u8 *write_data)
2025 {
2026 struct hisi_hba *hisi_hba = sha->lldd_ha;
2027
2028 if (!hisi_hba->hw->write_gpio)
2029 return -EOPNOTSUPP;
2030
2031 return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
2032 reg_index, reg_count, write_data);
2033 }
2034
hisi_sas_phy_disconnected(struct hisi_sas_phy * phy)2035 static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
2036 {
2037 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2038 struct sas_phy *sphy = sas_phy->phy;
2039 unsigned long flags;
2040
2041 phy->phy_attached = 0;
2042 phy->phy_type = 0;
2043 phy->port = NULL;
2044
2045 spin_lock_irqsave(&phy->lock, flags);
2046 if (phy->enable)
2047 sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
2048 else
2049 sphy->negotiated_linkrate = SAS_PHY_DISABLED;
2050 spin_unlock_irqrestore(&phy->lock, flags);
2051 }
2052
hisi_sas_phy_down(struct hisi_hba * hisi_hba,int phy_no,int rdy,gfp_t gfp_flags)2053 void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy,
2054 gfp_t gfp_flags)
2055 {
2056 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
2057 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2058 struct device *dev = hisi_hba->dev;
2059
2060 if (rdy) {
2061 /* Phy down but ready */
2062 hisi_sas_bytes_dmaed(hisi_hba, phy_no, gfp_flags);
2063 hisi_sas_port_notify_formed(sas_phy);
2064 } else {
2065 struct hisi_sas_port *port = phy->port;
2066
2067 if (test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags) ||
2068 phy->in_reset) {
2069 dev_info(dev, "ignore flutter phy%d down\n", phy_no);
2070 return;
2071 }
2072 /* Phy down and not ready */
2073 sas_notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL, gfp_flags);
2074 sas_phy_disconnected(sas_phy);
2075
2076 if (port) {
2077 if (phy->phy_type & PORT_TYPE_SAS) {
2078 int port_id = port->id;
2079
2080 if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
2081 port_id))
2082 port->port_attached = 0;
2083 } else if (phy->phy_type & PORT_TYPE_SATA)
2084 port->port_attached = 0;
2085 }
2086 hisi_sas_phy_disconnected(phy);
2087 }
2088 }
2089 EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
2090
hisi_sas_phy_bcast(struct hisi_sas_phy * phy)2091 void hisi_sas_phy_bcast(struct hisi_sas_phy *phy)
2092 {
2093 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2094 struct hisi_hba *hisi_hba = phy->hisi_hba;
2095
2096 if (test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags))
2097 return;
2098
2099 sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, GFP_ATOMIC);
2100 }
2101 EXPORT_SYMBOL_GPL(hisi_sas_phy_bcast);
2102
hisi_sas_host_reset(struct Scsi_Host * shost,int reset_type)2103 int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type)
2104 {
2105 struct hisi_hba *hisi_hba = shost_priv(shost);
2106
2107 if (reset_type != SCSI_ADAPTER_RESET)
2108 return -EOPNOTSUPP;
2109
2110 queue_work(hisi_hba->wq, &hisi_hba->rst_work);
2111
2112 return 0;
2113 }
2114 EXPORT_SYMBOL_GPL(hisi_sas_host_reset);
2115
2116 struct scsi_transport_template *hisi_sas_stt;
2117 EXPORT_SYMBOL_GPL(hisi_sas_stt);
2118
2119 static struct sas_domain_function_template hisi_sas_transport_ops = {
2120 .lldd_dev_found = hisi_sas_dev_found,
2121 .lldd_dev_gone = hisi_sas_dev_gone,
2122 .lldd_execute_task = hisi_sas_queue_command,
2123 .lldd_control_phy = hisi_sas_control_phy,
2124 .lldd_abort_task = hisi_sas_abort_task,
2125 .lldd_abort_task_set = hisi_sas_abort_task_set,
2126 .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
2127 .lldd_lu_reset = hisi_sas_lu_reset,
2128 .lldd_query_task = hisi_sas_query_task,
2129 .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
2130 .lldd_port_formed = hisi_sas_port_formed,
2131 .lldd_write_gpio = hisi_sas_write_gpio,
2132 .lldd_tmf_aborted = hisi_sas_tmf_aborted,
2133 .lldd_abort_timeout = hisi_sas_internal_abort_timeout,
2134 };
2135
hisi_sas_init_mem(struct hisi_hba * hisi_hba)2136 void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
2137 {
2138 int i, s, j, max_command_entries = HISI_SAS_MAX_COMMANDS;
2139 struct hisi_sas_breakpoint *sata_breakpoint = hisi_hba->sata_breakpoint;
2140
2141 for (i = 0; i < hisi_hba->queue_count; i++) {
2142 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2143 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
2144 struct hisi_sas_cmd_hdr *cmd_hdr = hisi_hba->cmd_hdr[i];
2145
2146 s = sizeof(struct hisi_sas_cmd_hdr);
2147 for (j = 0; j < HISI_SAS_QUEUE_SLOTS; j++)
2148 memset(&cmd_hdr[j], 0, s);
2149
2150 dq->wr_point = 0;
2151
2152 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
2153 memset(hisi_hba->complete_hdr[i], 0, s);
2154 cq->rd_point = 0;
2155 }
2156
2157 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
2158 memset(hisi_hba->initial_fis, 0, s);
2159
2160 s = max_command_entries * sizeof(struct hisi_sas_iost);
2161 memset(hisi_hba->iost, 0, s);
2162
2163 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
2164 memset(hisi_hba->breakpoint, 0, s);
2165
2166 s = sizeof(struct hisi_sas_sata_breakpoint);
2167 for (j = 0; j < HISI_SAS_MAX_ITCT_ENTRIES; j++)
2168 memset(&sata_breakpoint[j], 0, s);
2169 }
2170 EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
2171
hisi_sas_alloc(struct hisi_hba * hisi_hba)2172 int hisi_sas_alloc(struct hisi_hba *hisi_hba)
2173 {
2174 struct device *dev = hisi_hba->dev;
2175 int i, j, s, max_command_entries = HISI_SAS_MAX_COMMANDS;
2176 int max_command_entries_ru, sz_slot_buf_ru;
2177 int blk_cnt, slots_per_blk;
2178
2179 sema_init(&hisi_hba->sem, 1);
2180 spin_lock_init(&hisi_hba->lock);
2181 for (i = 0; i < hisi_hba->n_phy; i++) {
2182 hisi_sas_phy_init(hisi_hba, i);
2183 hisi_hba->port[i].port_attached = 0;
2184 hisi_hba->port[i].id = -1;
2185 }
2186
2187 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
2188 hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
2189 hisi_hba->devices[i].device_id = i;
2190 hisi_hba->devices[i].dev_status = HISI_SAS_DEV_INIT;
2191 }
2192
2193 for (i = 0; i < hisi_hba->queue_count; i++) {
2194 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2195 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
2196
2197 /* Completion queue structure */
2198 cq->id = i;
2199 cq->hisi_hba = hisi_hba;
2200 spin_lock_init(&cq->poll_lock);
2201
2202 /* Delivery queue structure */
2203 spin_lock_init(&dq->lock);
2204 INIT_LIST_HEAD(&dq->list);
2205 dq->id = i;
2206 dq->hisi_hba = hisi_hba;
2207
2208 /* Delivery queue */
2209 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
2210 hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s,
2211 &hisi_hba->cmd_hdr_dma[i],
2212 GFP_KERNEL);
2213 if (!hisi_hba->cmd_hdr[i])
2214 goto err_out;
2215
2216 /* Completion queue */
2217 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
2218 hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s,
2219 &hisi_hba->complete_hdr_dma[i],
2220 GFP_KERNEL);
2221 if (!hisi_hba->complete_hdr[i])
2222 goto err_out;
2223 }
2224
2225 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
2226 hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma,
2227 GFP_KERNEL);
2228 if (!hisi_hba->itct)
2229 goto err_out;
2230
2231 hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
2232 sizeof(struct hisi_sas_slot),
2233 GFP_KERNEL);
2234 if (!hisi_hba->slot_info)
2235 goto err_out;
2236
2237 /* roundup to avoid overly large block size */
2238 max_command_entries_ru = roundup(max_command_entries, 64);
2239 if (hisi_hba->prot_mask & HISI_SAS_DIX_PROT_MASK)
2240 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_dif_buf_table);
2241 else
2242 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_buf_table);
2243 sz_slot_buf_ru = roundup(sz_slot_buf_ru, 64);
2244 s = max(lcm(max_command_entries_ru, sz_slot_buf_ru), PAGE_SIZE);
2245 blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s;
2246 slots_per_blk = s / sz_slot_buf_ru;
2247
2248 for (i = 0; i < blk_cnt; i++) {
2249 int slot_index = i * slots_per_blk;
2250 dma_addr_t buf_dma;
2251 void *buf;
2252
2253 buf = dmam_alloc_coherent(dev, s, &buf_dma,
2254 GFP_KERNEL);
2255 if (!buf)
2256 goto err_out;
2257
2258 for (j = 0; j < slots_per_blk; j++, slot_index++) {
2259 struct hisi_sas_slot *slot;
2260
2261 slot = &hisi_hba->slot_info[slot_index];
2262 slot->buf = buf;
2263 slot->buf_dma = buf_dma;
2264 slot->idx = slot_index;
2265
2266 buf += sz_slot_buf_ru;
2267 buf_dma += sz_slot_buf_ru;
2268 }
2269 }
2270
2271 s = max_command_entries * sizeof(struct hisi_sas_iost);
2272 hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma,
2273 GFP_KERNEL);
2274 if (!hisi_hba->iost)
2275 goto err_out;
2276
2277 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
2278 hisi_hba->breakpoint = dmam_alloc_coherent(dev, s,
2279 &hisi_hba->breakpoint_dma,
2280 GFP_KERNEL);
2281 if (!hisi_hba->breakpoint)
2282 goto err_out;
2283
2284 s = hisi_hba->slot_index_count = max_command_entries;
2285 hisi_hba->slot_index_tags = devm_bitmap_zalloc(dev, s, GFP_KERNEL);
2286 if (!hisi_hba->slot_index_tags)
2287 goto err_out;
2288
2289 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
2290 hisi_hba->initial_fis = dmam_alloc_coherent(dev, s,
2291 &hisi_hba->initial_fis_dma,
2292 GFP_KERNEL);
2293 if (!hisi_hba->initial_fis)
2294 goto err_out;
2295
2296 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
2297 hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s,
2298 &hisi_hba->sata_breakpoint_dma,
2299 GFP_KERNEL);
2300 if (!hisi_hba->sata_breakpoint)
2301 goto err_out;
2302
2303 hisi_hba->last_slot_index = 0;
2304
2305 hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
2306 if (!hisi_hba->wq) {
2307 dev_err(dev, "sas_alloc: failed to create workqueue\n");
2308 goto err_out;
2309 }
2310
2311 return 0;
2312 err_out:
2313 return -ENOMEM;
2314 }
2315 EXPORT_SYMBOL_GPL(hisi_sas_alloc);
2316
hisi_sas_free(struct hisi_hba * hisi_hba)2317 void hisi_sas_free(struct hisi_hba *hisi_hba)
2318 {
2319 int i;
2320
2321 for (i = 0; i < hisi_hba->n_phy; i++) {
2322 struct hisi_sas_phy *phy = &hisi_hba->phy[i];
2323
2324 del_timer_sync(&phy->timer);
2325 }
2326
2327 if (hisi_hba->wq)
2328 destroy_workqueue(hisi_hba->wq);
2329 }
2330 EXPORT_SYMBOL_GPL(hisi_sas_free);
2331
hisi_sas_rst_work_handler(struct work_struct * work)2332 void hisi_sas_rst_work_handler(struct work_struct *work)
2333 {
2334 struct hisi_hba *hisi_hba =
2335 container_of(work, struct hisi_hba, rst_work);
2336
2337 if (hisi_sas_controller_prereset(hisi_hba))
2338 return;
2339
2340 hisi_sas_controller_reset(hisi_hba);
2341 }
2342 EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
2343
hisi_sas_sync_rst_work_handler(struct work_struct * work)2344 void hisi_sas_sync_rst_work_handler(struct work_struct *work)
2345 {
2346 struct hisi_sas_rst *rst =
2347 container_of(work, struct hisi_sas_rst, work);
2348
2349 if (hisi_sas_controller_prereset(rst->hisi_hba))
2350 goto rst_complete;
2351
2352 if (!hisi_sas_controller_reset(rst->hisi_hba))
2353 rst->done = true;
2354 rst_complete:
2355 complete(rst->completion);
2356 }
2357 EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
2358
hisi_sas_get_fw_info(struct hisi_hba * hisi_hba)2359 int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
2360 {
2361 struct device *dev = hisi_hba->dev;
2362 struct platform_device *pdev = hisi_hba->platform_dev;
2363 struct device_node *np = pdev ? pdev->dev.of_node : NULL;
2364 struct clk *refclk;
2365
2366 if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
2367 SAS_ADDR_SIZE)) {
2368 dev_err(dev, "could not get property sas-addr\n");
2369 return -ENOENT;
2370 }
2371
2372 if (np) {
2373 /*
2374 * These properties are only required for platform device-based
2375 * controller with DT firmware.
2376 */
2377 hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
2378 "hisilicon,sas-syscon");
2379 if (IS_ERR(hisi_hba->ctrl)) {
2380 dev_err(dev, "could not get syscon\n");
2381 return -ENOENT;
2382 }
2383
2384 if (device_property_read_u32(dev, "ctrl-reset-reg",
2385 &hisi_hba->ctrl_reset_reg)) {
2386 dev_err(dev, "could not get property ctrl-reset-reg\n");
2387 return -ENOENT;
2388 }
2389
2390 if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
2391 &hisi_hba->ctrl_reset_sts_reg)) {
2392 dev_err(dev, "could not get property ctrl-reset-sts-reg\n");
2393 return -ENOENT;
2394 }
2395
2396 if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
2397 &hisi_hba->ctrl_clock_ena_reg)) {
2398 dev_err(dev, "could not get property ctrl-clock-ena-reg\n");
2399 return -ENOENT;
2400 }
2401 }
2402
2403 refclk = devm_clk_get(dev, NULL);
2404 if (IS_ERR(refclk))
2405 dev_dbg(dev, "no ref clk property\n");
2406 else
2407 hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
2408
2409 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
2410 dev_err(dev, "could not get property phy-count\n");
2411 return -ENOENT;
2412 }
2413
2414 if (device_property_read_u32(dev, "queue-count",
2415 &hisi_hba->queue_count)) {
2416 dev_err(dev, "could not get property queue-count\n");
2417 return -ENOENT;
2418 }
2419
2420 return 0;
2421 }
2422 EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
2423
hisi_sas_shost_alloc(struct platform_device * pdev,const struct hisi_sas_hw * hw)2424 static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
2425 const struct hisi_sas_hw *hw)
2426 {
2427 struct resource *res;
2428 struct Scsi_Host *shost;
2429 struct hisi_hba *hisi_hba;
2430 struct device *dev = &pdev->dev;
2431 int error;
2432
2433 shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba));
2434 if (!shost) {
2435 dev_err(dev, "scsi host alloc failed\n");
2436 return NULL;
2437 }
2438 hisi_hba = shost_priv(shost);
2439
2440 INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
2441 hisi_hba->hw = hw;
2442 hisi_hba->dev = dev;
2443 hisi_hba->platform_dev = pdev;
2444 hisi_hba->shost = shost;
2445 SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
2446
2447 timer_setup(&hisi_hba->timer, NULL, 0);
2448
2449 if (hisi_sas_get_fw_info(hisi_hba) < 0)
2450 goto err_out;
2451
2452 error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
2453 if (error) {
2454 dev_err(dev, "No usable DMA addressing method\n");
2455 goto err_out;
2456 }
2457
2458 hisi_hba->regs = devm_platform_ioremap_resource(pdev, 0);
2459 if (IS_ERR(hisi_hba->regs))
2460 goto err_out;
2461
2462 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2463 if (res) {
2464 hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
2465 if (IS_ERR(hisi_hba->sgpio_regs))
2466 goto err_out;
2467 }
2468
2469 if (hisi_sas_alloc(hisi_hba)) {
2470 hisi_sas_free(hisi_hba);
2471 goto err_out;
2472 }
2473
2474 return shost;
2475 err_out:
2476 scsi_host_put(shost);
2477 dev_err(dev, "shost alloc failed\n");
2478 return NULL;
2479 }
2480
hisi_sas_interrupt_preinit(struct hisi_hba * hisi_hba)2481 static int hisi_sas_interrupt_preinit(struct hisi_hba *hisi_hba)
2482 {
2483 if (hisi_hba->hw->interrupt_preinit)
2484 return hisi_hba->hw->interrupt_preinit(hisi_hba);
2485 return 0;
2486 }
2487
hisi_sas_probe(struct platform_device * pdev,const struct hisi_sas_hw * hw)2488 int hisi_sas_probe(struct platform_device *pdev,
2489 const struct hisi_sas_hw *hw)
2490 {
2491 struct Scsi_Host *shost;
2492 struct hisi_hba *hisi_hba;
2493 struct device *dev = &pdev->dev;
2494 struct asd_sas_phy **arr_phy;
2495 struct asd_sas_port **arr_port;
2496 struct sas_ha_struct *sha;
2497 int rc, phy_nr, port_nr, i;
2498
2499 shost = hisi_sas_shost_alloc(pdev, hw);
2500 if (!shost)
2501 return -ENOMEM;
2502
2503 sha = SHOST_TO_SAS_HA(shost);
2504 hisi_hba = shost_priv(shost);
2505 platform_set_drvdata(pdev, sha);
2506
2507 phy_nr = port_nr = hisi_hba->n_phy;
2508
2509 arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
2510 arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
2511 if (!arr_phy || !arr_port) {
2512 rc = -ENOMEM;
2513 goto err_out_ha;
2514 }
2515
2516 sha->sas_phy = arr_phy;
2517 sha->sas_port = arr_port;
2518 sha->lldd_ha = hisi_hba;
2519
2520 shost->transportt = hisi_sas_stt;
2521 shost->max_id = HISI_SAS_MAX_DEVICES;
2522 shost->max_lun = ~0;
2523 shost->max_channel = 1;
2524 shost->max_cmd_len = 16;
2525 if (hisi_hba->hw->slot_index_alloc) {
2526 shost->can_queue = HISI_SAS_MAX_COMMANDS;
2527 shost->cmd_per_lun = HISI_SAS_MAX_COMMANDS;
2528 } else {
2529 shost->can_queue = HISI_SAS_UNRESERVED_IPTT;
2530 shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT;
2531 }
2532
2533 sha->sas_ha_name = DRV_NAME;
2534 sha->dev = hisi_hba->dev;
2535 sha->sas_addr = &hisi_hba->sas_addr[0];
2536 sha->num_phys = hisi_hba->n_phy;
2537 sha->shost = hisi_hba->shost;
2538
2539 for (i = 0; i < hisi_hba->n_phy; i++) {
2540 sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
2541 sha->sas_port[i] = &hisi_hba->port[i].sas_port;
2542 }
2543
2544 rc = hisi_sas_interrupt_preinit(hisi_hba);
2545 if (rc)
2546 goto err_out_ha;
2547
2548 rc = scsi_add_host(shost, &pdev->dev);
2549 if (rc)
2550 goto err_out_ha;
2551
2552 rc = sas_register_ha(sha);
2553 if (rc)
2554 goto err_out_register_ha;
2555
2556 rc = hisi_hba->hw->hw_init(hisi_hba);
2557 if (rc)
2558 goto err_out_hw_init;
2559
2560 scsi_scan_host(shost);
2561
2562 return 0;
2563
2564 err_out_hw_init:
2565 sas_unregister_ha(sha);
2566 err_out_register_ha:
2567 scsi_remove_host(shost);
2568 err_out_ha:
2569 hisi_sas_free(hisi_hba);
2570 scsi_host_put(shost);
2571 return rc;
2572 }
2573 EXPORT_SYMBOL_GPL(hisi_sas_probe);
2574
hisi_sas_remove(struct platform_device * pdev)2575 void hisi_sas_remove(struct platform_device *pdev)
2576 {
2577 struct sas_ha_struct *sha = platform_get_drvdata(pdev);
2578 struct hisi_hba *hisi_hba = sha->lldd_ha;
2579 struct Scsi_Host *shost = sha->shost;
2580
2581 del_timer_sync(&hisi_hba->timer);
2582
2583 sas_unregister_ha(sha);
2584 sas_remove_host(shost);
2585
2586 hisi_sas_free(hisi_hba);
2587 scsi_host_put(shost);
2588 }
2589 EXPORT_SYMBOL_GPL(hisi_sas_remove);
2590
2591 #if IS_ENABLED(CONFIG_SCSI_HISI_SAS_DEBUGFS_DEFAULT_ENABLE)
2592 #define DEBUGFS_ENABLE_DEFAULT "enabled"
2593 bool hisi_sas_debugfs_enable = true;
2594 u32 hisi_sas_debugfs_dump_count = 50;
2595 #else
2596 #define DEBUGFS_ENABLE_DEFAULT "disabled"
2597 bool hisi_sas_debugfs_enable;
2598 u32 hisi_sas_debugfs_dump_count = 1;
2599 #endif
2600
2601 EXPORT_SYMBOL_GPL(hisi_sas_debugfs_enable);
2602 module_param_named(debugfs_enable, hisi_sas_debugfs_enable, bool, 0444);
2603 MODULE_PARM_DESC(hisi_sas_debugfs_enable,
2604 "Enable driver debugfs (default "DEBUGFS_ENABLE_DEFAULT")");
2605
2606 EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dump_count);
2607 module_param_named(debugfs_dump_count, hisi_sas_debugfs_dump_count, uint, 0444);
2608 MODULE_PARM_DESC(hisi_sas_debugfs_dump_count, "Number of debugfs dumps to allow");
2609
2610 struct dentry *hisi_sas_debugfs_dir;
2611 EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dir);
2612
hisi_sas_init(void)2613 static __init int hisi_sas_init(void)
2614 {
2615 hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
2616 if (!hisi_sas_stt)
2617 return -ENOMEM;
2618
2619 if (hisi_sas_debugfs_enable) {
2620 hisi_sas_debugfs_dir = debugfs_create_dir("hisi_sas", NULL);
2621 if (hisi_sas_debugfs_dump_count > HISI_SAS_MAX_DEBUGFS_DUMP) {
2622 pr_info("hisi_sas: Limiting debugfs dump count\n");
2623 hisi_sas_debugfs_dump_count = HISI_SAS_MAX_DEBUGFS_DUMP;
2624 }
2625 }
2626
2627 return 0;
2628 }
2629
hisi_sas_exit(void)2630 static __exit void hisi_sas_exit(void)
2631 {
2632 sas_release_transport(hisi_sas_stt);
2633
2634 if (hisi_sas_debugfs_enable)
2635 debugfs_remove(hisi_sas_debugfs_dir);
2636 }
2637
2638 module_init(hisi_sas_init);
2639 module_exit(hisi_sas_exit);
2640
2641 MODULE_LICENSE("GPL");
2642 MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
2643 MODULE_DESCRIPTION("HISILICON SAS controller driver");
2644 MODULE_ALIAS("platform:" DRV_NAME);
2645