xref: /original-bsd/sys/vax/mba/hpreg.h (revision 889e8222)
1 /*-
2  * Copyright (c) 1982, 1986 The Regents of the University of California.
3  * All rights reserved.
4  *
5  * %sccs.include.proprietary.c%
6  *
7  *	@(#)hpreg.h	7.2 (Berkeley) 05/08/91
8  */
9 
10 struct hpdevice
11 {
12 	int	hpcs1;		/* control and status register 1 */
13 	int	hpds;		/* drive status */
14 	int	hper1;		/* error register 1 */
15 	int	hpmr;		/* maintenance */
16 	int	hpas;		/* attention summary */
17 	int	hpda;		/* desired address register */
18 	int	hpdt;		/* drive type */
19 	int	hpla;		/* look ahead */
20 	int	hpsn;		/* serial number */
21 	int	hpof;		/* offset register */
22 	int	hpdc;		/* desired cylinder address register */
23 	int	hpcc;		/* current cylinder */
24 #define	hphr	hpcc		/* holding register */
25 /* on an rp drive, mr2 is called er2 and er2 is called er3 */
26 /* we use rm terminology here */
27 	int	hpmr2;		/* maintenance register 2 */
28 	int	hper2;		/* error register 2 */
29 	int	hpec1;		/* burst error bit position */
30 	int	hpec2;		/* burst error bit pattern */
31 };
32 
33 /* hpcs1 */
34 #define	HP_SC	0100000		/* special condition */
35 #define	HP_TRE	0040000		/* transfer error */
36 #define	HP_DVA	0004000		/* drive available */
37 #define	HP_RDY	0000200		/* controller ready */
38 #define	HP_IE	0000100		/* interrupt enable */
39 /* bits 5-1 are the command */
40 #define	HP_GO	0000001
41 
42 /* commands */
43 #define	HP_NOP		000		/* no operation */
44 #define	HP_UNLOAD	002		/* offline drive */
45 #define	HP_SEEK		004		/* seek */
46 #define	HP_RECAL	006		/* recalibrate */
47 #define	HP_DCLR		010		/* drive clear */
48 #define	HP_RELEASE	012		/* release */
49 #define	HP_OFFSET	014		/* offset */
50 #define	HP_RTC		016		/* return to centerline */
51 #define	HP_PRESET	020		/* read-in preset */
52 #define	HP_PACK		022		/* pack acknowledge */
53 #define	HP_SEARCH	030		/* search */
54 #define	HP_DIAGNOSE	034		/* diagnose drive */
55 #define	HP_WCDATA	050		/* write check data */
56 #define	HP_WCHDR	052		/* write check header and data */
57 #define	HP_WCOM		060		/* write data */
58 #define	HP_WHDR		062		/* write header */
59 #define	HP_WTRACKD	064		/* write track descriptor */
60 #define	HP_RCOM		070		/* read data */
61 #define	HP_RHDR		072		/* read header and data */
62 #define	HP_RTRACKD	074		/* read track descriptor */
63 
64 /* hpds */
65 #define	HPDS_ATA	0100000		/* attention active */
66 #define	HPDS_ERR	0040000		/* composite drive error */
67 #define	HPDS_PIP	0020000		/* positioning in progress */
68 #define	HPDS_MOL	0010000		/* medium on line */
69 #define	HPDS_WRL	0004000		/* write locked */
70 #define	HPDS_LST	0002000		/* last sector transferred */
71 #define	HPDS_PGM	0001000		/* programmable */
72 #define	HPDS_DPR	0000400		/* drive present */
73 #define	HPDS_DRY	0000200		/* drive ready */
74 #define	HPDS_VV		0000100		/* volume valid */
75 /* bits 1-5 are spare */
76 #define	HPDS_OM		0000001		/* offset mode */
77 
78 #define	HPDS_DREADY	(HPDS_DPR|HPDS_DRY|HPDS_MOL|HPDS_VV)
79 #define	HPDS_BITS \
80 "\10\20ATA\17ERR\16PIP\15MOL\14WRL\13LST\12PGM\11DPR\10DRY\7VV\1OM"
81 
82 /* hper1 */
83 #define	HPER1_DCK	0100000		/* data check */
84 #define	HPER1_UNS	0040000		/* drive unsafe */
85 #define	HPER1_OPI	0020000		/* operation incomplete */
86 #define	HPER1_DTE	0010000		/* drive timing error */
87 #define	HPER1_WLE	0004000		/* write lock error */
88 #define	HPER1_IAE	0002000		/* invalid address error */
89 #define	HPER1_AOE	0001000		/* address overflow error */
90 #define	HPER1_HCRC	0000400		/* header crc error */
91 #define	HPER1_HCE	0000200		/* header compare error */
92 #define	HPER1_ECH	0000100		/* ecc hard error */
93 #define HPER1_WCF	0000040		/* write clock fail */
94 #define	HPER1_FER	0000020		/* format error */
95 #define	HPER1_PAR	0000010		/* parity error */
96 #define	HPER1_RMR	0000004		/* register modification refused */
97 #define	HPER1_ILR	0000002		/* illegal register */
98 #define	HPER1_ILF	0000001		/* illegal function */
99 
100 #define	HPER1_BITS \
101 "\10\20DCK\17UNS\16OPI\15DTE\14WLE\13IAE\12AOE\11HCRC\10HCE\
102 \7ECH\6WCF\5FER\4PAR\3RMR\2ILR\1ILF"
103 #define	HPER1_HARD    \
104 	(HPER1_WLE|HPER1_IAE|HPER1_AOE|\
105 	 HPER1_FER|HPER1_RMR|HPER1_ILR|HPER1_ILF)
106 
107 /* hper2 */
108 #define	HPER2_BSE	0100000		/* bad sector error */
109 #define	HPER2_SKI	0040000		/* seek incomplete */
110 #define	HPER2_OPE	0020000		/* operator plug error */
111 #define	HPER2_IVC	0010000		/* invalid command */
112 #define	HPER2_LSC	0004000		/* loss of system clock */
113 #define	HPER2_LBC	0002000		/* loss of bit check */
114 #define	HPER2_DVC	0000200		/* device check */
115 #define	HPER2_SSE	0000040		/* skip sector error (rm80) */
116 #define	HPER2_DPE	0000010		/* data parity error */
117 
118 #define	HPER2_BITS \
119 "\10\20BSE\17SKI\16OPE\15IVC\14LSC\13LBC\10DVC\6SSE\4DPE"
120 #define	HPER2_HARD    (HPER2_OPE)
121 
122 /* hpof */
123 #define	HPOF_CMO	0100000		/* command modifier */
124 #define	HPOF_MTD	0040000		/* move track descriptor */
125 #define	HPOF_FMT22	0010000		/* 16 bit format */
126 #define	HPOF_ECI	0004000		/* ecc inhibit */
127 #define	HPOF_HCI	0002000		/* header compare inhibit */
128 #define	HPOF_SSEI	0001000		/* skip sector inhibit */
129 
130 #define	HPOF_P400	020		/*  +400 uinches */
131 #define	HPOF_M400	0220		/*  -400 uinches */
132 #define	HPOF_P800	040		/*  +800 uinches */
133 #define	HPOF_M800	0240		/*  -800 uinches */
134 #define	HPOF_P1200	060		/* +1200 uinches */
135 #define	HPOF_M1200	0260		/* -1200 uinches */
136 
137 /* hphr (alias hpcc) commands */
138 #define	HPHR_MAXCYL	0x8017		/* maximum cylinder address */
139 #define	HPHR_MAXTRAK	0x8018		/* maximum track address */
140 #define	HPHR_MAXSECT	0x8019		/* maximum sector address */
141 #define	HPHR_FMTENABLE	0xffff		/* enable format command in cs1 */
142 
143 /* hpmr */
144 #define	HPMR_SZ		0174000		/* ML11 system size */
145 #define	HPMR_ARRTYP	0002000		/* ML11 array type */
146 #define	HPMR_TRT	0001400		/* ML11 transfer rate */
147 
148 /*
149  * Systems Industries kludge: use value in
150  * the serial # register to figure out real drive type.
151  */
152 #define	SIMB_MB	0xff00		/* model byte value */
153 #define	SIMB_S6	0x2000		/* switch s6 */
154 #define	SIMB_LU	0x0007		/* logical unit (should = drive #) */
155 
156 #define	SI9775D	0x0700		/* 9775 direct */
157 #define	SI9775M	0x0e00		/* 9775 mapped */
158 #define	SI9730D	0x0b00		/* 9730 direct */
159 #define	SI9730M	0x0d00		/* 9730 mapped */
160 #define	SI9766	0x0300		/* 9766 */
161 #define	SI9762	0x0100		/* 9762 */
162 #define	SICAPD	0x0500		/* Capricorn direct */
163 #define	SICAPN	0x0400		/* Capricorn mapped */
164 #define	SI9751D	0x0f00		/* Eagle direct */
165 
166 #define	SIRM03	0x8000		/* RM03 indication */
167 #define	SIRM05	0x0000		/* RM05 pseudo-indication */
168