xref: /linux/drivers/dma/hsu/pci.c (revision 9c060026)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * PCI driver for the High Speed UART DMA
4  *
5  * Copyright (C) 2015 Intel Corporation
6  * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7  *
8  * Partially based on the bits found in drivers/tty/serial/mfd.c.
9  */
10 
11 #include <linux/bitops.h>
12 #include <linux/device.h>
13 #include <linux/interrupt.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16 
17 #include "hsu.h"
18 
19 #define HSU_PCI_DMASR		0x00
20 #define HSU_PCI_DMAISR		0x04
21 
22 #define HSU_PCI_CHAN_OFFSET	0x100
23 
24 #define PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA	0x081e
25 #define PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA	0x1192
26 
hsu_pci_irq(int irq,void * dev)27 static irqreturn_t hsu_pci_irq(int irq, void *dev)
28 {
29 	struct hsu_dma_chip *chip = dev;
30 	unsigned long dmaisr;
31 	unsigned short i;
32 	u32 status;
33 	int ret = 0;
34 	int err;
35 
36 	dmaisr = readl(chip->regs + HSU_PCI_DMAISR);
37 	for_each_set_bit(i, &dmaisr, chip->hsu->nr_channels) {
38 		err = hsu_dma_get_status(chip, i, &status);
39 		if (err > 0)
40 			ret |= 1;
41 		else if (err == 0)
42 			ret |= hsu_dma_do_irq(chip, i, status);
43 	}
44 
45 	return IRQ_RETVAL(ret);
46 }
47 
hsu_pci_dma_remove(void * chip)48 static void hsu_pci_dma_remove(void *chip)
49 {
50 	hsu_dma_remove(chip);
51 }
52 
hsu_pci_probe(struct pci_dev * pdev,const struct pci_device_id * id)53 static int hsu_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
54 {
55 	struct device *dev = &pdev->dev;
56 	struct hsu_dma_chip *chip;
57 	int ret;
58 
59 	ret = pcim_enable_device(pdev);
60 	if (ret)
61 		return ret;
62 
63 	ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
64 	if (ret) {
65 		dev_err(&pdev->dev, "I/O memory remapping failed\n");
66 		return ret;
67 	}
68 
69 	pci_set_master(pdev);
70 	pci_try_set_mwi(pdev);
71 
72 	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
73 	if (ret)
74 		return ret;
75 
76 	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
77 	if (!chip)
78 		return -ENOMEM;
79 
80 	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
81 	if (ret < 0)
82 		return ret;
83 
84 	chip->dev = &pdev->dev;
85 	chip->regs = pcim_iomap_table(pdev)[0];
86 	chip->length = pci_resource_len(pdev, 0);
87 	chip->offset = HSU_PCI_CHAN_OFFSET;
88 	chip->irq = pci_irq_vector(pdev, 0);
89 
90 	ret = hsu_dma_probe(chip);
91 	if (ret)
92 		return ret;
93 
94 	ret = devm_add_action_or_reset(dev, hsu_pci_dma_remove, chip);
95 	if (ret)
96 		return ret;
97 
98 	ret = devm_request_irq(dev, chip->irq, hsu_pci_irq, 0, "hsu_dma_pci", chip);
99 	if (ret)
100 		return ret;
101 
102 	/*
103 	 * On Intel Tangier B0 and Anniedale the interrupt line, disregarding
104 	 * to have different numbers, is shared between HSU DMA and UART IPs.
105 	 * Thus on such SoCs we are expecting that IRQ handler is called in
106 	 * UART driver only. Instead of handling the spurious interrupt
107 	 * from HSU DMA here and waste CPU time and delay HSU UART interrupt
108 	 * handling, disable the interrupt entirely.
109 	 */
110 	if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA)
111 		disable_irq_nosync(chip->irq);
112 
113 	pci_set_drvdata(pdev, chip);
114 
115 	return 0;
116 }
117 
118 static const struct pci_device_id hsu_pci_id_table[] = {
119 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA), 0 },
120 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA), 0 },
121 	{ }
122 };
123 MODULE_DEVICE_TABLE(pci, hsu_pci_id_table);
124 
125 static struct pci_driver hsu_pci_driver = {
126 	.name		= "hsu_dma_pci",
127 	.id_table	= hsu_pci_id_table,
128 	.probe		= hsu_pci_probe,
129 };
130 
131 module_pci_driver(hsu_pci_driver);
132 
133 MODULE_LICENSE("GPL v2");
134 MODULE_DESCRIPTION("High Speed UART DMA PCI driver");
135 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
136