1 /*
2 * QEMU Machine
3 *
4 * Copyright (C) 2014 Red Hat Inc
5 *
6 * Authors:
7 * Marcel Apfelbaum <marcel.a@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
13 #include "qemu/osdep.h"
14 #include "qemu/accel.h"
15 #include "sysemu/replay.h"
16 #include "hw/boards.h"
17 #include "hw/loader.h"
18 #include "qapi/error.h"
19 #include "qapi/qapi-visit-machine.h"
20 #include "qom/object_interfaces.h"
21 #include "sysemu/cpus.h"
22 #include "sysemu/sysemu.h"
23 #include "sysemu/reset.h"
24 #include "sysemu/runstate.h"
25 #include "sysemu/xen.h"
26 #include "sysemu/qtest.h"
27 #include "hw/pci/pci_bridge.h"
28 #include "hw/mem/nvdimm.h"
29 #include "migration/global_state.h"
30 #include "exec/confidential-guest-support.h"
31 #include "hw/virtio/virtio-pci.h"
32 #include "hw/virtio/virtio-net.h"
33 #include "hw/virtio/virtio-iommu.h"
34 #include "audio/audio.h"
35
36 GlobalProperty hw_compat_9_0[] = {
37 {"arm-cpu", "backcompat-cntfrq", "true" },
38 };
39 const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0);
40
41 GlobalProperty hw_compat_8_2[] = {
42 { "migration", "zero-page-detection", "legacy"},
43 { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" },
44 { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" },
45 };
46 const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2);
47
48 GlobalProperty hw_compat_8_1[] = {
49 { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" },
50 { "ramfb", "x-migrate", "off" },
51 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" },
52 { "igb", "x-pcie-flr-init", "off" },
53 };
54 const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1);
55
56 GlobalProperty hw_compat_8_0[] = {
57 { "migration", "multifd-flush-after-each-section", "on"},
58 { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" },
59 { TYPE_VIRTIO_NET, "host_uso", "off"},
60 { TYPE_VIRTIO_NET, "guest_uso4", "off"},
61 { TYPE_VIRTIO_NET, "guest_uso6", "off"},
62 };
63 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0);
64
65 GlobalProperty hw_compat_7_2[] = {
66 { "e1000e", "migrate-timadj", "off" },
67 { "virtio-mem", "x-early-migration", "false" },
68 { "migration", "x-preempt-pre-7-2", "true" },
69 { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" },
70 };
71 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2);
72
73 GlobalProperty hw_compat_7_1[] = {
74 { "virtio-device", "queue_reset", "false" },
75 { "virtio-rng-pci", "vectors", "0" },
76 { "virtio-rng-pci-transitional", "vectors", "0" },
77 { "virtio-rng-pci-non-transitional", "vectors", "0" },
78 };
79 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1);
80
81 GlobalProperty hw_compat_7_0[] = {
82 { "arm-gicv3-common", "force-8-bit-prio", "on" },
83 { "nvme-ns", "eui64-default", "on"},
84 };
85 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0);
86
87 GlobalProperty hw_compat_6_2[] = {
88 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
89 };
90 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2);
91
92 GlobalProperty hw_compat_6_1[] = {
93 { "vhost-user-vsock-device", "seqpacket", "off" },
94 { "nvme-ns", "shared", "off" },
95 };
96 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1);
97
98 GlobalProperty hw_compat_6_0[] = {
99 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
100 { "i8042", "extended-state", "false"},
101 { "nvme-ns", "eui64-default", "off"},
102 { "e1000", "init-vet", "off" },
103 { "e1000e", "init-vet", "off" },
104 { "vhost-vsock-device", "seqpacket", "off" },
105 };
106 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0);
107
108 GlobalProperty hw_compat_5_2[] = {
109 { "ICH9-LPC", "smm-compat", "on"},
110 { "PIIX4_PM", "smm-compat", "on"},
111 { "virtio-blk-device", "report-discard-granularity", "off" },
112 { "virtio-net-pci-base", "vectors", "3"},
113 { "nvme", "msix-exclusive-bar", "on"},
114 };
115 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
116
117 GlobalProperty hw_compat_5_1[] = {
118 { "vhost-scsi", "num_queues", "1"},
119 { "vhost-user-blk", "num-queues", "1"},
120 { "vhost-user-scsi", "num_queues", "1"},
121 { "virtio-blk-device", "num-queues", "1"},
122 { "virtio-scsi-device", "num_queues", "1"},
123 { "nvme", "use-intel-id", "on"},
124 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
125 { "pl011", "migrate-clk", "off" },
126 { "virtio-pci", "x-ats-page-aligned", "off"},
127 };
128 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
129
130 GlobalProperty hw_compat_5_0[] = {
131 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
132 { "virtio-balloon-device", "page-poison", "false" },
133 { "vmport", "x-read-set-eax", "off" },
134 { "vmport", "x-signal-unsupported-cmd", "off" },
135 { "vmport", "x-report-vmx-type", "off" },
136 { "vmport", "x-cmds-v2", "off" },
137 { "virtio-device", "x-disable-legacy-check", "true" },
138 };
139 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
140
141 GlobalProperty hw_compat_4_2[] = {
142 { "virtio-blk-device", "queue-size", "128"},
143 { "virtio-scsi-device", "virtqueue_size", "128"},
144 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
145 { "virtio-blk-device", "seg-max-adjust", "off"},
146 { "virtio-scsi-device", "seg_max_adjust", "off"},
147 { "vhost-blk-device", "seg_max_adjust", "off"},
148 { "usb-host", "suppress-remote-wake", "off" },
149 { "usb-redir", "suppress-remote-wake", "off" },
150 { "qxl", "revision", "4" },
151 { "qxl-vga", "revision", "4" },
152 { "fw_cfg", "acpi-mr-restore", "false" },
153 { "virtio-device", "use-disabled-flag", "false" },
154 };
155 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
156
157 GlobalProperty hw_compat_4_1[] = {
158 { "virtio-pci", "x-pcie-flr-init", "off" },
159 };
160 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
161
162 GlobalProperty hw_compat_4_0[] = {
163 { "VGA", "edid", "false" },
164 { "secondary-vga", "edid", "false" },
165 { "bochs-display", "edid", "false" },
166 { "virtio-vga", "edid", "false" },
167 { "virtio-gpu-device", "edid", "false" },
168 { "virtio-device", "use-started", "false" },
169 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
170 { "pl031", "migrate-tick-offset", "false" },
171 };
172 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
173
174 GlobalProperty hw_compat_3_1[] = {
175 { "pcie-root-port", "x-speed", "2_5" },
176 { "pcie-root-port", "x-width", "1" },
177 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
178 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
179 { "tpm-crb", "ppi", "false" },
180 { "tpm-tis", "ppi", "false" },
181 { "usb-kbd", "serial", "42" },
182 { "usb-mouse", "serial", "42" },
183 { "usb-tablet", "serial", "42" },
184 { "virtio-blk-device", "discard", "false" },
185 { "virtio-blk-device", "write-zeroes", "false" },
186 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
187 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
188 };
189 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
190
191 GlobalProperty hw_compat_3_0[] = {};
192 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
193
194 GlobalProperty hw_compat_2_12[] = {
195 { "migration", "decompress-error-check", "off" },
196 { "hda-audio", "use-timer", "false" },
197 { "cirrus-vga", "global-vmstate", "true" },
198 { "VGA", "global-vmstate", "true" },
199 { "vmware-svga", "global-vmstate", "true" },
200 { "qxl-vga", "global-vmstate", "true" },
201 };
202 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
203
204 GlobalProperty hw_compat_2_11[] = {
205 { "hpet", "hpet-offset-saved", "false" },
206 { "virtio-blk-pci", "vectors", "2" },
207 { "vhost-user-blk-pci", "vectors", "2" },
208 { "e1000", "migrate_tso_props", "off" },
209 };
210 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
211
212 GlobalProperty hw_compat_2_10[] = {
213 { "virtio-mouse-device", "wheel-axis", "false" },
214 { "virtio-tablet-device", "wheel-axis", "false" },
215 };
216 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
217
218 GlobalProperty hw_compat_2_9[] = {
219 { "pci-bridge", "shpc", "off" },
220 { "intel-iommu", "pt", "off" },
221 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
222 { "pcie-root-port", "x-migrate-msix", "false" },
223 };
224 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
225
226 GlobalProperty hw_compat_2_8[] = {
227 { "fw_cfg_mem", "x-file-slots", "0x10" },
228 { "fw_cfg_io", "x-file-slots", "0x10" },
229 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
230 { "pci-bridge", "shpc", "on" },
231 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
232 { "virtio-pci", "x-pcie-deverr-init", "off" },
233 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
234 { "virtio-pci", "x-pcie-pm-init", "off" },
235 { "cirrus-vga", "vgamem_mb", "8" },
236 { "isa-cirrus-vga", "vgamem_mb", "8" },
237 };
238 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
239
240 GlobalProperty hw_compat_2_7[] = {
241 { "virtio-pci", "page-per-vq", "on" },
242 { "virtio-serial-device", "emergency-write", "off" },
243 { "ioapic", "version", "0x11" },
244 { "intel-iommu", "x-buggy-eim", "true" },
245 { "virtio-pci", "x-ignore-backend-features", "on" },
246 };
247 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
248
249 GlobalProperty hw_compat_2_6[] = {
250 { "virtio-mmio", "format_transport_address", "off" },
251 /* Optional because not all virtio-pci devices support legacy mode */
252 { "virtio-pci", "disable-modern", "on", .optional = true },
253 { "virtio-pci", "disable-legacy", "off", .optional = true },
254 };
255 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
256
257 GlobalProperty hw_compat_2_5[] = {
258 { "isa-fdc", "fallback", "144" },
259 { "pvscsi", "x-old-pci-configuration", "on" },
260 { "pvscsi", "x-disable-pcie", "on" },
261 { "vmxnet3", "x-old-msi-offsets", "on" },
262 { "vmxnet3", "x-disable-pcie", "on" },
263 };
264 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
265
266 GlobalProperty hw_compat_2_4[] = {
267 /* Optional because the 'scsi' property is Linux-only */
268 { "virtio-blk-device", "scsi", "true", .optional = true },
269 { "e1000", "extra_mac_registers", "off" },
270 { "virtio-pci", "x-disable-pcie", "on" },
271 { "virtio-pci", "migrate-extra", "off" },
272 { "fw_cfg_mem", "dma_enabled", "off" },
273 { "fw_cfg_io", "dma_enabled", "off" }
274 };
275 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
276
277 GlobalProperty hw_compat_2_3[] = {
278 { "virtio-blk-pci", "any_layout", "off" },
279 { "virtio-balloon-pci", "any_layout", "off" },
280 { "virtio-serial-pci", "any_layout", "off" },
281 { "virtio-9p-pci", "any_layout", "off" },
282 { "virtio-rng-pci", "any_layout", "off" },
283 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
284 { "migration", "send-configuration", "off" },
285 { "migration", "send-section-footer", "off" },
286 { "migration", "store-global-state", "off" },
287 };
288 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
289
290 GlobalProperty hw_compat_2_2[] = {};
291 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
292
293 GlobalProperty hw_compat_2_1[] = {
294 { "intel-hda", "old_msi_addr", "on" },
295 { "VGA", "qemu-extended-regs", "off" },
296 { "secondary-vga", "qemu-extended-regs", "off" },
297 { "virtio-scsi-pci", "any_layout", "off" },
298 { "usb-mouse", "usb_version", "1" },
299 { "usb-kbd", "usb_version", "1" },
300 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
301 };
302 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
303
304 MachineState *current_machine;
305
machine_get_kernel(Object * obj,Error ** errp)306 static char *machine_get_kernel(Object *obj, Error **errp)
307 {
308 MachineState *ms = MACHINE(obj);
309
310 return g_strdup(ms->kernel_filename);
311 }
312
machine_set_kernel(Object * obj,const char * value,Error ** errp)313 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
314 {
315 MachineState *ms = MACHINE(obj);
316
317 g_free(ms->kernel_filename);
318 ms->kernel_filename = g_strdup(value);
319 }
320
machine_get_initrd(Object * obj,Error ** errp)321 static char *machine_get_initrd(Object *obj, Error **errp)
322 {
323 MachineState *ms = MACHINE(obj);
324
325 return g_strdup(ms->initrd_filename);
326 }
327
machine_set_initrd(Object * obj,const char * value,Error ** errp)328 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
329 {
330 MachineState *ms = MACHINE(obj);
331
332 g_free(ms->initrd_filename);
333 ms->initrd_filename = g_strdup(value);
334 }
335
machine_get_append(Object * obj,Error ** errp)336 static char *machine_get_append(Object *obj, Error **errp)
337 {
338 MachineState *ms = MACHINE(obj);
339
340 return g_strdup(ms->kernel_cmdline);
341 }
342
machine_set_append(Object * obj,const char * value,Error ** errp)343 static void machine_set_append(Object *obj, const char *value, Error **errp)
344 {
345 MachineState *ms = MACHINE(obj);
346
347 g_free(ms->kernel_cmdline);
348 ms->kernel_cmdline = g_strdup(value);
349 }
350
machine_get_dtb(Object * obj,Error ** errp)351 static char *machine_get_dtb(Object *obj, Error **errp)
352 {
353 MachineState *ms = MACHINE(obj);
354
355 return g_strdup(ms->dtb);
356 }
357
machine_set_dtb(Object * obj,const char * value,Error ** errp)358 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
359 {
360 MachineState *ms = MACHINE(obj);
361
362 g_free(ms->dtb);
363 ms->dtb = g_strdup(value);
364 }
365
machine_get_dumpdtb(Object * obj,Error ** errp)366 static char *machine_get_dumpdtb(Object *obj, Error **errp)
367 {
368 MachineState *ms = MACHINE(obj);
369
370 return g_strdup(ms->dumpdtb);
371 }
372
machine_set_dumpdtb(Object * obj,const char * value,Error ** errp)373 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
374 {
375 MachineState *ms = MACHINE(obj);
376
377 g_free(ms->dumpdtb);
378 ms->dumpdtb = g_strdup(value);
379 }
380
machine_get_phandle_start(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)381 static void machine_get_phandle_start(Object *obj, Visitor *v,
382 const char *name, void *opaque,
383 Error **errp)
384 {
385 MachineState *ms = MACHINE(obj);
386 int64_t value = ms->phandle_start;
387
388 visit_type_int(v, name, &value, errp);
389 }
390
machine_set_phandle_start(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)391 static void machine_set_phandle_start(Object *obj, Visitor *v,
392 const char *name, void *opaque,
393 Error **errp)
394 {
395 MachineState *ms = MACHINE(obj);
396 int64_t value;
397
398 if (!visit_type_int(v, name, &value, errp)) {
399 return;
400 }
401
402 ms->phandle_start = value;
403 }
404
machine_get_dt_compatible(Object * obj,Error ** errp)405 static char *machine_get_dt_compatible(Object *obj, Error **errp)
406 {
407 MachineState *ms = MACHINE(obj);
408
409 return g_strdup(ms->dt_compatible);
410 }
411
machine_set_dt_compatible(Object * obj,const char * value,Error ** errp)412 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
413 {
414 MachineState *ms = MACHINE(obj);
415
416 g_free(ms->dt_compatible);
417 ms->dt_compatible = g_strdup(value);
418 }
419
machine_get_dump_guest_core(Object * obj,Error ** errp)420 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
421 {
422 MachineState *ms = MACHINE(obj);
423
424 return ms->dump_guest_core;
425 }
426
machine_set_dump_guest_core(Object * obj,bool value,Error ** errp)427 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
428 {
429 MachineState *ms = MACHINE(obj);
430
431 ms->dump_guest_core = value;
432 }
433
machine_get_mem_merge(Object * obj,Error ** errp)434 static bool machine_get_mem_merge(Object *obj, Error **errp)
435 {
436 MachineState *ms = MACHINE(obj);
437
438 return ms->mem_merge;
439 }
440
machine_set_mem_merge(Object * obj,bool value,Error ** errp)441 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
442 {
443 MachineState *ms = MACHINE(obj);
444
445 ms->mem_merge = value;
446 }
447
machine_get_usb(Object * obj,Error ** errp)448 static bool machine_get_usb(Object *obj, Error **errp)
449 {
450 MachineState *ms = MACHINE(obj);
451
452 return ms->usb;
453 }
454
machine_set_usb(Object * obj,bool value,Error ** errp)455 static void machine_set_usb(Object *obj, bool value, Error **errp)
456 {
457 MachineState *ms = MACHINE(obj);
458
459 ms->usb = value;
460 ms->usb_disabled = !value;
461 }
462
machine_get_graphics(Object * obj,Error ** errp)463 static bool machine_get_graphics(Object *obj, Error **errp)
464 {
465 MachineState *ms = MACHINE(obj);
466
467 return ms->enable_graphics;
468 }
469
machine_set_graphics(Object * obj,bool value,Error ** errp)470 static void machine_set_graphics(Object *obj, bool value, Error **errp)
471 {
472 MachineState *ms = MACHINE(obj);
473
474 ms->enable_graphics = value;
475 }
476
machine_get_firmware(Object * obj,Error ** errp)477 static char *machine_get_firmware(Object *obj, Error **errp)
478 {
479 MachineState *ms = MACHINE(obj);
480
481 return g_strdup(ms->firmware);
482 }
483
machine_set_firmware(Object * obj,const char * value,Error ** errp)484 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
485 {
486 MachineState *ms = MACHINE(obj);
487
488 g_free(ms->firmware);
489 ms->firmware = g_strdup(value);
490 }
491
machine_set_suppress_vmdesc(Object * obj,bool value,Error ** errp)492 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
493 {
494 MachineState *ms = MACHINE(obj);
495
496 ms->suppress_vmdesc = value;
497 }
498
machine_get_suppress_vmdesc(Object * obj,Error ** errp)499 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
500 {
501 MachineState *ms = MACHINE(obj);
502
503 return ms->suppress_vmdesc;
504 }
505
machine_get_memory_encryption(Object * obj,Error ** errp)506 static char *machine_get_memory_encryption(Object *obj, Error **errp)
507 {
508 MachineState *ms = MACHINE(obj);
509
510 if (ms->cgs) {
511 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
512 }
513
514 return NULL;
515 }
516
machine_set_memory_encryption(Object * obj,const char * value,Error ** errp)517 static void machine_set_memory_encryption(Object *obj, const char *value,
518 Error **errp)
519 {
520 Object *cgs =
521 object_resolve_path_component(object_get_objects_root(), value);
522
523 if (!cgs) {
524 error_setg(errp, "No such memory encryption object '%s'", value);
525 return;
526 }
527
528 object_property_set_link(obj, "confidential-guest-support", cgs, errp);
529 }
530
machine_check_confidential_guest_support(const Object * obj,const char * name,Object * new_target,Error ** errp)531 static void machine_check_confidential_guest_support(const Object *obj,
532 const char *name,
533 Object *new_target,
534 Error **errp)
535 {
536 /*
537 * So far the only constraint is that the target has the
538 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
539 * by the QOM core
540 */
541 }
542
machine_get_nvdimm(Object * obj,Error ** errp)543 static bool machine_get_nvdimm(Object *obj, Error **errp)
544 {
545 MachineState *ms = MACHINE(obj);
546
547 return ms->nvdimms_state->is_enabled;
548 }
549
machine_set_nvdimm(Object * obj,bool value,Error ** errp)550 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
551 {
552 MachineState *ms = MACHINE(obj);
553
554 ms->nvdimms_state->is_enabled = value;
555 }
556
machine_get_hmat(Object * obj,Error ** errp)557 static bool machine_get_hmat(Object *obj, Error **errp)
558 {
559 MachineState *ms = MACHINE(obj);
560
561 return ms->numa_state->hmat_enabled;
562 }
563
machine_set_hmat(Object * obj,bool value,Error ** errp)564 static void machine_set_hmat(Object *obj, bool value, Error **errp)
565 {
566 MachineState *ms = MACHINE(obj);
567
568 ms->numa_state->hmat_enabled = value;
569 }
570
machine_get_mem(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)571 static void machine_get_mem(Object *obj, Visitor *v, const char *name,
572 void *opaque, Error **errp)
573 {
574 MachineState *ms = MACHINE(obj);
575 MemorySizeConfiguration mem = {
576 .has_size = true,
577 .size = ms->ram_size,
578 .has_max_size = !!ms->ram_slots,
579 .max_size = ms->maxram_size,
580 .has_slots = !!ms->ram_slots,
581 .slots = ms->ram_slots,
582 };
583 MemorySizeConfiguration *p_mem = &mem;
584
585 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort);
586 }
587
machine_set_mem(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)588 static void machine_set_mem(Object *obj, Visitor *v, const char *name,
589 void *opaque, Error **errp)
590 {
591 ERRP_GUARD();
592 MachineState *ms = MACHINE(obj);
593 MachineClass *mc = MACHINE_GET_CLASS(obj);
594 MemorySizeConfiguration *mem;
595
596 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) {
597 return;
598 }
599
600 if (!mem->has_size) {
601 mem->has_size = true;
602 mem->size = mc->default_ram_size;
603 }
604 mem->size = QEMU_ALIGN_UP(mem->size, 8192);
605 if (mc->fixup_ram_size) {
606 mem->size = mc->fixup_ram_size(mem->size);
607 }
608 if ((ram_addr_t)mem->size != mem->size) {
609 error_setg(errp, "ram size too large");
610 goto out_free;
611 }
612
613 if (mem->has_max_size) {
614 if (mem->max_size < mem->size) {
615 error_setg(errp, "invalid value of maxmem: "
616 "maximum memory size (0x%" PRIx64 ") must be at least "
617 "the initial memory size (0x%" PRIx64 ")",
618 mem->max_size, mem->size);
619 goto out_free;
620 }
621 if (mem->has_slots && mem->slots && mem->max_size == mem->size) {
622 error_setg(errp, "invalid value of maxmem: "
623 "memory slots were specified but maximum memory size "
624 "(0x%" PRIx64 ") is equal to the initial memory size "
625 "(0x%" PRIx64 ")", mem->max_size, mem->size);
626 goto out_free;
627 }
628 ms->maxram_size = mem->max_size;
629 } else {
630 if (mem->has_slots) {
631 error_setg(errp, "slots specified but no max-size");
632 goto out_free;
633 }
634 ms->maxram_size = mem->size;
635 }
636 ms->ram_size = mem->size;
637 ms->ram_slots = mem->has_slots ? mem->slots : 0;
638 out_free:
639 qapi_free_MemorySizeConfiguration(mem);
640 }
641
machine_get_nvdimm_persistence(Object * obj,Error ** errp)642 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
643 {
644 MachineState *ms = MACHINE(obj);
645
646 return g_strdup(ms->nvdimms_state->persistence_string);
647 }
648
machine_set_nvdimm_persistence(Object * obj,const char * value,Error ** errp)649 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
650 Error **errp)
651 {
652 MachineState *ms = MACHINE(obj);
653 NVDIMMState *nvdimms_state = ms->nvdimms_state;
654
655 if (strcmp(value, "cpu") == 0) {
656 nvdimms_state->persistence = 3;
657 } else if (strcmp(value, "mem-ctrl") == 0) {
658 nvdimms_state->persistence = 2;
659 } else {
660 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
661 value);
662 return;
663 }
664
665 g_free(nvdimms_state->persistence_string);
666 nvdimms_state->persistence_string = g_strdup(value);
667 }
668
machine_class_allow_dynamic_sysbus_dev(MachineClass * mc,const char * type)669 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
670 {
671 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
672 }
673
device_is_dynamic_sysbus(MachineClass * mc,DeviceState * dev)674 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
675 {
676 Object *obj = OBJECT(dev);
677
678 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
679 return false;
680 }
681
682 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj));
683 }
684
device_type_is_dynamic_sysbus(MachineClass * mc,const char * type)685 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type)
686 {
687 bool allowed = false;
688 strList *wl;
689 ObjectClass *klass = object_class_by_name(type);
690
691 for (wl = mc->allowed_dynamic_sysbus_devices;
692 !allowed && wl;
693 wl = wl->next) {
694 allowed |= !!object_class_dynamic_cast(klass, wl->value);
695 }
696
697 return allowed;
698 }
699
machine_get_audiodev(Object * obj,Error ** errp)700 static char *machine_get_audiodev(Object *obj, Error **errp)
701 {
702 MachineState *ms = MACHINE(obj);
703
704 return g_strdup(ms->audiodev);
705 }
706
machine_set_audiodev(Object * obj,const char * value,Error ** errp)707 static void machine_set_audiodev(Object *obj, const char *value,
708 Error **errp)
709 {
710 MachineState *ms = MACHINE(obj);
711
712 if (!audio_state_by_name(value, errp)) {
713 return;
714 }
715
716 g_free(ms->audiodev);
717 ms->audiodev = g_strdup(value);
718 }
719
machine_query_hotpluggable_cpus(MachineState * machine)720 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
721 {
722 int i;
723 HotpluggableCPUList *head = NULL;
724 MachineClass *mc = MACHINE_GET_CLASS(machine);
725
726 /* force board to initialize possible_cpus if it hasn't been done yet */
727 mc->possible_cpu_arch_ids(machine);
728
729 for (i = 0; i < machine->possible_cpus->len; i++) {
730 CPUState *cpu;
731 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
732
733 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
734 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
735 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
736 sizeof(*cpu_item->props));
737
738 cpu = machine->possible_cpus->cpus[i].cpu;
739 if (cpu) {
740 cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu));
741 }
742 QAPI_LIST_PREPEND(head, cpu_item);
743 }
744 return head;
745 }
746
747 /**
748 * machine_set_cpu_numa_node:
749 * @machine: machine object to modify
750 * @props: specifies which cpu objects to assign to
751 * numa node specified by @props.node_id
752 * @errp: if an error occurs, a pointer to an area to store the error
753 *
754 * Associate NUMA node specified by @props.node_id with cpu slots that
755 * match socket/core/thread-ids specified by @props. It's recommended to use
756 * query-hotpluggable-cpus.props values to specify affected cpu slots,
757 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
758 *
759 * However for CLI convenience it's possible to pass in subset of properties,
760 * which would affect all cpu slots that match it.
761 * Ex for pc machine:
762 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
763 * -numa cpu,node-id=0,socket_id=0 \
764 * -numa cpu,node-id=1,socket_id=1
765 * will assign all child cores of socket 0 to node 0 and
766 * of socket 1 to node 1.
767 *
768 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
769 * return error.
770 * Empty subset is disallowed and function will return with error in this case.
771 */
machine_set_cpu_numa_node(MachineState * machine,const CpuInstanceProperties * props,Error ** errp)772 void machine_set_cpu_numa_node(MachineState *machine,
773 const CpuInstanceProperties *props, Error **errp)
774 {
775 MachineClass *mc = MACHINE_GET_CLASS(machine);
776 NodeInfo *numa_info = machine->numa_state->nodes;
777 bool match = false;
778 int i;
779
780 if (!mc->possible_cpu_arch_ids) {
781 error_setg(errp, "mapping of CPUs to NUMA node is not supported");
782 return;
783 }
784
785 /* disabling node mapping is not supported, forbid it */
786 assert(props->has_node_id);
787
788 /* force board to initialize possible_cpus if it hasn't been done yet */
789 mc->possible_cpu_arch_ids(machine);
790
791 for (i = 0; i < machine->possible_cpus->len; i++) {
792 CPUArchId *slot = &machine->possible_cpus->cpus[i];
793
794 /* reject unsupported by board properties */
795 if (props->has_thread_id && !slot->props.has_thread_id) {
796 error_setg(errp, "thread-id is not supported");
797 return;
798 }
799
800 if (props->has_core_id && !slot->props.has_core_id) {
801 error_setg(errp, "core-id is not supported");
802 return;
803 }
804
805 if (props->has_module_id && !slot->props.has_module_id) {
806 error_setg(errp, "module-id is not supported");
807 return;
808 }
809
810 if (props->has_cluster_id && !slot->props.has_cluster_id) {
811 error_setg(errp, "cluster-id is not supported");
812 return;
813 }
814
815 if (props->has_socket_id && !slot->props.has_socket_id) {
816 error_setg(errp, "socket-id is not supported");
817 return;
818 }
819
820 if (props->has_die_id && !slot->props.has_die_id) {
821 error_setg(errp, "die-id is not supported");
822 return;
823 }
824
825 /* skip slots with explicit mismatch */
826 if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
827 continue;
828 }
829
830 if (props->has_core_id && props->core_id != slot->props.core_id) {
831 continue;
832 }
833
834 if (props->has_module_id &&
835 props->module_id != slot->props.module_id) {
836 continue;
837 }
838
839 if (props->has_cluster_id &&
840 props->cluster_id != slot->props.cluster_id) {
841 continue;
842 }
843
844 if (props->has_die_id && props->die_id != slot->props.die_id) {
845 continue;
846 }
847
848 if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
849 continue;
850 }
851
852 /* reject assignment if slot is already assigned, for compatibility
853 * of legacy cpu_index mapping with SPAPR core based mapping do not
854 * error out if cpu thread and matched core have the same node-id */
855 if (slot->props.has_node_id &&
856 slot->props.node_id != props->node_id) {
857 error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
858 slot->props.node_id);
859 return;
860 }
861
862 /* assign slot to node as it's matched '-numa cpu' key */
863 match = true;
864 slot->props.node_id = props->node_id;
865 slot->props.has_node_id = props->has_node_id;
866
867 if (machine->numa_state->hmat_enabled) {
868 if ((numa_info[props->node_id].initiator < MAX_NODES) &&
869 (props->node_id != numa_info[props->node_id].initiator)) {
870 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
871 " should be itself (got %" PRIu16 ")",
872 props->node_id, numa_info[props->node_id].initiator);
873 return;
874 }
875 numa_info[props->node_id].has_cpu = true;
876 numa_info[props->node_id].initiator = props->node_id;
877 }
878 }
879
880 if (!match) {
881 error_setg(errp, "no match found");
882 }
883 }
884
machine_get_smp(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)885 static void machine_get_smp(Object *obj, Visitor *v, const char *name,
886 void *opaque, Error **errp)
887 {
888 MachineState *ms = MACHINE(obj);
889 SMPConfiguration *config = &(SMPConfiguration){
890 .has_cpus = true, .cpus = ms->smp.cpus,
891 .has_drawers = true, .drawers = ms->smp.drawers,
892 .has_books = true, .books = ms->smp.books,
893 .has_sockets = true, .sockets = ms->smp.sockets,
894 .has_dies = true, .dies = ms->smp.dies,
895 .has_clusters = true, .clusters = ms->smp.clusters,
896 .has_modules = true, .modules = ms->smp.modules,
897 .has_cores = true, .cores = ms->smp.cores,
898 .has_threads = true, .threads = ms->smp.threads,
899 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus,
900 };
901
902 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) {
903 return;
904 }
905 }
906
machine_set_smp(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)907 static void machine_set_smp(Object *obj, Visitor *v, const char *name,
908 void *opaque, Error **errp)
909 {
910 MachineState *ms = MACHINE(obj);
911 g_autoptr(SMPConfiguration) config = NULL;
912
913 if (!visit_type_SMPConfiguration(v, name, &config, errp)) {
914 return;
915 }
916
917 machine_parse_smp_config(ms, config, errp);
918 }
919
machine_get_boot(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)920 static void machine_get_boot(Object *obj, Visitor *v, const char *name,
921 void *opaque, Error **errp)
922 {
923 MachineState *ms = MACHINE(obj);
924 BootConfiguration *config = &ms->boot_config;
925 visit_type_BootConfiguration(v, name, &config, &error_abort);
926 }
927
machine_free_boot_config(MachineState * ms)928 static void machine_free_boot_config(MachineState *ms)
929 {
930 g_free(ms->boot_config.order);
931 g_free(ms->boot_config.once);
932 g_free(ms->boot_config.splash);
933 }
934
machine_copy_boot_config(MachineState * ms,BootConfiguration * config)935 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config)
936 {
937 MachineClass *machine_class = MACHINE_GET_CLASS(ms);
938
939 machine_free_boot_config(ms);
940 ms->boot_config = *config;
941 if (!config->order) {
942 ms->boot_config.order = g_strdup(machine_class->default_boot_order);
943 }
944 }
945
machine_set_boot(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)946 static void machine_set_boot(Object *obj, Visitor *v, const char *name,
947 void *opaque, Error **errp)
948 {
949 ERRP_GUARD();
950 MachineState *ms = MACHINE(obj);
951 BootConfiguration *config = NULL;
952
953 if (!visit_type_BootConfiguration(v, name, &config, errp)) {
954 return;
955 }
956 if (config->order) {
957 validate_bootdevices(config->order, errp);
958 if (*errp) {
959 goto out_free;
960 }
961 }
962 if (config->once) {
963 validate_bootdevices(config->once, errp);
964 if (*errp) {
965 goto out_free;
966 }
967 }
968
969 machine_copy_boot_config(ms, config);
970 /* Strings live in ms->boot_config. */
971 free(config);
972 return;
973
974 out_free:
975 qapi_free_BootConfiguration(config);
976 }
977
machine_add_audiodev_property(MachineClass * mc)978 void machine_add_audiodev_property(MachineClass *mc)
979 {
980 ObjectClass *oc = OBJECT_CLASS(mc);
981
982 object_class_property_add_str(oc, "audiodev",
983 machine_get_audiodev,
984 machine_set_audiodev);
985 object_class_property_set_description(oc, "audiodev",
986 "Audiodev to use for default machine devices");
987 }
988
machine_class_init(ObjectClass * oc,void * data)989 static void machine_class_init(ObjectClass *oc, void *data)
990 {
991 MachineClass *mc = MACHINE_CLASS(oc);
992
993 /* Default 128 MB as guest ram size */
994 mc->default_ram_size = 128 * MiB;
995 mc->rom_file_has_mr = true;
996
997 /* numa node memory size aligned on 8MB by default.
998 * On Linux, each node's border has to be 8MB aligned
999 */
1000 mc->numa_mem_align_shift = 23;
1001
1002 object_class_property_add_str(oc, "kernel",
1003 machine_get_kernel, machine_set_kernel);
1004 object_class_property_set_description(oc, "kernel",
1005 "Linux kernel image file");
1006
1007 object_class_property_add_str(oc, "initrd",
1008 machine_get_initrd, machine_set_initrd);
1009 object_class_property_set_description(oc, "initrd",
1010 "Linux initial ramdisk file");
1011
1012 object_class_property_add_str(oc, "append",
1013 machine_get_append, machine_set_append);
1014 object_class_property_set_description(oc, "append",
1015 "Linux kernel command line");
1016
1017 object_class_property_add_str(oc, "dtb",
1018 machine_get_dtb, machine_set_dtb);
1019 object_class_property_set_description(oc, "dtb",
1020 "Linux kernel device tree file");
1021
1022 object_class_property_add_str(oc, "dumpdtb",
1023 machine_get_dumpdtb, machine_set_dumpdtb);
1024 object_class_property_set_description(oc, "dumpdtb",
1025 "Dump current dtb to a file and quit");
1026
1027 object_class_property_add(oc, "boot", "BootConfiguration",
1028 machine_get_boot, machine_set_boot,
1029 NULL, NULL);
1030 object_class_property_set_description(oc, "boot",
1031 "Boot configuration");
1032
1033 object_class_property_add(oc, "smp", "SMPConfiguration",
1034 machine_get_smp, machine_set_smp,
1035 NULL, NULL);
1036 object_class_property_set_description(oc, "smp",
1037 "CPU topology");
1038
1039 object_class_property_add(oc, "phandle-start", "int",
1040 machine_get_phandle_start, machine_set_phandle_start,
1041 NULL, NULL);
1042 object_class_property_set_description(oc, "phandle-start",
1043 "The first phandle ID we may generate dynamically");
1044
1045 object_class_property_add_str(oc, "dt-compatible",
1046 machine_get_dt_compatible, machine_set_dt_compatible);
1047 object_class_property_set_description(oc, "dt-compatible",
1048 "Overrides the \"compatible\" property of the dt root node");
1049
1050 object_class_property_add_bool(oc, "dump-guest-core",
1051 machine_get_dump_guest_core, machine_set_dump_guest_core);
1052 object_class_property_set_description(oc, "dump-guest-core",
1053 "Include guest memory in a core dump");
1054
1055 object_class_property_add_bool(oc, "mem-merge",
1056 machine_get_mem_merge, machine_set_mem_merge);
1057 object_class_property_set_description(oc, "mem-merge",
1058 "Enable/disable memory merge support");
1059
1060 object_class_property_add_bool(oc, "usb",
1061 machine_get_usb, machine_set_usb);
1062 object_class_property_set_description(oc, "usb",
1063 "Set on/off to enable/disable usb");
1064
1065 object_class_property_add_bool(oc, "graphics",
1066 machine_get_graphics, machine_set_graphics);
1067 object_class_property_set_description(oc, "graphics",
1068 "Set on/off to enable/disable graphics emulation");
1069
1070 object_class_property_add_str(oc, "firmware",
1071 machine_get_firmware, machine_set_firmware);
1072 object_class_property_set_description(oc, "firmware",
1073 "Firmware image");
1074
1075 object_class_property_add_bool(oc, "suppress-vmdesc",
1076 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
1077 object_class_property_set_description(oc, "suppress-vmdesc",
1078 "Set on to disable self-describing migration");
1079
1080 object_class_property_add_link(oc, "confidential-guest-support",
1081 TYPE_CONFIDENTIAL_GUEST_SUPPORT,
1082 offsetof(MachineState, cgs),
1083 machine_check_confidential_guest_support,
1084 OBJ_PROP_LINK_STRONG);
1085 object_class_property_set_description(oc, "confidential-guest-support",
1086 "Set confidential guest scheme to support");
1087
1088 /* For compatibility */
1089 object_class_property_add_str(oc, "memory-encryption",
1090 machine_get_memory_encryption, machine_set_memory_encryption);
1091 object_class_property_set_description(oc, "memory-encryption",
1092 "Set memory encryption object to use");
1093
1094 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND,
1095 offsetof(MachineState, memdev), object_property_allow_set_link,
1096 OBJ_PROP_LINK_STRONG);
1097 object_class_property_set_description(oc, "memory-backend",
1098 "Set RAM backend"
1099 "Valid value is ID of hostmem based backend");
1100
1101 object_class_property_add(oc, "memory", "MemorySizeConfiguration",
1102 machine_get_mem, machine_set_mem,
1103 NULL, NULL);
1104 object_class_property_set_description(oc, "memory",
1105 "Memory size configuration");
1106 }
1107
machine_class_base_init(ObjectClass * oc,void * data)1108 static void machine_class_base_init(ObjectClass *oc, void *data)
1109 {
1110 MachineClass *mc = MACHINE_CLASS(oc);
1111 mc->max_cpus = mc->max_cpus ?: 1;
1112 mc->min_cpus = mc->min_cpus ?: 1;
1113 mc->default_cpus = mc->default_cpus ?: 1;
1114
1115 if (!object_class_is_abstract(oc)) {
1116 const char *cname = object_class_get_name(oc);
1117 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
1118 mc->name = g_strndup(cname,
1119 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
1120 mc->compat_props = g_ptr_array_new();
1121 }
1122 }
1123
machine_initfn(Object * obj)1124 static void machine_initfn(Object *obj)
1125 {
1126 MachineState *ms = MACHINE(obj);
1127 MachineClass *mc = MACHINE_GET_CLASS(obj);
1128
1129 container_get(obj, "/peripheral");
1130 container_get(obj, "/peripheral-anon");
1131
1132 ms->dump_guest_core = true;
1133 ms->mem_merge = true;
1134 ms->enable_graphics = true;
1135 ms->kernel_cmdline = g_strdup("");
1136 ms->ram_size = mc->default_ram_size;
1137 ms->maxram_size = mc->default_ram_size;
1138
1139 if (mc->nvdimm_supported) {
1140 ms->nvdimms_state = g_new0(NVDIMMState, 1);
1141 object_property_add_bool(obj, "nvdimm",
1142 machine_get_nvdimm, machine_set_nvdimm);
1143 object_property_set_description(obj, "nvdimm",
1144 "Set on/off to enable/disable "
1145 "NVDIMM instantiation");
1146
1147 object_property_add_str(obj, "nvdimm-persistence",
1148 machine_get_nvdimm_persistence,
1149 machine_set_nvdimm_persistence);
1150 object_property_set_description(obj, "nvdimm-persistence",
1151 "Set NVDIMM persistence"
1152 "Valid values are cpu, mem-ctrl");
1153 }
1154
1155 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
1156 ms->numa_state = g_new0(NumaState, 1);
1157 object_property_add_bool(obj, "hmat",
1158 machine_get_hmat, machine_set_hmat);
1159 object_property_set_description(obj, "hmat",
1160 "Set on/off to enable/disable "
1161 "ACPI Heterogeneous Memory Attribute "
1162 "Table (HMAT)");
1163 }
1164
1165 /* default to mc->default_cpus */
1166 ms->smp.cpus = mc->default_cpus;
1167 ms->smp.max_cpus = mc->default_cpus;
1168 ms->smp.drawers = 1;
1169 ms->smp.books = 1;
1170 ms->smp.sockets = 1;
1171 ms->smp.dies = 1;
1172 ms->smp.clusters = 1;
1173 ms->smp.modules = 1;
1174 ms->smp.cores = 1;
1175 ms->smp.threads = 1;
1176
1177 machine_copy_boot_config(ms, &(BootConfiguration){ 0 });
1178 }
1179
machine_finalize(Object * obj)1180 static void machine_finalize(Object *obj)
1181 {
1182 MachineState *ms = MACHINE(obj);
1183
1184 machine_free_boot_config(ms);
1185 g_free(ms->kernel_filename);
1186 g_free(ms->initrd_filename);
1187 g_free(ms->kernel_cmdline);
1188 g_free(ms->dtb);
1189 g_free(ms->dumpdtb);
1190 g_free(ms->dt_compatible);
1191 g_free(ms->firmware);
1192 g_free(ms->device_memory);
1193 g_free(ms->nvdimms_state);
1194 g_free(ms->numa_state);
1195 g_free(ms->audiodev);
1196 }
1197
machine_usb(MachineState * machine)1198 bool machine_usb(MachineState *machine)
1199 {
1200 return machine->usb;
1201 }
1202
machine_phandle_start(MachineState * machine)1203 int machine_phandle_start(MachineState *machine)
1204 {
1205 return machine->phandle_start;
1206 }
1207
machine_dump_guest_core(MachineState * machine)1208 bool machine_dump_guest_core(MachineState *machine)
1209 {
1210 return machine->dump_guest_core;
1211 }
1212
machine_mem_merge(MachineState * machine)1213 bool machine_mem_merge(MachineState *machine)
1214 {
1215 return machine->mem_merge;
1216 }
1217
machine_require_guest_memfd(MachineState * machine)1218 bool machine_require_guest_memfd(MachineState *machine)
1219 {
1220 return machine->require_guest_memfd;
1221 }
1222
cpu_slot_to_string(const CPUArchId * cpu)1223 static char *cpu_slot_to_string(const CPUArchId *cpu)
1224 {
1225 GString *s = g_string_new(NULL);
1226 if (cpu->props.has_socket_id) {
1227 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1228 }
1229 if (cpu->props.has_die_id) {
1230 if (s->len) {
1231 g_string_append_printf(s, ", ");
1232 }
1233 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1234 }
1235 if (cpu->props.has_cluster_id) {
1236 if (s->len) {
1237 g_string_append_printf(s, ", ");
1238 }
1239 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id);
1240 }
1241 if (cpu->props.has_module_id) {
1242 if (s->len) {
1243 g_string_append_printf(s, ", ");
1244 }
1245 g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id);
1246 }
1247 if (cpu->props.has_core_id) {
1248 if (s->len) {
1249 g_string_append_printf(s, ", ");
1250 }
1251 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1252 }
1253 if (cpu->props.has_thread_id) {
1254 if (s->len) {
1255 g_string_append_printf(s, ", ");
1256 }
1257 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1258 }
1259 return g_string_free(s, false);
1260 }
1261
numa_validate_initiator(NumaState * numa_state)1262 static void numa_validate_initiator(NumaState *numa_state)
1263 {
1264 int i;
1265 NodeInfo *numa_info = numa_state->nodes;
1266
1267 for (i = 0; i < numa_state->num_nodes; i++) {
1268 if (numa_info[i].initiator == MAX_NODES) {
1269 continue;
1270 }
1271
1272 if (!numa_info[numa_info[i].initiator].present) {
1273 error_report("NUMA node %" PRIu16 " is missing, use "
1274 "'-numa node' option to declare it first",
1275 numa_info[i].initiator);
1276 exit(1);
1277 }
1278
1279 if (!numa_info[numa_info[i].initiator].has_cpu) {
1280 error_report("The initiator of NUMA node %d is invalid", i);
1281 exit(1);
1282 }
1283 }
1284 }
1285
machine_numa_finish_cpu_init(MachineState * machine)1286 static void machine_numa_finish_cpu_init(MachineState *machine)
1287 {
1288 int i;
1289 bool default_mapping;
1290 GString *s = g_string_new(NULL);
1291 MachineClass *mc = MACHINE_GET_CLASS(machine);
1292 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1293
1294 assert(machine->numa_state->num_nodes);
1295 for (i = 0; i < possible_cpus->len; i++) {
1296 if (possible_cpus->cpus[i].props.has_node_id) {
1297 break;
1298 }
1299 }
1300 default_mapping = (i == possible_cpus->len);
1301
1302 for (i = 0; i < possible_cpus->len; i++) {
1303 const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1304
1305 if (!cpu_slot->props.has_node_id) {
1306 /* fetch default mapping from board and enable it */
1307 CpuInstanceProperties props = cpu_slot->props;
1308
1309 props.node_id = mc->get_default_cpu_node_id(machine, i);
1310 if (!default_mapping) {
1311 /* record slots with not set mapping,
1312 * TODO: make it hard error in future */
1313 char *cpu_str = cpu_slot_to_string(cpu_slot);
1314 g_string_append_printf(s, "%sCPU %d [%s]",
1315 s->len ? ", " : "", i, cpu_str);
1316 g_free(cpu_str);
1317
1318 /* non mapped cpus used to fallback to node 0 */
1319 props.node_id = 0;
1320 }
1321
1322 props.has_node_id = true;
1323 machine_set_cpu_numa_node(machine, &props, &error_fatal);
1324 }
1325 }
1326
1327 if (machine->numa_state->hmat_enabled) {
1328 numa_validate_initiator(machine->numa_state);
1329 }
1330
1331 if (s->len && !qtest_enabled()) {
1332 warn_report("CPU(s) not present in any NUMA nodes: %s",
1333 s->str);
1334 warn_report("All CPU(s) up to maxcpus should be described "
1335 "in NUMA config, ability to start up with partial NUMA "
1336 "mappings is obsoleted and will be removed in future");
1337 }
1338 g_string_free(s, true);
1339 }
1340
validate_cpu_cluster_to_numa_boundary(MachineState * ms)1341 static void validate_cpu_cluster_to_numa_boundary(MachineState *ms)
1342 {
1343 MachineClass *mc = MACHINE_GET_CLASS(ms);
1344 NumaState *state = ms->numa_state;
1345 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms);
1346 const CPUArchId *cpus = possible_cpus->cpus;
1347 int i, j;
1348
1349 if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) {
1350 return;
1351 }
1352
1353 /*
1354 * The Linux scheduling domain can't be parsed when the multiple CPUs
1355 * in one cluster have been associated with different NUMA nodes. However,
1356 * it's fine to associate one NUMA node with CPUs in different clusters.
1357 */
1358 for (i = 0; i < possible_cpus->len; i++) {
1359 for (j = i + 1; j < possible_cpus->len; j++) {
1360 if (cpus[i].props.has_socket_id &&
1361 cpus[i].props.has_cluster_id &&
1362 cpus[i].props.has_node_id &&
1363 cpus[j].props.has_socket_id &&
1364 cpus[j].props.has_cluster_id &&
1365 cpus[j].props.has_node_id &&
1366 cpus[i].props.socket_id == cpus[j].props.socket_id &&
1367 cpus[i].props.cluster_id == cpus[j].props.cluster_id &&
1368 cpus[i].props.node_id != cpus[j].props.node_id) {
1369 warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64
1370 " have been associated with node-%" PRId64 " and node-%" PRId64
1371 " respectively. It can cause OSes like Linux to"
1372 " misbehave", i, j, cpus[i].props.socket_id,
1373 cpus[i].props.cluster_id, cpus[i].props.node_id,
1374 cpus[j].props.node_id);
1375 }
1376 }
1377 }
1378 }
1379
machine_consume_memdev(MachineState * machine,HostMemoryBackend * backend)1380 MemoryRegion *machine_consume_memdev(MachineState *machine,
1381 HostMemoryBackend *backend)
1382 {
1383 MemoryRegion *ret = host_memory_backend_get_memory(backend);
1384
1385 if (host_memory_backend_is_mapped(backend)) {
1386 error_report("memory backend %s can't be used multiple times.",
1387 object_get_canonical_path_component(OBJECT(backend)));
1388 exit(EXIT_FAILURE);
1389 }
1390 host_memory_backend_set_mapped(backend, true);
1391 vmstate_register_ram_global(ret);
1392 return ret;
1393 }
1394
create_default_memdev(MachineState * ms,const char * path,Error ** errp)1395 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp)
1396 {
1397 Object *obj;
1398 MachineClass *mc = MACHINE_GET_CLASS(ms);
1399 bool r = false;
1400
1401 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM);
1402 if (path) {
1403 if (!object_property_set_str(obj, "mem-path", path, errp)) {
1404 goto out;
1405 }
1406 }
1407 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) {
1408 goto out;
1409 }
1410 object_property_add_child(object_get_objects_root(), mc->default_ram_id,
1411 obj);
1412 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1413 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id",
1414 false, errp)) {
1415 goto out;
1416 }
1417 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) {
1418 goto out;
1419 }
1420 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp);
1421
1422 out:
1423 object_unref(obj);
1424 return r;
1425 }
1426
machine_class_default_cpu_type(MachineClass * mc)1427 const char *machine_class_default_cpu_type(MachineClass *mc)
1428 {
1429 if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) {
1430 /* Only a single CPU type allowed: use it as default. */
1431 return mc->valid_cpu_types[0];
1432 }
1433 return mc->default_cpu_type;
1434 }
1435
is_cpu_type_supported(const MachineState * machine,Error ** errp)1436 static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
1437 {
1438 MachineClass *mc = MACHINE_GET_CLASS(machine);
1439 ObjectClass *oc = object_class_by_name(machine->cpu_type);
1440 CPUClass *cc;
1441 int i;
1442
1443 /*
1444 * Check if the user specified CPU type is supported when the valid
1445 * CPU types have been determined. Note that the user specified CPU
1446 * type is provided through '-cpu' option.
1447 */
1448 if (mc->valid_cpu_types) {
1449 assert(mc->valid_cpu_types[0] != NULL);
1450 for (i = 0; mc->valid_cpu_types[i]; i++) {
1451 if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) {
1452 break;
1453 }
1454 }
1455
1456 /* The user specified CPU type isn't valid */
1457 if (!mc->valid_cpu_types[i]) {
1458 g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
1459 error_setg(errp, "Invalid CPU model: %s", requested);
1460 if (!mc->valid_cpu_types[1]) {
1461 g_autofree char *model = cpu_model_from_type(
1462 mc->valid_cpu_types[0]);
1463 error_append_hint(errp, "The only valid type is: %s\n", model);
1464 } else {
1465 error_append_hint(errp, "The valid models are: ");
1466 for (i = 0; mc->valid_cpu_types[i]; i++) {
1467 g_autofree char *model = cpu_model_from_type(
1468 mc->valid_cpu_types[i]);
1469 error_append_hint(errp, "%s%s",
1470 model,
1471 mc->valid_cpu_types[i + 1] ? ", " : "");
1472 }
1473 error_append_hint(errp, "\n");
1474 }
1475
1476 return false;
1477 }
1478 }
1479
1480 /* Check if CPU type is deprecated and warn if so */
1481 cc = CPU_CLASS(oc);
1482 assert(cc != NULL);
1483 if (cc->deprecation_note) {
1484 warn_report("CPU model %s is deprecated -- %s",
1485 machine->cpu_type, cc->deprecation_note);
1486 }
1487
1488 return true;
1489 }
1490
machine_run_board_init(MachineState * machine,const char * mem_path,Error ** errp)1491 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp)
1492 {
1493 ERRP_GUARD();
1494 MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1495
1496 /* This checkpoint is required by replay to separate prior clock
1497 reading from the other reads, because timer polling functions query
1498 clock values from the log. */
1499 replay_checkpoint(CHECKPOINT_INIT);
1500
1501 if (!xen_enabled()) {
1502 /* On 32-bit hosts, QEMU is limited by virtual address space */
1503 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) {
1504 error_setg(errp, "at most 2047 MB RAM can be simulated");
1505 return;
1506 }
1507 }
1508
1509 if (machine->memdev) {
1510 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev),
1511 "size", &error_abort);
1512 if (backend_size != machine->ram_size) {
1513 error_setg(errp, "Machine memory size does not match the size of the memory backend");
1514 return;
1515 }
1516 } else if (machine_class->default_ram_id && machine->ram_size &&
1517 numa_uses_legacy_mem()) {
1518 if (object_property_find(object_get_objects_root(),
1519 machine_class->default_ram_id)) {
1520 error_setg(errp, "object's id '%s' is reserved for the default"
1521 " RAM backend, it can't be used for any other purposes",
1522 machine_class->default_ram_id);
1523 error_append_hint(errp,
1524 "Change the object's 'id' to something else or disable"
1525 " automatic creation of the default RAM backend by setting"
1526 " 'memory-backend=%s' with '-machine'.\n",
1527 machine_class->default_ram_id);
1528 return;
1529 }
1530 if (!create_default_memdev(current_machine, mem_path, errp)) {
1531 return;
1532 }
1533 }
1534
1535 if (machine->numa_state) {
1536 numa_complete_configuration(machine);
1537 if (machine->numa_state->num_nodes) {
1538 machine_numa_finish_cpu_init(machine);
1539 if (machine_class->cpu_cluster_has_numa_boundary) {
1540 validate_cpu_cluster_to_numa_boundary(machine);
1541 }
1542 }
1543 }
1544
1545 if (!machine->ram && machine->memdev) {
1546 machine->ram = machine_consume_memdev(machine, machine->memdev);
1547 }
1548
1549 /* Check if the CPU type is supported */
1550 if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) {
1551 return;
1552 }
1553
1554 if (machine->cgs) {
1555 /*
1556 * With confidential guests, the host can't see the real
1557 * contents of RAM, so there's no point in it trying to merge
1558 * areas.
1559 */
1560 machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1561
1562 /*
1563 * Virtio devices can't count on directly accessing guest
1564 * memory, so they need iommu_platform=on to use normal DMA
1565 * mechanisms. That requires also disabling legacy virtio
1566 * support for those virtio pci devices which allow it.
1567 */
1568 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1569 "on", true);
1570 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1571 "on", false);
1572 }
1573
1574 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator));
1575 machine_class->init(machine);
1576 phase_advance(PHASE_MACHINE_INITIALIZED);
1577 }
1578
1579 static NotifierList machine_init_done_notifiers =
1580 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1581
qemu_add_machine_init_done_notifier(Notifier * notify)1582 void qemu_add_machine_init_done_notifier(Notifier *notify)
1583 {
1584 notifier_list_add(&machine_init_done_notifiers, notify);
1585 if (phase_check(PHASE_MACHINE_READY)) {
1586 notify->notify(notify, NULL);
1587 }
1588 }
1589
qemu_remove_machine_init_done_notifier(Notifier * notify)1590 void qemu_remove_machine_init_done_notifier(Notifier *notify)
1591 {
1592 notifier_remove(notify);
1593 }
1594
qdev_machine_creation_done(void)1595 void qdev_machine_creation_done(void)
1596 {
1597 cpu_synchronize_all_post_init();
1598
1599 if (current_machine->boot_config.once) {
1600 qemu_boot_set(current_machine->boot_config.once, &error_fatal);
1601 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order));
1602 }
1603
1604 /*
1605 * ok, initial machine setup is done, starting from now we can
1606 * only create hotpluggable devices
1607 */
1608 phase_advance(PHASE_MACHINE_READY);
1609 qdev_assert_realized_properly();
1610
1611 /* TODO: once all bus devices are qdevified, this should be done
1612 * when bus is created by qdev.c */
1613 /*
1614 * This is where we arrange for the sysbus to be reset when the
1615 * whole simulation is reset. In turn, resetting the sysbus will cause
1616 * all devices hanging off it (and all their child buses, recursively)
1617 * to be reset. Note that this will *not* reset any Device objects
1618 * which are not attached to some part of the qbus tree!
1619 */
1620 qemu_register_resettable(OBJECT(sysbus_get_default()));
1621
1622 notifier_list_notify(&machine_init_done_notifiers, NULL);
1623
1624 if (rom_check_and_register_reset() != 0) {
1625 exit(1);
1626 }
1627
1628 replay_start();
1629
1630 /* This checkpoint is required by replay to separate prior clock
1631 reading from the other reads, because timer polling functions query
1632 clock values from the log. */
1633 replay_checkpoint(CHECKPOINT_RESET);
1634 qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1635 register_global_state();
1636 }
1637
1638 static const TypeInfo machine_info = {
1639 .name = TYPE_MACHINE,
1640 .parent = TYPE_OBJECT,
1641 .abstract = true,
1642 .class_size = sizeof(MachineClass),
1643 .class_init = machine_class_init,
1644 .class_base_init = machine_class_base_init,
1645 .instance_size = sizeof(MachineState),
1646 .instance_init = machine_initfn,
1647 .instance_finalize = machine_finalize,
1648 };
1649
machine_register_types(void)1650 static void machine_register_types(void)
1651 {
1652 type_register_static(&machine_info);
1653 }
1654
1655 type_init(machine_register_types)
1656