1 /* $FreeBSD: src/sys/dev/iir/iir.c,v 1.24 2010/01/08 15:47:23 trasz Exp $ */
2 /*-
3 * Copyright (c) 2000-04 ICP vortex GmbH
4 * Copyright (c) 2002-04 Intel Corporation
5 * Copyright (c) 2003-04 Adaptec Inc.
6 * All Rights Reserved
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions, and the following disclaimer,
13 * without modification, immediately at the beginning of the file.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 /*
34 * iir.c: SCSI dependant code for the Intel Integrated RAID Controller driver
35 *
36 * Written by: Achim Leubner <achim_leubner@adaptec.com>
37 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>
38 *
39 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers.
40 * Mike Smith; Some driver source code.
41 * FreeBSD.ORG; Great O/S to work on and for.
42 *
43 * $Id: iir.c 1.5 2004/03/30 10:17:53 achim Exp $"
44 */
45
46
47 #define _IIR_C_
48
49 /* #include "opt_iir.h" */
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/types.h>
53 #include <sys/endian.h>
54 #include <sys/eventhandler.h>
55 #include <sys/malloc.h>
56 #include <sys/kernel.h>
57 #include <sys/bus.h>
58 #include <sys/thread2.h>
59
60 #include <machine/stdarg.h>
61
62 #include <bus/cam/cam.h>
63 #include <bus/cam/cam_ccb.h>
64 #include <bus/cam/cam_sim.h>
65 #include <bus/cam/cam_xpt_sim.h>
66 #include <bus/cam/cam_debug.h>
67 #include <bus/cam/scsi/scsi_all.h>
68 #include <bus/cam/scsi/scsi_message.h>
69 #include "pcidevs.h"
70
71 #include <dev/raid/iir/iir.h>
72
73 MALLOC_DEFINE(M_GDTBUF, "iirbuf", "iir driver buffer");
74
75 struct gdt_softc *gdt_wait_gdt;
76 int gdt_wait_index;
77
78 #ifdef GDT_DEBUG
79 int gdt_debug = GDT_DEBUG;
80 #ifdef __SERIAL__
81 #define MAX_SERBUF 160
82 static void ser_init(void);
83 static void ser_puts(char *str);
84 static void ser_putc(int c);
85 static char strbuf[MAX_SERBUF+1];
86 #ifdef __COM2__
87 #define COM_BASE 0x2f8
88 #else
89 #define COM_BASE 0x3f8
90 #endif
ser_init()91 static void ser_init()
92 {
93 unsigned port=COM_BASE;
94
95 outb(port+3, 0x80);
96 outb(port+1, 0);
97 /* 19200 Baud, if 9600: outb(12,port) */
98 outb(port, 6);
99 outb(port+3, 3);
100 outb(port+1, 0);
101 }
102
ser_puts(char * str)103 static void ser_puts(char *str)
104 {
105 char *ptr;
106
107 ser_init();
108 for (ptr=str;*ptr;++ptr)
109 ser_putc((int)(*ptr));
110 }
111
ser_putc(int c)112 static void ser_putc(int c)
113 {
114 unsigned port=COM_BASE;
115
116 while ((inb(port+5) & 0x20)==0);
117 outb(port, c);
118 if (c==0x0a)
119 {
120 while ((inb(port+5) & 0x20)==0);
121 outb(port, 0x0d);
122 }
123 }
124
125 int
ser_kprintf(const char * fmt,...)126 ser_kprintf(const char *fmt, ...)
127 {
128 __va_list args;
129 int i;
130
131 __va_start(args,fmt);
132 i = kvsprintf(strbuf,fmt,args);
133 ser_puts(strbuf);
134 __va_end(args);
135 return i;
136 }
137 #endif
138 #endif
139
140 /* The linked list of softc structures */
141 struct gdt_softc_list gdt_softcs = TAILQ_HEAD_INITIALIZER(gdt_softcs);
142 /* controller cnt. */
143 int gdt_cnt = 0;
144 /* event buffer */
145 static gdt_evt_str ebuffer[GDT_MAX_EVENTS];
146 static int elastidx, eoldidx;
147 /* statistics */
148 gdt_statist_t gdt_stat;
149
150 /* Definitions for our use of the SIM private CCB area */
151 #define ccb_sim_ptr spriv_ptr0
152 #define ccb_priority spriv_field1
153
154 static void iir_action(struct cam_sim *sim, union ccb *ccb);
155 static void iir_poll(struct cam_sim *sim);
156 static void iir_shutdown(void *arg, int howto);
157 static void iir_timeout(void *arg);
158
159 static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads,
160 int *secs);
161 static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb,
162 u_int8_t service, u_int16_t opcode,
163 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3);
164 static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb,
165 int timeout);
166
167 static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt);
168
169 static int gdt_sync_event(struct gdt_softc *gdt, int service,
170 u_int8_t index, struct gdt_ccb *gccb);
171 static int gdt_async_event(struct gdt_softc *gdt, int service);
172 static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb);
173 static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb);
174 static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd);
175 static void gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb);
176
177 static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs,
178 int nseg, int error);
179 static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs,
180 int nseg, int error);
181
182 int
iir_init(struct gdt_softc * gdt)183 iir_init(struct gdt_softc *gdt)
184 {
185 u_int16_t cdev_cnt;
186 int i, id, drv_cyls, drv_hds, drv_secs;
187 struct gdt_ccb *gccb;
188
189 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n"));
190
191 gdt->sc_state = GDT_POLLING;
192 gdt_clear_events();
193 bzero(&gdt_stat, sizeof(gdt_statist_t));
194
195 SLIST_INIT(&gdt->sc_free_gccb);
196 SLIST_INIT(&gdt->sc_pending_gccb);
197 TAILQ_INIT(&gdt->sc_ccb_queue);
198 TAILQ_INIT(&gdt->sc_ucmd_queue);
199 TAILQ_INSERT_TAIL(&gdt_softcs, gdt, links);
200
201 /* DMA tag for mapping buffers into device visible space. */
202 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0,
203 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
204 /*highaddr*/BUS_SPACE_MAXADDR,
205 /*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG,
206 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
207 /*flags*/BUS_DMA_ALLOCNOW,
208 &gdt->sc_buffer_dmat) != 0) {
209 kprintf("iir%d: bus_dma_tag_create(...,gdt->sc_buffer_dmat) failed\n",
210 gdt->sc_hanum);
211 return (1);
212 }
213 gdt->sc_init_level++;
214
215 /* DMA tag for our ccb structures */
216 if (bus_dma_tag_create(gdt->sc_parent_dmat,
217 /*alignment*/1,
218 /*boundary*/0,
219 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
220 /*highaddr*/BUS_SPACE_MAXADDR,
221 GDT_MAXCMDS * GDT_SCRATCH_SZ, /* maxsize */
222 /*nsegments*/1,
223 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
224 /*flags*/0, &gdt->sc_gcscratch_dmat) != 0) {
225 kprintf("iir%d: bus_dma_tag_create(...,gdt->sc_gcscratch_dmat) failed\n",
226 gdt->sc_hanum);
227 return (1);
228 }
229 gdt->sc_init_level++;
230
231 /* Allocation for our ccb scratch area */
232 if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void *)&gdt->sc_gcscratch,
233 BUS_DMA_NOWAIT, &gdt->sc_gcscratch_dmamap) != 0) {
234 kprintf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gcscratch,...) failed\n",
235 gdt->sc_hanum);
236 return (1);
237 }
238 gdt->sc_init_level++;
239
240 /* And permanently map them */
241 bus_dmamap_load(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap,
242 gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ,
243 gdtmapmem, &gdt->sc_gcscratch_busbase, /*flags*/0);
244 gdt->sc_init_level++;
245
246 /* Clear them out. */
247 bzero(gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ);
248
249 /* Initialize the ccbs */
250 gdt->sc_gccbs = kmalloc(sizeof(struct gdt_ccb) * GDT_MAXCMDS, M_GDTBUF,
251 M_INTWAIT | M_ZERO);
252 if (gdt->sc_gccbs == NULL) {
253 kprintf("iir%d: no memory for gccbs.\n", gdt->sc_hanum);
254 return (1);
255 }
256 for (i = GDT_MAXCMDS-1; i >= 0; i--) {
257 gccb = &gdt->sc_gccbs[i];
258 gccb->gc_cmd_index = i + 2;
259 gccb->gc_flags = GDT_GCF_UNUSED;
260 gccb->gc_map_flag = FALSE;
261 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0,
262 &gccb->gc_dmamap) != 0)
263 return(1);
264 gccb->gc_map_flag = TRUE;
265 gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i];
266 gccb->gc_scratch_busbase = gdt->sc_gcscratch_busbase + GDT_SCRATCH_SZ * i;
267 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle);
268 }
269 gdt->sc_init_level++;
270
271 /* create the control device */
272 gdt->sc_dev = gdt_make_dev(gdt->sc_hanum);
273
274 /* allocate ccb for gdt_internal_cmd() */
275 gccb = gdt_get_ccb(gdt);
276 if (gccb == NULL) {
277 kprintf("iir%d: No free command index found\n",
278 gdt->sc_hanum);
279 return (1);
280 }
281 bzero(gccb->gc_cmd, GDT_CMD_SZ);
282
283 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT,
284 0, 0, 0)) {
285 kprintf("iir%d: Screen service initialization error %d\n",
286 gdt->sc_hanum, gdt->sc_status);
287 gdt_free_ccb(gdt, gccb);
288 return (1);
289 }
290
291 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO,
292 0, 0, 0);
293
294 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT,
295 GDT_LINUX_OS, 0, 0)) {
296 kprintf("iir%d: Cache service initialization error %d\n",
297 gdt->sc_hanum, gdt->sc_status);
298 gdt_free_ccb(gdt, gccb);
299 return (1);
300 }
301 cdev_cnt = (u_int16_t)gdt->sc_info;
302 gdt->sc_fw_vers = gdt->sc_service;
303
304 /* Detect number of buses */
305 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST);
306 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS;
307 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0;
308 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1;
309 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ);
310 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
311 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL,
312 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) {
313 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT];
314 for (i = 0; i < gdt->sc_bus_cnt; i++) {
315 id = gccb->gc_scratch[GDT_IOC_HDR_SZ +
316 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID];
317 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff;
318 }
319 } else {
320 /* New method failed, use fallback. */
321 for (i = 0; i < GDT_MAXBUS; i++) {
322 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i);
323 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
324 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN,
325 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL,
326 GDT_GETCH_SZ)) {
327 if (i == 0) {
328 kprintf("iir%d: Cannot get channel count, "
329 "error %d\n", gdt->sc_hanum, gdt->sc_status);
330 gdt_free_ccb(gdt, gccb);
331 return (1);
332 }
333 break;
334 }
335 gdt->sc_bus_id[i] =
336 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ?
337 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff;
338 }
339 gdt->sc_bus_cnt = i;
340 }
341 /* add one "virtual" channel for the host drives */
342 gdt->sc_virt_bus = gdt->sc_bus_cnt;
343 gdt->sc_bus_cnt++;
344
345 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT,
346 0, 0, 0)) {
347 kprintf("iir%d: Raw service initialization error %d\n",
348 gdt->sc_hanum, gdt->sc_status);
349 gdt_free_ccb(gdt, gccb);
350 return (1);
351 }
352
353 /* Set/get features raw service (scatter/gather) */
354 gdt->sc_raw_feat = 0;
355 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT,
356 GDT_SCATTER_GATHER, 0, 0)) {
357 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT,
358 0, 0, 0)) {
359 gdt->sc_raw_feat = gdt->sc_info;
360 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) {
361 panic("iir%d: Scatter/Gather Raw Service "
362 "required but not supported!\n", gdt->sc_hanum);
363 gdt_free_ccb(gdt, gccb);
364 return (1);
365 }
366 }
367 }
368
369 /* Set/get features cache service (scatter/gather) */
370 gdt->sc_cache_feat = 0;
371 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT,
372 0, GDT_SCATTER_GATHER, 0)) {
373 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT,
374 0, 0, 0)) {
375 gdt->sc_cache_feat = gdt->sc_info;
376 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) {
377 panic("iir%d: Scatter/Gather Cache Service "
378 "required but not supported!\n", gdt->sc_hanum);
379 gdt_free_ccb(gdt, gccb);
380 return (1);
381 }
382 }
383 }
384
385 /* OEM */
386 gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01);
387 gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t));
388 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
389 GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL,
390 sizeof(gdt_oem_str_record_t))) {
391 strncpy(gdt->oem_name, ((gdt_oem_str_record_t *)
392 gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7);
393 gdt->oem_name[7]='\0';
394 } else {
395 /* Old method, based on PCI ID */
396 if (gdt->sc_vendor == PCI_VENDOR_INTEL)
397 strcpy(gdt->oem_name,"Intel ");
398 else
399 strcpy(gdt->oem_name,"ICP ");
400 }
401
402 /* Scan for cache devices */
403 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) {
404 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO,
405 i, 0, 0)) {
406 gdt->sc_hdr[i].hd_present = 1;
407 gdt->sc_hdr[i].hd_size = gdt->sc_info;
408
409 /*
410 * Evaluate mapping (sectors per head, heads per cyl)
411 */
412 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32;
413 if (gdt->sc_info2 == 0)
414 gdt_eval_mapping(gdt->sc_hdr[i].hd_size,
415 &drv_cyls, &drv_hds, &drv_secs);
416 else {
417 drv_hds = gdt->sc_info2 & 0xff;
418 drv_secs = (gdt->sc_info2 >> 8) & 0xff;
419 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds /
420 drv_secs;
421 }
422 gdt->sc_hdr[i].hd_heads = drv_hds;
423 gdt->sc_hdr[i].hd_secs = drv_secs;
424 /* Round the size */
425 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs;
426
427 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE,
428 GDT_DEVTYPE, i, 0, 0))
429 gdt->sc_hdr[i].hd_devtype = gdt->sc_info;
430 }
431 }
432
433 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n",
434 gdt->sc_dpmembase,
435 gdt->sc_bus_cnt, cdev_cnt,
436 cdev_cnt == 1 ? "" : "s"));
437 gdt_free_ccb(gdt, gccb);
438
439 gdt_cnt++;
440 return (0);
441 }
442
443 void
iir_free(struct gdt_softc * gdt)444 iir_free(struct gdt_softc *gdt)
445 {
446 int i;
447
448 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n"));
449
450 switch (gdt->sc_init_level) {
451 default:
452 gdt_destroy_dev(gdt->sc_dev);
453 case 5:
454 for (i = GDT_MAXCMDS-1; i >= 0; i--)
455 if (gdt->sc_gccbs[i].gc_map_flag)
456 bus_dmamap_destroy(gdt->sc_buffer_dmat,
457 gdt->sc_gccbs[i].gc_dmamap);
458 bus_dmamap_unload(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap);
459 kfree(gdt->sc_gccbs, M_GDTBUF);
460 case 4:
461 bus_dmamem_free(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch, gdt->sc_gcscratch_dmamap);
462 case 3:
463 bus_dma_tag_destroy(gdt->sc_gcscratch_dmat);
464 case 2:
465 bus_dma_tag_destroy(gdt->sc_buffer_dmat);
466 case 1:
467 bus_dma_tag_destroy(gdt->sc_parent_dmat);
468 case 0:
469 break;
470 }
471 TAILQ_REMOVE(&gdt_softcs, gdt, links);
472 }
473
474 void
iir_attach(struct gdt_softc * gdt)475 iir_attach(struct gdt_softc *gdt)
476 {
477 struct cam_devq *devq;
478 int i;
479
480 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n"));
481
482 /*
483 * Create the device queue for our SIM.
484 * XXX Throttle this down since the card has problems under load.
485 */
486 devq = cam_simq_alloc(32);
487 if (devq == NULL)
488 return;
489
490 for (i = 0; i < gdt->sc_bus_cnt; i++) {
491 /*
492 * Construct our SIM entry
493 */
494 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir",
495 gdt, gdt->sc_hanum, &sim_mplock,
496 /*untagged*/1,
497 /*tagged*/GDT_MAXCMDS, devq);
498 if (xpt_bus_register(gdt->sims[i], i) != CAM_SUCCESS) {
499 cam_sim_free(gdt->sims[i]);
500 break;
501 }
502
503 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL,
504 cam_sim_path(gdt->sims[i]),
505 CAM_TARGET_WILDCARD,
506 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
507 xpt_bus_deregister(cam_sim_path(gdt->sims[i]));
508 cam_sim_free(gdt->sims[i]);
509 break;
510 }
511 }
512 cam_simq_release(devq);
513 if (i > 0)
514 EVENTHANDLER_REGISTER(shutdown_post_sync, iir_shutdown,
515 gdt, SHUTDOWN_PRI_DRIVER);
516 gdt->sc_state = GDT_NORMAL;
517 }
518
519 static void
gdt_eval_mapping(u_int32_t size,int * cyls,int * heads,int * secs)520 gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs)
521 {
522 *cyls = size / GDT_HEADS / GDT_SECS;
523 if (*cyls < GDT_MAXCYLS) {
524 *heads = GDT_HEADS;
525 *secs = GDT_SECS;
526 } else {
527 /* Too high for 64 * 32 */
528 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS;
529 if (*cyls < GDT_MAXCYLS) {
530 *heads = GDT_MEDHEADS;
531 *secs = GDT_MEDSECS;
532 } else {
533 /* Too high for 127 * 63 */
534 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS;
535 *heads = GDT_BIGHEADS;
536 *secs = GDT_BIGSECS;
537 }
538 }
539 }
540
541 static int
gdt_wait(struct gdt_softc * gdt,struct gdt_ccb * gccb,int timeout)542 gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb,
543 int timeout)
544 {
545 int rv = 0;
546
547 GDT_DPRINTF(GDT_D_INIT,
548 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout));
549
550 gdt->sc_state |= GDT_POLL_WAIT;
551 do {
552 iir_intr(gdt);
553 if (gdt == gdt_wait_gdt &&
554 gccb->gc_cmd_index == gdt_wait_index) {
555 rv = 1;
556 break;
557 }
558 DELAY(1);
559 } while (--timeout);
560 gdt->sc_state &= ~GDT_POLL_WAIT;
561
562 while (gdt->sc_test_busy(gdt))
563 DELAY(1); /* XXX correct? */
564
565 return (rv);
566 }
567
568 static int
gdt_internal_cmd(struct gdt_softc * gdt,struct gdt_ccb * gccb,u_int8_t service,u_int16_t opcode,u_int32_t arg1,u_int32_t arg2,u_int32_t arg3)569 gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb,
570 u_int8_t service, u_int16_t opcode,
571 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3)
572 {
573 int retries;
574
575 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n",
576 gdt, service, opcode, arg1, arg2, arg3));
577
578 bzero(gccb->gc_cmd, GDT_CMD_SZ);
579
580 for (retries = GDT_RETRIES; ; ) {
581 gccb->gc_service = service;
582 gccb->gc_flags = GDT_GCF_INTERNAL;
583
584 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
585 gccb->gc_cmd_index);
586 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode);
587
588 switch (service) {
589 case GDT_CACHESERVICE:
590 if (opcode == GDT_IOCTL) {
591 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
592 GDT_IOCTL_SUBFUNC, arg1);
593 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
594 GDT_IOCTL_CHANNEL, arg2);
595 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION +
596 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3);
597 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM,
598 gccb->gc_scratch_busbase);
599 } else {
600 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION +
601 GDT_CACHE_DEVICENO, (u_int16_t)arg1);
602 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
603 GDT_CACHE_BLOCKNO, arg2);
604 }
605 break;
606
607 case GDT_SCSIRAWSERVICE:
608 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
609 GDT_RAW_DIRECTION, arg1);
610 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
611 (u_int8_t)arg2;
612 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
613 (u_int8_t)arg3;
614 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
615 (u_int8_t)(arg3 >> 8);
616 }
617
618 gdt->sc_set_sema0(gdt);
619 gccb->gc_cmd_len = GDT_CMD_SZ;
620 gdt->sc_cmd_off = 0;
621 gdt->sc_cmd_cnt = 0;
622 gdt->sc_copy_cmd(gdt, gccb);
623 gdt->sc_release_event(gdt);
624 DELAY(20);
625 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT))
626 return (0);
627 if (gdt->sc_status != GDT_S_BSY || --retries == 0)
628 break;
629 DELAY(1);
630 }
631 return (gdt->sc_status == GDT_S_OK);
632 }
633
634 static struct gdt_ccb *
gdt_get_ccb(struct gdt_softc * gdt)635 gdt_get_ccb(struct gdt_softc *gdt)
636 {
637 struct gdt_ccb *gccb;
638
639 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt));
640
641 crit_enter();
642 gccb = SLIST_FIRST(&gdt->sc_free_gccb);
643 if (gccb != NULL) {
644 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle);
645 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle);
646 ++gdt_stat.cmd_index_act;
647 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max)
648 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act;
649 }
650 crit_exit();
651 return (gccb);
652 }
653
654 void
gdt_free_ccb(struct gdt_softc * gdt,struct gdt_ccb * gccb)655 gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb)
656 {
657 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb));
658
659 crit_enter();
660 gccb->gc_flags = GDT_GCF_UNUSED;
661 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle);
662 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle);
663 --gdt_stat.cmd_index_act;
664 crit_exit();
665 if (gdt->sc_state & GDT_SHUTDOWN)
666 wakeup(gccb);
667 }
668
669 void
gdt_next(struct gdt_softc * gdt)670 gdt_next(struct gdt_softc *gdt)
671 {
672 union ccb *ccb;
673 gdt_ucmd_t *ucmd;
674 struct cam_sim *sim;
675 int bus, target, lun;
676 int next_cmd;
677
678 struct ccb_scsiio *csio;
679 struct ccb_hdr *ccbh;
680 struct gdt_ccb *gccb = NULL;
681 u_int8_t cmd;
682
683 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt));
684
685 crit_enter();
686 if (gdt->sc_test_busy(gdt)) {
687 if (!(gdt->sc_state & GDT_POLLING)) {
688 crit_exit();
689 return;
690 }
691 while (gdt->sc_test_busy(gdt))
692 DELAY(1);
693 }
694
695 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0;
696 next_cmd = TRUE;
697 for (;;) {
698 /* I/Os in queue? controller ready? */
699 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) &&
700 !TAILQ_FIRST(&gdt->sc_ccb_queue))
701 break;
702
703 /* 1.: I/Os without ccb (IOCTLs) */
704 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue);
705 if (ucmd != NULL) {
706 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links);
707 if ((gccb = gdt_ioctl_cmd(gdt, ucmd)) == NULL) {
708 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links);
709 break;
710 }
711 break;
712 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */
713 }
714
715 /* 2.: I/Os with ccb */
716 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue);
717 /* ist dann immer != NULL, da oben getestet */
718 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
719 bus = cam_sim_bus(sim);
720 target = ccb->ccb_h.target_id;
721 lun = ccb->ccb_h.target_lun;
722
723 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
724 --gdt_stat.req_queue_act;
725 /* ccb->ccb_h.func_code is XPT_SCSI_IO */
726 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n",
727 ccb->ccb_h.flags));
728 csio = &ccb->csio;
729 ccbh = &ccb->ccb_h;
730 cmd = csio->cdb_io.cdb_bytes[0];
731 /* Max CDB length is 12 bytes */
732 if (csio->cdb_len > 12) {
733 ccbh->status = CAM_REQ_INVALID;
734 --gdt_stat.io_count_act;
735 xpt_done(ccb);
736 } else if (bus != gdt->sc_virt_bus) {
737 /* raw service command */
738 if ((gccb = gdt_raw_cmd(gdt, ccb)) == NULL) {
739 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h,
740 sim_links.tqe);
741 ++gdt_stat.req_queue_act;
742 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
743 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
744 next_cmd = FALSE;
745 }
746 } else if (target >= GDT_MAX_HDRIVES ||
747 !gdt->sc_hdr[target].hd_present || lun != 0) {
748 ccbh->status = CAM_DEV_NOT_THERE;
749 --gdt_stat.io_count_act;
750 xpt_done(ccb);
751 } else {
752 /* cache service command */
753 if (cmd == READ_6 || cmd == WRITE_6 ||
754 cmd == READ_10 || cmd == WRITE_10) {
755 if ((gccb = gdt_cache_cmd(gdt, ccb)) == NULL) {
756 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h,
757 sim_links.tqe);
758 ++gdt_stat.req_queue_act;
759 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
760 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
761 next_cmd = FALSE;
762 }
763 } else {
764 crit_exit();
765 gdt_internal_cache_cmd(gdt, ccb);
766 crit_enter();
767 }
768 }
769 if ((gdt->sc_state & GDT_POLLING) || !next_cmd)
770 break;
771 }
772 if (gdt->sc_cmd_cnt > 0)
773 gdt->sc_release_event(gdt);
774
775 crit_exit();
776
777 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) {
778 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT);
779 }
780 }
781
782 static struct gdt_ccb *
gdt_raw_cmd(struct gdt_softc * gdt,union ccb * ccb)783 gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb)
784 {
785 struct gdt_ccb *gccb;
786 struct cam_sim *sim;
787
788 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb));
789
790 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) +
791 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET >
792 gdt->sc_ic_all_size) {
793 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_raw_cmd(): DPMEM overflow\n",
794 gdt->sc_hanum));
795 return (NULL);
796 }
797
798 gccb = gdt_get_ccb(gdt);
799 if (gccb == NULL) {
800 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: No free command index found\n",
801 gdt->sc_hanum));
802 return (gccb);
803 }
804 bzero(gccb->gc_cmd, GDT_CMD_SZ);
805 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
806 gccb->gc_ccb = ccb;
807 gccb->gc_service = GDT_SCSIRAWSERVICE;
808 gccb->gc_flags = GDT_GCF_SCSI;
809
810 if (gdt->sc_cmd_cnt == 0)
811 gdt->sc_set_sema0(gdt);
812 crit_exit();
813 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
814 gccb->gc_cmd_index);
815 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE);
816
817 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION,
818 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
819 GDT_DATA_IN : GDT_DATA_OUT);
820 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN,
821 ccb->csio.dxfer_len);
822 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN,
823 ccb->csio.cdb_len);
824 bcopy(ccb->csio.cdb_io.cdb_bytes, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD,
825 ccb->csio.cdb_len);
826 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
827 ccb->ccb_h.target_id;
828 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
829 ccb->ccb_h.target_lun;
830 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
831 cam_sim_bus(sim);
832 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN,
833 sizeof(struct scsi_sense_data));
834 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA,
835 gccb->gc_scratch_busbase);
836
837 /*
838 * If we have any data to send with this command,
839 * map it into bus space.
840 */
841 /* Only use S/G if there is a transfer */
842 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
843 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
844 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) {
845 int error;
846
847 /* vorher unlock von splcam() ??? */
848 crit_enter();
849 error =
850 bus_dmamap_load(gdt->sc_buffer_dmat,
851 gccb->gc_dmamap,
852 ccb->csio.data_ptr,
853 ccb->csio.dxfer_len,
854 gdtexecuteccb,
855 gccb, /*flags*/0);
856 if (error == EINPROGRESS) {
857 xpt_freeze_simq(sim, 1);
858 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
859 }
860 crit_exit();
861 } else {
862 panic("iir: CAM_DATA_PHYS not supported");
863 }
864 } else {
865 struct bus_dma_segment *segs;
866
867 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0)
868 panic("iir%d: iir_action - Physical "
869 "segment pointers unsupported", gdt->sc_hanum);
870
871 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0)
872 panic("iir%d: iir_action - Virtual "
873 "segment addresses unsupported", gdt->sc_hanum);
874
875 /* Just use the segments provided */
876 segs = (struct bus_dma_segment *)ccb->csio.data_ptr;
877 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0);
878 }
879 } else {
880 gdtexecuteccb(gccb, NULL, 0, 0);
881 }
882
883 crit_enter();
884 return (gccb);
885 }
886
887 static struct gdt_ccb *
gdt_cache_cmd(struct gdt_softc * gdt,union ccb * ccb)888 gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb)
889 {
890 struct gdt_ccb *gccb;
891 struct cam_sim *sim;
892 u_int8_t *cmdp;
893 u_int16_t opcode;
894 u_int32_t blockno, blockcnt;
895
896 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb));
897
898 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) +
899 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET >
900 gdt->sc_ic_all_size) {
901 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_cache_cmd(): DPMEM overflow\n",
902 gdt->sc_hanum));
903 return (NULL);
904 }
905
906 gccb = gdt_get_ccb(gdt);
907 if (gccb == NULL) {
908 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n",
909 gdt->sc_hanum));
910 return (gccb);
911 }
912 bzero(gccb->gc_cmd, GDT_CMD_SZ);
913 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
914 gccb->gc_ccb = ccb;
915 gccb->gc_service = GDT_CACHESERVICE;
916 gccb->gc_flags = GDT_GCF_SCSI;
917
918 if (gdt->sc_cmd_cnt == 0)
919 gdt->sc_set_sema0(gdt);
920 crit_exit();
921 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
922 gccb->gc_cmd_index);
923 cmdp = ccb->csio.cdb_io.cdb_bytes;
924 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ;
925 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE)
926 opcode = GDT_WRITE_THR;
927 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode);
928
929 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO,
930 ccb->ccb_h.target_id);
931 if (ccb->csio.cdb_len == 6) {
932 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp;
933 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff);
934 blockcnt = rw->length ? rw->length : 0x100;
935 } else {
936 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp;
937 blockno = scsi_4btoul(rw->addr);
938 blockcnt = scsi_2btoul(rw->length);
939 }
940 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO,
941 blockno);
942 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT,
943 blockcnt);
944
945 /*
946 * If we have any data to send with this command,
947 * map it into bus space.
948 */
949 /* Only use S/G if there is a transfer */
950 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
951 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) {
952 int error;
953
954 /* vorher unlock von splcam() ??? */
955 crit_enter();
956 error =
957 bus_dmamap_load(gdt->sc_buffer_dmat,
958 gccb->gc_dmamap,
959 ccb->csio.data_ptr,
960 ccb->csio.dxfer_len,
961 gdtexecuteccb,
962 gccb, /*flags*/0);
963 if (error == EINPROGRESS) {
964 xpt_freeze_simq(sim, 1);
965 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
966 }
967 crit_exit();
968 } else {
969 panic("iir: CAM_DATA_PHYS not supported");
970 }
971 } else {
972 struct bus_dma_segment *segs;
973
974 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0)
975 panic("iir%d: iir_action - Physical "
976 "segment pointers unsupported", gdt->sc_hanum);
977
978 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0)
979 panic("iir%d: iir_action - Virtual "
980 "segment addresses unsupported", gdt->sc_hanum);
981
982 /* Just use the segments provided */
983 segs = (struct bus_dma_segment *)ccb->csio.data_ptr;
984 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0);
985 }
986
987 crit_enter();
988 return (gccb);
989 }
990
991 static struct gdt_ccb *
gdt_ioctl_cmd(struct gdt_softc * gdt,gdt_ucmd_t * ucmd)992 gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd)
993 {
994 struct gdt_ccb *gccb;
995 u_int32_t cnt;
996
997 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd));
998
999 gccb = gdt_get_ccb(gdt);
1000 if (gccb == NULL) {
1001 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n",
1002 gdt->sc_hanum));
1003 return (gccb);
1004 }
1005 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1006 gccb->gc_ucmd = ucmd;
1007 gccb->gc_service = ucmd->service;
1008 gccb->gc_flags = GDT_GCF_IOCTL;
1009
1010 /* check DPMEM space, copy data buffer from user space */
1011 if (ucmd->service == GDT_CACHESERVICE) {
1012 if (ucmd->OpCode == GDT_IOCTL) {
1013 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ,
1014 sizeof(u_int32_t));
1015 cnt = ucmd->u.ioctl.param_size;
1016 if (cnt > GDT_SCRATCH_SZ) {
1017 kprintf("iir%d: Scratch buffer too small (%d/%d)\n",
1018 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt);
1019 gdt_free_ccb(gdt, gccb);
1020 return (NULL);
1021 }
1022 } else {
1023 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST +
1024 GDT_SG_SZ, sizeof(u_int32_t));
1025 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE;
1026 if (cnt > GDT_SCRATCH_SZ) {
1027 kprintf("iir%d: Scratch buffer too small (%d/%d)\n",
1028 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt);
1029 gdt_free_ccb(gdt, gccb);
1030 return (NULL);
1031 }
1032 }
1033 } else {
1034 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST +
1035 GDT_SG_SZ, sizeof(u_int32_t));
1036 cnt = ucmd->u.raw.sdlen;
1037 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) {
1038 kprintf("iir%d: Scratch buffer too small (%d/%d)\n",
1039 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len);
1040 gdt_free_ccb(gdt, gccb);
1041 return (NULL);
1042 }
1043 }
1044 if (cnt != 0)
1045 bcopy(ucmd->data, gccb->gc_scratch, cnt);
1046
1047 if (gdt->sc_cmd_off + gccb->gc_cmd_len + GDT_DPMEM_COMMAND_OFFSET >
1048 gdt->sc_ic_all_size) {
1049 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_ioctl_cmd(): DPMEM overflow\n",
1050 gdt->sc_hanum));
1051 gdt_free_ccb(gdt, gccb);
1052 return (NULL);
1053 }
1054
1055 if (gdt->sc_cmd_cnt == 0)
1056 gdt->sc_set_sema0(gdt);
1057 crit_exit();
1058
1059 /* fill cmd structure */
1060 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1061 gccb->gc_cmd_index);
1062 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE,
1063 ucmd->OpCode);
1064
1065 if (ucmd->service == GDT_CACHESERVICE) {
1066 if (ucmd->OpCode == GDT_IOCTL) {
1067 /* IOCTL */
1068 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE,
1069 ucmd->u.ioctl.param_size);
1070 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC,
1071 ucmd->u.ioctl.subfunc);
1072 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL,
1073 ucmd->u.ioctl.channel);
1074 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM,
1075 gccb->gc_scratch_busbase);
1076 } else {
1077 /* cache service command */
1078 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO,
1079 ucmd->u.cache.DeviceNo);
1080 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO,
1081 ucmd->u.cache.BlockNo);
1082 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT,
1083 ucmd->u.cache.BlockCnt);
1084 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR,
1085 0xffffffffUL);
1086 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ,
1087 1);
1088 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1089 GDT_SG_PTR, gccb->gc_scratch_busbase);
1090 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1091 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE);
1092 }
1093 } else {
1094 /* raw service command */
1095 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION,
1096 ucmd->u.raw.direction);
1097 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA,
1098 0xffffffffUL);
1099 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN,
1100 ucmd->u.raw.sdlen);
1101 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN,
1102 ucmd->u.raw.clen);
1103 bcopy(ucmd->u.raw.cmd, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD,
1104 12);
1105 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
1106 ucmd->u.raw.target;
1107 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
1108 ucmd->u.raw.lun;
1109 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
1110 ucmd->u.raw.bus;
1111 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN,
1112 ucmd->u.raw.sense_len);
1113 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA,
1114 gccb->gc_scratch_busbase + ucmd->u.raw.sdlen);
1115 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ,
1116 1);
1117 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1118 GDT_SG_PTR, gccb->gc_scratch_busbase);
1119 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1120 GDT_SG_LEN, ucmd->u.raw.sdlen);
1121 }
1122
1123 crit_enter();
1124 gdt_stat.sg_count_act = 1;
1125 gdt->sc_copy_cmd(gdt, gccb);
1126 return (gccb);
1127 }
1128
1129 static void
gdt_internal_cache_cmd(struct gdt_softc * gdt,union ccb * ccb)1130 gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb)
1131 {
1132 int t;
1133
1134 t = ccb->ccb_h.target_id;
1135 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n",
1136 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t));
1137
1138 switch (ccb->csio.cdb_io.cdb_bytes[0]) {
1139 case TEST_UNIT_READY:
1140 case START_STOP:
1141 break;
1142 case REQUEST_SENSE:
1143 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n"));
1144 break;
1145 case INQUIRY:
1146 {
1147 struct scsi_inquiry_data inq;
1148 size_t copylen = MIN(sizeof(inq), ccb->csio.dxfer_len);
1149
1150 bzero(&inq, sizeof(inq));
1151 inq.device = (gdt->sc_hdr[t].hd_devtype & 4) ?
1152 T_CDROM : T_DIRECT;
1153 inq.dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0;
1154 inq.version = SCSI_REV_2;
1155 inq.response_format = 2;
1156 inq.additional_length = 32;
1157 inq.flags = SID_CmdQue | SID_Sync;
1158 strncpy(inq.vendor, gdt->oem_name, sizeof(inq.vendor));
1159 ksnprintf(inq.product, sizeof(inq.product),
1160 "Host Drive #%02d", t);
1161 strncpy(inq.revision, " ", sizeof(inq.revision));
1162 bcopy(&inq, ccb->csio.data_ptr, copylen );
1163 if( ccb->csio.dxfer_len > copylen )
1164 bzero( ccb->csio.data_ptr+copylen,
1165 ccb->csio.dxfer_len - copylen );
1166 break;
1167 }
1168 case MODE_SENSE_6:
1169 {
1170 struct mpd_data {
1171 struct scsi_mode_hdr_6 hd;
1172 struct scsi_mode_block_descr bd;
1173 struct scsi_control_page cp;
1174 } mpd;
1175 size_t copylen = MIN(sizeof(mpd), ccb->csio.dxfer_len);
1176 u_int8_t page;
1177
1178 /*mpd = (struct mpd_data *)ccb->csio.data_ptr;*/
1179 bzero(&mpd, sizeof(mpd));
1180 mpd.hd.datalen = sizeof(struct scsi_mode_hdr_6) +
1181 sizeof(struct scsi_mode_block_descr);
1182 mpd.hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0;
1183 mpd.hd.block_descr_len = sizeof(struct scsi_mode_block_descr);
1184 mpd.bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16;
1185 mpd.bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8;
1186 mpd.bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff);
1187
1188 bcopy(&mpd, ccb->csio.data_ptr, copylen );
1189 if( ccb->csio.dxfer_len > copylen )
1190 bzero( ccb->csio.data_ptr+copylen,
1191 ccb->csio.dxfer_len - copylen );
1192 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page;
1193 switch (page) {
1194 default:
1195 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page));
1196 break;
1197 }
1198 break;
1199 }
1200 case READ_CAPACITY:
1201 {
1202 struct scsi_read_capacity_data rcd;
1203 size_t copylen = MIN(sizeof(rcd), ccb->csio.dxfer_len);
1204
1205 /*rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr;*/
1206 bzero(&rcd, sizeof(rcd));
1207 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd.addr);
1208 scsi_ulto4b(GDT_SECTOR_SIZE, rcd.length);
1209 bcopy(&rcd, ccb->csio.data_ptr, copylen );
1210 if( ccb->csio.dxfer_len > copylen )
1211 bzero( ccb->csio.data_ptr+copylen,
1212 ccb->csio.dxfer_len - copylen );
1213 break;
1214 }
1215 default:
1216 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n",
1217 ccb->csio.cdb_io.cdb_bytes[0]));
1218 break;
1219 }
1220 ccb->ccb_h.status |= CAM_REQ_CMP;
1221 --gdt_stat.io_count_act;
1222 xpt_done(ccb);
1223 }
1224
1225 static void
gdtmapmem(void * arg,bus_dma_segment_t * dm_segs,int nseg,int error)1226 gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1227 {
1228 bus_addr_t *busaddrp;
1229
1230 busaddrp = (bus_addr_t *)arg;
1231 *busaddrp = dm_segs->ds_addr;
1232 }
1233
1234 static void
gdtexecuteccb(void * arg,bus_dma_segment_t * dm_segs,int nseg,int error)1235 gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1236 {
1237 struct gdt_ccb *gccb;
1238 union ccb *ccb;
1239 struct gdt_softc *gdt;
1240 int i;
1241
1242 crit_enter();
1243
1244 gccb = (struct gdt_ccb *)arg;
1245 ccb = gccb->gc_ccb;
1246 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr);
1247
1248 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n",
1249 gdt, gccb, dm_segs, nseg, error));
1250 gdt_stat.sg_count_act = nseg;
1251 if (nseg > gdt_stat.sg_count_max)
1252 gdt_stat.sg_count_max = nseg;
1253
1254 /* Copy the segments into our SG list */
1255 if (gccb->gc_service == GDT_CACHESERVICE) {
1256 for (i = 0; i < nseg; ++i) {
1257 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1258 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr);
1259 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1260 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len);
1261 dm_segs++;
1262 }
1263 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ,
1264 nseg);
1265 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR,
1266 0xffffffffUL);
1267
1268 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST +
1269 nseg * GDT_SG_SZ, sizeof(u_int32_t));
1270 } else {
1271 for (i = 0; i < nseg; ++i) {
1272 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1273 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr);
1274 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1275 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len);
1276 dm_segs++;
1277 }
1278 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ,
1279 nseg);
1280 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA,
1281 0xffffffffUL);
1282
1283 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST +
1284 nseg * GDT_SG_SZ, sizeof(u_int32_t));
1285 }
1286
1287 if (nseg != 0) {
1288 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
1289 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
1290 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1291 }
1292
1293 /* We must NOT abort the command here if CAM_REQ_INPROG is not set,
1294 * because command semaphore is already set!
1295 */
1296
1297 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1298 /* timeout handling */
1299 callout_reset(ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000,
1300 iir_timeout, gccb);
1301
1302 gdt->sc_copy_cmd(gdt, gccb);
1303 crit_exit();
1304 }
1305
1306
1307 static void
iir_action(struct cam_sim * sim,union ccb * ccb)1308 iir_action( struct cam_sim *sim, union ccb *ccb )
1309 {
1310 struct gdt_softc *gdt;
1311 int bus, target;
1312 #ifdef GDT_DEBUG
1313 int lun;
1314 #endif
1315
1316 gdt = (struct gdt_softc *)cam_sim_softc( sim );
1317 ccb->ccb_h.ccb_sim_ptr = sim;
1318 bus = cam_sim_bus(sim);
1319 target = ccb->ccb_h.target_id;
1320 #ifdef GDT_DEBUG
1321 lun = ccb->ccb_h.target_lun;
1322 #endif
1323 GDT_DPRINTF(GDT_D_CMD,
1324 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n",
1325 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0],
1326 bus, target, lun));
1327 ++gdt_stat.io_count_act;
1328 if (gdt_stat.io_count_act > gdt_stat.io_count_max)
1329 gdt_stat.io_count_max = gdt_stat.io_count_act;
1330
1331 switch (ccb->ccb_h.func_code) {
1332 case XPT_SCSI_IO:
1333 crit_enter();
1334 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
1335 ++gdt_stat.req_queue_act;
1336 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
1337 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
1338 crit_exit();
1339 gdt_next(gdt);
1340 break;
1341 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
1342 case XPT_ABORT: /* Abort the specified CCB */
1343 /* XXX Implement */
1344 ccb->ccb_h.status = CAM_REQ_INVALID;
1345 --gdt_stat.io_count_act;
1346 xpt_done(ccb);
1347 break;
1348 case XPT_SET_TRAN_SETTINGS:
1349 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1350 --gdt_stat.io_count_act;
1351 xpt_done(ccb);
1352 break;
1353 case XPT_GET_TRAN_SETTINGS:
1354 /* Get default/user set transfer settings for the target */
1355 {
1356 struct ccb_trans_settings *cts = &ccb->cts;
1357 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
1358 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
1359
1360 cts->protocol = PROTO_SCSI;
1361 cts->protocol_version = SCSI_REV_2;
1362 cts->transport = XPORT_SPI;
1363 cts->transport_version = 2;
1364
1365 if (cts->type == CTS_TYPE_USER_SETTINGS) {
1366 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
1367 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
1368 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
1369 spi->sync_period = 25; /* 10MHz */
1370 if (spi->sync_period != 0)
1371 spi->sync_offset = 15;
1372
1373 spi->valid = CTS_SPI_VALID_SYNC_RATE
1374 | CTS_SPI_VALID_SYNC_OFFSET
1375 | CTS_SPI_VALID_BUS_WIDTH
1376 | CTS_SPI_VALID_DISC;
1377 scsi->valid = CTS_SCSI_VALID_TQ;
1378 ccb->ccb_h.status = CAM_REQ_CMP;
1379 } else {
1380 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1381 }
1382 --gdt_stat.io_count_act;
1383 xpt_done(ccb);
1384 break;
1385 }
1386 case XPT_CALC_GEOMETRY:
1387 {
1388 struct ccb_calc_geometry *ccg;
1389 u_int32_t secs_per_cylinder;
1390
1391 ccg = &ccb->ccg;
1392 ccg->heads = gdt->sc_hdr[target].hd_heads;
1393 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs;
1394 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1395 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1396 ccb->ccb_h.status = CAM_REQ_CMP;
1397 --gdt_stat.io_count_act;
1398 xpt_done(ccb);
1399 break;
1400 }
1401 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1402 {
1403 /* XXX Implement */
1404 ccb->ccb_h.status = CAM_REQ_CMP;
1405 --gdt_stat.io_count_act;
1406 xpt_done(ccb);
1407 break;
1408 }
1409 case XPT_TERM_IO: /* Terminate the I/O process */
1410 /* XXX Implement */
1411 ccb->ccb_h.status = CAM_REQ_INVALID;
1412 --gdt_stat.io_count_act;
1413 xpt_done(ccb);
1414 break;
1415 case XPT_PATH_INQ: /* Path routing inquiry */
1416 {
1417 struct ccb_pathinq *cpi = &ccb->cpi;
1418
1419 cpi->version_num = 1;
1420 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
1421 cpi->hba_inquiry |= PI_WIDE_16;
1422 cpi->target_sprt = 1;
1423 cpi->hba_misc = 0;
1424 cpi->hba_eng_cnt = 0;
1425 if (bus == gdt->sc_virt_bus)
1426 cpi->max_target = GDT_MAX_HDRIVES - 1;
1427 else if (gdt->sc_class & GDT_FC)
1428 cpi->max_target = GDT_MAXID_FC - 1;
1429 else
1430 cpi->max_target = GDT_MAXID - 1;
1431 cpi->max_lun = 7;
1432 cpi->unit_number = cam_sim_unit(sim);
1433 cpi->bus_id = bus;
1434 cpi->initiator_id =
1435 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]);
1436 cpi->base_transfer_speed = 3300;
1437 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1438 if (gdt->sc_vendor == PCI_VENDOR_INTEL)
1439 strncpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN);
1440 else
1441 strncpy(cpi->hba_vid, "ICP vortex ", HBA_IDLEN);
1442 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1443 cpi->transport = XPORT_SPI;
1444 cpi->transport_version = 2;
1445 cpi->protocol = PROTO_SCSI;
1446 cpi->protocol_version = SCSI_REV_2;
1447 cpi->ccb_h.status = CAM_REQ_CMP;
1448 --gdt_stat.io_count_act;
1449 xpt_done(ccb);
1450 break;
1451 }
1452 default:
1453 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n",
1454 gdt, ccb->ccb_h.func_code));
1455 ccb->ccb_h.status = CAM_REQ_INVALID;
1456 --gdt_stat.io_count_act;
1457 xpt_done(ccb);
1458 break;
1459 }
1460 }
1461
1462 static void
iir_poll(struct cam_sim * sim)1463 iir_poll( struct cam_sim *sim )
1464 {
1465 struct gdt_softc *gdt;
1466
1467 gdt = (struct gdt_softc *)cam_sim_softc( sim );
1468 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt));
1469 iir_intr(gdt);
1470 }
1471
1472 static void
iir_timeout(void * arg)1473 iir_timeout(void *arg)
1474 {
1475 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", gccb));
1476 }
1477
1478 static void
iir_shutdown(void * arg,int howto)1479 iir_shutdown( void *arg, int howto )
1480 {
1481 struct gdt_softc *gdt;
1482 struct gdt_ccb *gccb;
1483 gdt_ucmd_t *ucmd;
1484 int i;
1485
1486 gdt = (struct gdt_softc *)arg;
1487 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto));
1488
1489 kprintf("iir%d: Flushing all Host Drives. Please wait ... ",
1490 gdt->sc_hanum);
1491
1492 /* allocate ucmd buffer */
1493 ucmd = kmalloc(sizeof(gdt_ucmd_t), M_GDTBUF, M_INTWAIT | M_ZERO);
1494
1495 /* wait for pending IOs */
1496 crit_enter();
1497 gdt->sc_state = GDT_SHUTDOWN;
1498 crit_exit();
1499 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL)
1500 (void) tsleep((void *)gccb, PCATCH, "iirshw", 100 * hz);
1501
1502 /* flush */
1503 for (i = 0; i < GDT_MAX_HDRIVES; ++i) {
1504 if (gdt->sc_hdr[i].hd_present) {
1505 ucmd->service = GDT_CACHESERVICE;
1506 ucmd->OpCode = GDT_FLUSH;
1507 ucmd->u.cache.DeviceNo = i;
1508 crit_enter();
1509 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links);
1510 ucmd->complete_flag = FALSE;
1511 crit_exit();
1512 gdt_next(gdt);
1513 if (!ucmd->complete_flag)
1514 (void) tsleep((void *)ucmd, PCATCH, "iirshw", 10*hz);
1515 }
1516 }
1517
1518 kfree(ucmd, M_DEVBUF);
1519 kprintf("Done.\n");
1520 }
1521
1522 void
iir_intr(void * arg)1523 iir_intr(void *arg)
1524 {
1525 struct gdt_softc *gdt = arg;
1526 struct gdt_intr_ctx ctx;
1527 struct gdt_ccb *gccb;
1528 gdt_ucmd_t *ucmd;
1529 u_int32_t cnt;
1530
1531 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt));
1532
1533 /* If polling and we were not called from gdt_wait, just return */
1534 if ((gdt->sc_state & GDT_POLLING) &&
1535 !(gdt->sc_state & GDT_POLL_WAIT))
1536 return;
1537
1538 if (!(gdt->sc_state & GDT_POLLING))
1539 crit_enter();
1540 gdt_wait_index = 0;
1541
1542 ctx.istatus = gdt->sc_get_status(gdt);
1543 if (ctx.istatus == 0x00) {
1544 if (!(gdt->sc_state & GDT_POLLING))
1545 crit_exit();
1546 gdt->sc_status = GDT_S_NO_STATUS;
1547 return;
1548 }
1549
1550 gdt->sc_intr(gdt, &ctx);
1551
1552 gdt->sc_status = ctx.cmd_status;
1553 gdt->sc_service = ctx.service;
1554 gdt->sc_info = ctx.info;
1555 gdt->sc_info2 = ctx.info2;
1556
1557 if (gdt->sc_state & GDT_POLL_WAIT) {
1558 gdt_wait_gdt = gdt;
1559 gdt_wait_index = ctx.istatus;
1560 }
1561
1562 if (ctx.istatus == GDT_ASYNCINDEX) {
1563 gdt_async_event(gdt, ctx.service);
1564 if (!(gdt->sc_state & GDT_POLLING))
1565 crit_exit();
1566 return;
1567 }
1568 if (ctx.istatus == GDT_SPEZINDEX) {
1569 GDT_DPRINTF(GDT_D_INVALID,
1570 ("iir%d: Service unknown or not initialized!\n",
1571 gdt->sc_hanum));
1572 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver);
1573 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum;
1574 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr);
1575 if (!(gdt->sc_state & GDT_POLLING))
1576 crit_exit();
1577 return;
1578 }
1579
1580 gccb = &gdt->sc_gccbs[ctx.istatus - 2];
1581 ctx.service = gccb->gc_service;
1582
1583 switch (gccb->gc_flags) {
1584 case GDT_GCF_UNUSED:
1585 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: Index (%d) to unused command!\n",
1586 gdt->sc_hanum, ctx.istatus));
1587 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver);
1588 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum;
1589 gdt->sc_dvr.eu.driver.index = ctx.istatus;
1590 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr);
1591 gdt_free_ccb(gdt, gccb);
1592 /* fallthrough */
1593
1594 case GDT_GCF_INTERNAL:
1595 if (!(gdt->sc_state & GDT_POLLING))
1596 crit_exit();
1597 break;
1598
1599 case GDT_GCF_IOCTL:
1600 ucmd = gccb->gc_ucmd;
1601 if (gdt->sc_status == GDT_S_BSY) {
1602 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n",
1603 gdt, gccb));
1604 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links);
1605 if (!(gdt->sc_state & GDT_POLLING))
1606 crit_exit();
1607 } else {
1608 ucmd->status = gdt->sc_status;
1609 ucmd->info = gdt->sc_info;
1610 ucmd->complete_flag = TRUE;
1611 if (ucmd->service == GDT_CACHESERVICE) {
1612 if (ucmd->OpCode == GDT_IOCTL) {
1613 cnt = ucmd->u.ioctl.param_size;
1614 if (cnt != 0)
1615 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1616 } else {
1617 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE;
1618 if (cnt != 0)
1619 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1620 }
1621 } else {
1622 cnt = ucmd->u.raw.sdlen;
1623 if (cnt != 0)
1624 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1625 if (ucmd->u.raw.sense_len != 0)
1626 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1627 }
1628 gdt_free_ccb(gdt, gccb);
1629 if (!(gdt->sc_state & GDT_POLLING))
1630 crit_exit();
1631 /* wakeup */
1632 wakeup(ucmd);
1633 }
1634 gdt_next(gdt);
1635 break;
1636
1637 default:
1638 gdt_free_ccb(gdt, gccb);
1639 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb);
1640 if (!(gdt->sc_state & GDT_POLLING))
1641 crit_exit();
1642 gdt_next(gdt);
1643 break;
1644 }
1645 }
1646
1647 static int
gdt_async_event(struct gdt_softc * gdt,int service)1648 gdt_async_event(struct gdt_softc *gdt, int service)
1649 {
1650 struct gdt_ccb *gccb;
1651
1652 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service));
1653
1654 if (service == GDT_SCREENSERVICE) {
1655 if (gdt->sc_status == GDT_MSG_REQUEST) {
1656 while (gdt->sc_test_busy(gdt))
1657 DELAY(1);
1658 gccb = gdt_get_ccb(gdt);
1659 if (gccb == NULL) {
1660 kprintf("iir%d: No free command index found\n",
1661 gdt->sc_hanum);
1662 return (1);
1663 }
1664 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1665 gccb->gc_service = service;
1666 gccb->gc_flags = GDT_GCF_SCREEN;
1667 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1668 gccb->gc_cmd_index);
1669 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ);
1670 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1671 GDT_MSG_INV_HANDLE);
1672 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1673 gccb->gc_scratch_busbase);
1674 gdt->sc_set_sema0(gdt);
1675 gdt->sc_cmd_off = 0;
1676 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1677 sizeof(u_int32_t));
1678 gdt->sc_cmd_cnt = 0;
1679 gdt->sc_copy_cmd(gdt, gccb);
1680 kprintf("iir%d: [PCI %d/%d] ",
1681 gdt->sc_hanum,gdt->sc_bus,gdt->sc_slot);
1682 gdt->sc_release_event(gdt);
1683 }
1684
1685 } else {
1686 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) {
1687 gdt->sc_dvr.size = 0;
1688 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum;
1689 gdt->sc_dvr.eu.async.status = gdt->sc_status;
1690 /* severity and event_string already set! */
1691 } else {
1692 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async);
1693 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum;
1694 gdt->sc_dvr.eu.async.service = service;
1695 gdt->sc_dvr.eu.async.status = gdt->sc_status;
1696 gdt->sc_dvr.eu.async.info = gdt->sc_info;
1697 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2;
1698 }
1699 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr);
1700 kprintf("iir%d: %s\n", gdt->sc_hanum, gdt->sc_dvr.event_string);
1701 }
1702
1703 return (0);
1704 }
1705
1706 static int
gdt_sync_event(struct gdt_softc * gdt,int service,u_int8_t index,struct gdt_ccb * gccb)1707 gdt_sync_event(struct gdt_softc *gdt, int service,
1708 u_int8_t index, struct gdt_ccb *gccb)
1709 {
1710 union ccb *ccb;
1711
1712 GDT_DPRINTF(GDT_D_INTR,
1713 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb));
1714
1715 ccb = gccb->gc_ccb;
1716
1717 if (service == GDT_SCREENSERVICE) {
1718 u_int32_t msg_len;
1719
1720 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN);
1721 if (msg_len)
1722 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] &&
1723 gccb->gc_scratch[GDT_SCR_MSG_EXT])) {
1724 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0';
1725 kprintf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]);
1726 }
1727
1728 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] &&
1729 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) {
1730 while (gdt->sc_test_busy(gdt))
1731 DELAY(1);
1732 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1733 gccb = gdt_get_ccb(gdt);
1734 if (gccb == NULL) {
1735 kprintf("iir%d: No free command index found\n",
1736 gdt->sc_hanum);
1737 return (1);
1738 }
1739 gccb->gc_service = service;
1740 gccb->gc_flags = GDT_GCF_SCREEN;
1741 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1742 gccb->gc_cmd_index);
1743 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ);
1744 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1745 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]);
1746 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1747 gccb->gc_scratch_busbase);
1748 gdt->sc_set_sema0(gdt);
1749 gdt->sc_cmd_off = 0;
1750 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1751 sizeof(u_int32_t));
1752 gdt->sc_cmd_cnt = 0;
1753 gdt->sc_copy_cmd(gdt, gccb);
1754 gdt->sc_release_event(gdt);
1755 return (0);
1756 }
1757
1758 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] &&
1759 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) {
1760 /* default answers (getchar() not possible) */
1761 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) {
1762 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0);
1763 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1);
1764 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0;
1765 } else {
1766 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN,
1767 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2);
1768 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2);
1769 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1;
1770 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0;
1771 }
1772 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0;
1773 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0;
1774 while (gdt->sc_test_busy(gdt))
1775 DELAY(1);
1776 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1777 gccb = gdt_get_ccb(gdt);
1778 if (gccb == NULL) {
1779 kprintf("iir%d: No free command index found\n",
1780 gdt->sc_hanum);
1781 return (1);
1782 }
1783 gccb->gc_service = service;
1784 gccb->gc_flags = GDT_GCF_SCREEN;
1785 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1786 gccb->gc_cmd_index);
1787 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE);
1788 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1789 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]);
1790 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1791 gccb->gc_scratch_busbase);
1792 gdt->sc_set_sema0(gdt);
1793 gdt->sc_cmd_off = 0;
1794 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1795 sizeof(u_int32_t));
1796 gdt->sc_cmd_cnt = 0;
1797 gdt->sc_copy_cmd(gdt, gccb);
1798 gdt->sc_release_event(gdt);
1799 return (0);
1800 }
1801 kprintf("\n");
1802 return (0);
1803 } else {
1804 callout_stop(ccb->ccb_h.timeout_ch);
1805 if (gdt->sc_status == GDT_S_BSY) {
1806 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n",
1807 gdt, gccb));
1808 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
1809 ++gdt_stat.req_queue_act;
1810 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
1811 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
1812 return (2);
1813 }
1814
1815 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
1816 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
1817 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1818 bus_dmamap_unload(gdt->sc_buffer_dmat, gccb->gc_dmamap);
1819
1820 ccb->csio.resid = 0;
1821 if (gdt->sc_status == GDT_S_OK) {
1822 ccb->ccb_h.status |= CAM_REQ_CMP;
1823 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1824 } else {
1825 /* error */
1826 if (gccb->gc_service == GDT_CACHESERVICE) {
1827 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID;
1828 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1829 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
1830 bzero(&ccb->csio.sense_data, ccb->csio.sense_len);
1831 ccb->csio.sense_data.error_code =
1832 SSD_CURRENT_ERROR | SSD_ERRCODE_VALID;
1833 ccb->csio.sense_data.flags = SSD_KEY_NOT_READY;
1834
1835 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync);
1836 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum;
1837 gdt->sc_dvr.eu.sync.service = service;
1838 gdt->sc_dvr.eu.sync.status = gdt->sc_status;
1839 gdt->sc_dvr.eu.sync.info = gdt->sc_info;
1840 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id;
1841 if (gdt->sc_status >= 0x8000)
1842 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr);
1843 else
1844 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr);
1845 } else {
1846 /* raw service */
1847 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) {
1848 ccb->ccb_h.status = CAM_DEV_NOT_THERE;
1849 } else {
1850 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID;
1851 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1852 ccb->csio.scsi_status = gdt->sc_info;
1853 bcopy(gccb->gc_scratch, &ccb->csio.sense_data,
1854 ccb->csio.sense_len);
1855 }
1856 }
1857 }
1858 --gdt_stat.io_count_act;
1859 xpt_done(ccb);
1860 }
1861 return (0);
1862 }
1863
1864 /* Controller event handling functions */
1865 gdt_evt_str *
gdt_store_event(u_int16_t source,u_int16_t idx,gdt_evt_data * evt)1866 gdt_store_event(u_int16_t source, u_int16_t idx, gdt_evt_data *evt)
1867 {
1868 gdt_evt_str *e;
1869 struct timeval tv;
1870
1871 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx));
1872 if (source == 0) /* no source -> no event */
1873 return 0;
1874
1875 if (ebuffer[elastidx].event_source == source &&
1876 ebuffer[elastidx].event_idx == idx &&
1877 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
1878 !memcmp((char *)&ebuffer[elastidx].event_data.eu,
1879 (char *)&evt->eu, evt->size)) ||
1880 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
1881 !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
1882 (char *)&evt->event_string)))) {
1883 e = &ebuffer[elastidx];
1884 getmicrotime(&tv);
1885 e->last_stamp = tv.tv_sec;
1886 ++e->same_count;
1887 } else {
1888 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */
1889 ++elastidx;
1890 if (elastidx == GDT_MAX_EVENTS)
1891 elastidx = 0;
1892 if (elastidx == eoldidx) { /* reached mark ? */
1893 ++eoldidx;
1894 if (eoldidx == GDT_MAX_EVENTS)
1895 eoldidx = 0;
1896 }
1897 }
1898 e = &ebuffer[elastidx];
1899 e->event_source = source;
1900 e->event_idx = idx;
1901 getmicrotime(&tv);
1902 e->first_stamp = e->last_stamp = tv.tv_sec;
1903 e->same_count = 1;
1904 e->event_data = *evt;
1905 e->application = 0;
1906 }
1907 return e;
1908 }
1909
1910 int
gdt_read_event(int handle,gdt_evt_str * estr)1911 gdt_read_event(int handle, gdt_evt_str *estr)
1912 {
1913 gdt_evt_str *e;
1914 int eindex;
1915
1916 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle));
1917
1918 /* disallow handles -2, -3 ... */
1919 if (handle < -1)
1920 return -1;
1921
1922 crit_enter();
1923 if (handle == -1)
1924 eindex = eoldidx;
1925 else
1926 eindex = handle;
1927 estr->event_source = 0;
1928
1929 if (eindex >= GDT_MAX_EVENTS) {
1930 crit_exit();
1931 return eindex;
1932 }
1933 e = &ebuffer[eindex];
1934 if (e->event_source != 0) {
1935 if (eindex != elastidx) {
1936 if (++eindex == GDT_MAX_EVENTS)
1937 eindex = 0;
1938 } else {
1939 eindex = -1;
1940 }
1941 memcpy(estr, e, sizeof(gdt_evt_str));
1942 }
1943 crit_exit();
1944 return eindex;
1945 }
1946
1947 void
gdt_readapp_event(u_int8_t application,gdt_evt_str * estr)1948 gdt_readapp_event(u_int8_t application, gdt_evt_str *estr)
1949 {
1950 gdt_evt_str *e;
1951 int found = FALSE;
1952 int eindex;
1953
1954 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application));
1955 crit_enter();
1956 eindex = eoldidx;
1957 for (;;) {
1958 e = &ebuffer[eindex];
1959 if (e->event_source == 0)
1960 break;
1961 if ((e->application & application) == 0) {
1962 e->application |= application;
1963 found = TRUE;
1964 break;
1965 }
1966 if (eindex == elastidx)
1967 break;
1968 if (++eindex == GDT_MAX_EVENTS)
1969 eindex = 0;
1970 }
1971 if (found)
1972 memcpy(estr, e, sizeof(gdt_evt_str));
1973 else
1974 estr->event_source = 0;
1975 crit_exit();
1976 }
1977
1978 void
gdt_clear_events(void)1979 gdt_clear_events(void)
1980 {
1981 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n"));
1982
1983 eoldidx = elastidx = 0;
1984 ebuffer[0].event_source = 0;
1985 }
1986