1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "opt_platform.h"
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/reboot.h>
35 #include <sys/devmap.h>
36
37 #include <vm/vm.h>
38
39 #include <machine/bus.h>
40 #include <machine/intr.h>
41 #include <machine/machdep.h>
42 #include <machine/platformvar.h>
43
44 #include <arm/arm/mpcore_timervar.h>
45 #include <arm/freescale/imx/imx6_anatopreg.h>
46 #include <arm/freescale/imx/imx6_anatopvar.h>
47 #include <arm/freescale/imx/imx_machdep.h>
48
49 #include <dev/fdt/fdt_common.h>
50 #include <dev/ofw/openfirm.h>
51
52 #include <arm/freescale/imx/imx6_machdep.h>
53
54 #include "platform_if.h"
55 #include "platform_pl310_if.h"
56
57 static platform_attach_t imx6_attach;
58 static platform_devmap_init_t imx6_devmap_init;
59 static platform_late_init_t imx6_late_init;
60 static platform_cpu_reset_t imx6_cpu_reset;
61
62 /*
63 * Fix FDT data related to interrupts.
64 *
65 * Driven by the needs of linux and its drivers (as always), the published FDT
66 * data for imx6 now sets the interrupt parent for most devices to the GPC
67 * interrupt controller, which is for use when the chip is in deep-sleep mode.
68 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts
69 * to be handled by the GIC.
70 *
71 * Luckily, the change to the FDT data was to assign the GPC as the interrupt
72 * parent for the soc node and letting that get inherited by all other devices
73 * (except a few that directly name GIC as their interrupt parent). So we can
74 * set the world right by just changing the interrupt-parent property of the soc
75 * node to refer to GIC instead of GPC. This will get us by until we write our
76 * own GPC driver (or until linux changes its mind and the FDT data again).
77 *
78 * 2020/11/25: The tempmon and pmu nodes are siblings (not children) of the soc
79 * node, so for them to use interrupts we need to apply the same fix as we do
80 * for the soc node.
81 *
82 * We validate that we have data that looks like we expect before changing it:
83 * - SOC node exists and has GPC as its interrupt parent.
84 * - GPC node exists and has GIC as its interrupt parent.
85 * - GIC node exists and is its own interrupt parent or has no parent.
86 *
87 * This applies to all models of imx6. Luckily all of them have the devices
88 * involved at the same addresses on the same buses, so we don't need any
89 * per-soc logic. We handle this at platform attach time rather than via the
90 * fdt_fixup_table, because the latter requires matching on the FDT "model"
91 * property, and this applies to all boards including those not yet invented.
92 *
93 * This just in: as of the import of dts files from linux 4.15 on 2018-02-10,
94 * they appear to have applied a new style rule to the dts which forbids leading
95 * zeroes in the @address qualifiers on node names. Since we have to find those
96 * nodes by string matching we now have to search for both flavors of each node
97 * name involved.
98 */
99
100 static void
fix_node_iparent(const char * nodepath,phandle_t gpcxref,phandle_t gicxref)101 fix_node_iparent(const char* nodepath, phandle_t gpcxref, phandle_t gicxref)
102 {
103 static const char *propname = "interrupt-parent";
104 phandle_t node, iparent;
105
106 if ((node = OF_finddevice(nodepath)) == -1)
107 return;
108 if (OF_getencprop(node, propname, &iparent, sizeof(iparent)) <= 0)
109 return;
110 if (iparent != gpcxref)
111 return;
112
113 OF_setprop(node, propname, &gicxref, sizeof(gicxref));
114 }
115
116 static void
fix_fdt_interrupt_data(void)117 fix_fdt_interrupt_data(void)
118 {
119 phandle_t gicipar, gicnode, gicxref;
120 phandle_t gpcipar, gpcnode, gpcxref;
121 int result;
122
123 /* GIC node may be child of soc node, or appear directly at root. */
124 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000");
125 if (gicnode == -1)
126 gicnode = OF_finddevice("/soc/interrupt-controller@a01000");
127 if (gicnode == -1) {
128 gicnode = OF_finddevice("/interrupt-controller@00a01000");
129 if (gicnode == -1)
130 gicnode = OF_finddevice("/interrupt-controller@a01000");
131 if (gicnode == -1)
132 return;
133 }
134 gicxref = OF_xref_from_node(gicnode);
135
136 /* If gic node has no parent, pretend it is its own parent. */
137 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar,
138 sizeof(gicipar));
139 if (result <= 0)
140 gicipar = gicxref;
141
142 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000");
143 if (gpcnode == -1)
144 gpcnode = OF_finddevice("/soc/aips-bus@2000000/gpc@20dc000");
145 if (gpcnode == -1)
146 gpcnode = OF_finddevice("/soc/bus@2000000/gpc@20dc000");
147 if (gpcnode == -1)
148 return;
149 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar,
150 sizeof(gpcipar));
151 if (result <= 0)
152 return;
153 gpcxref = OF_xref_from_node(gpcnode);
154
155 if (gpcipar != gicxref || gicipar != gicxref)
156 return;
157
158 gicxref = cpu_to_fdt32(gicxref);
159 fix_node_iparent("/soc", gpcxref, gicxref);
160 fix_node_iparent("/pmu", gpcxref, gicxref);
161 fix_node_iparent("/tempmon", gpcxref, gicxref);
162 }
163
164 static void
fix_fdt_iomuxc_data(void)165 fix_fdt_iomuxc_data(void)
166 {
167 phandle_t node;
168
169 /*
170 * The linux dts defines two nodes with the same mmio address range,
171 * iomuxc-gpr and the regular iomuxc. The -grp node is a simple_mfd and
172 * a syscon, but it only has access to a small subset of the iomuxc
173 * registers, so it can't serve as the accessor for the iomuxc driver's
174 * register IO. But right now, the simple_mfd driver attaches first,
175 * preventing the real iomuxc driver from allocating its mmio register
176 * range because it partially overlaps with the -gpr range.
177 *
178 * For now, by far the easiest thing to do to keep imx6 working is to
179 * just disable the iomuxc-gpr node because we don't have a driver for
180 * it anyway, we just need to prevent attachment of simple_mfd.
181 *
182 * If we ever write a -gpr driver, this code should probably switch to
183 * modifying the reg property so that the range covers all the iomuxc
184 * regs, then the -gpr driver can be a regular syscon driver that iomuxc
185 * uses for register access.
186 */
187 node = OF_finddevice("/soc/aips-bus@2000000/iomuxc-gpr@20e0000");
188 if (node == -1)
189 node = OF_finddevice("/soc/bus@2000000/iomuxc-gpr@20e0000");
190 if (node != -1)
191 OF_setprop(node, "status", "disabled", sizeof("disabled"));
192 }
193
194 static int
imx6_attach(platform_t plat)195 imx6_attach(platform_t plat)
196 {
197
198 /* Fix soc interrupt-parent property. */
199 fix_fdt_interrupt_data();
200
201 /* Fix iomuxc-gpr and iomuxc nodes both using the same mmio range. */
202 fix_fdt_iomuxc_data();
203
204 /* Inform the MPCore timer driver that its clock is variable. */
205 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
206
207 return (0);
208 }
209
210 static void
imx6_late_init(platform_t plat)211 imx6_late_init(platform_t plat)
212 {
213 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004;
214
215 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS);
216 }
217
218 /*
219 * Set up static device mappings.
220 *
221 * This attempts to cover the most-used devices with 1MB section mappings, which
222 * is good for performance (uses fewer TLB entries for device access).
223 *
224 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
225 * L2 cache controller. Most of the 1MB range is unused reserved space.
226 *
227 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
228 *
229 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
230 * the memory map. When we get support for graphics it might make sense to
231 * static map some of that area. Be careful with other things in that area such
232 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory.
233 */
234 static int
imx6_devmap_init(platform_t plat)235 imx6_devmap_init(platform_t plat)
236 {
237 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
238 const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
239 const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
240 const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
241 const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
242 const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
243
244 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
245 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
246 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
247
248 return (0);
249 }
250
251 static void
imx6_cpu_reset(platform_t plat)252 imx6_cpu_reset(platform_t plat)
253 {
254 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
255
256 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
257 }
258
259 /*
260 * Determine what flavor of imx6 we're running on.
261 *
262 * This code is based on the way u-boot does it. Information found on the web
263 * indicates that Freescale themselves were the original source of this logic,
264 * including the strange check for number of CPUs in the SCU configuration
265 * register, which is apparently needed on some revisions of the SOLO.
266 *
267 * According to the documentation, there is such a thing as an i.MX6 Dual
268 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a
269 * number or provided any logic to handle it in their detection code.
270 *
271 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
272 * documented in the chip reference manual. (SCU configuration is mentioned,
273 * but not mapped out in detail.) I think the bottom two bits of the scu config
274 * register may be ncpu-1.
275 *
276 * This hasn't been tested yet on a dual[-lite].
277 *
278 * On a solo:
279 * digprog = 0x00610001
280 * hwsoc = 0x00000062
281 * scu config = 0x00000500
282 * On a quad:
283 * digprog = 0x00630002
284 * hwsoc = 0x00000063
285 * scu config = 0x00005503
286 */
287 u_int
imx_soc_type(void)288 imx_soc_type(void)
289 {
290 uint32_t digprog, hwsoc;
291 uint32_t *pcr;
292 static u_int soctype;
293 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
294 #define HWSOC_MX6SL 0x60
295 #define HWSOC_MX6DL 0x61
296 #define HWSOC_MX6SOLO 0x62
297 #define HWSOC_MX6Q 0x63
298 #define HWSOC_MX6UL 0x64
299
300 if (soctype != 0)
301 return (soctype);
302
303 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
304 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
305 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
306
307 if (hwsoc != HWSOC_MX6SL) {
308 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
309 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
310 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
311 /*printf("digprog = 0x%08x\n", digprog);*/
312 if (hwsoc == HWSOC_MX6DL) {
313 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
314 if (pcr != NULL) {
315 /*printf("scu config = 0x%08x\n", *pcr);*/
316 if ((*pcr & 0x03) == 0) {
317 hwsoc = HWSOC_MX6SOLO;
318 }
319 }
320 }
321 }
322 /* printf("hwsoc 0x%08x\n", hwsoc); */
323
324 switch (hwsoc) {
325 case HWSOC_MX6SL:
326 soctype = IMXSOC_6SL;
327 break;
328 case HWSOC_MX6SOLO:
329 soctype = IMXSOC_6S;
330 break;
331 case HWSOC_MX6DL:
332 soctype = IMXSOC_6DL;
333 break;
334 case HWSOC_MX6Q :
335 soctype = IMXSOC_6Q;
336 break;
337 case HWSOC_MX6UL:
338 soctype = IMXSOC_6UL;
339 break;
340 default:
341 printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
342 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
343 soctype = IMXSOC_6Q;
344 break;
345 }
346
347 return (soctype);
348 }
349
350 /*
351 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config:
352 * option SOCDEV_PA=0x02000000
353 * option SOCDEV_VA=0x02000000
354 * option EARLY_PRINTF
355 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
356 * makes sense now, but if multiple SOCs do that it will make early_putc another
357 * duplicate symbol to be eliminated on the path to a generic kernel.
358 */
359 #if 0
360 static void
361 imx6_early_putc(int c)
362 {
363 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
364 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040;
365 const uint32_t UART_TXRDY = (1 << 3);
366
367 while ((*UART_STAT_REG & UART_TXRDY) == 0)
368 continue;
369 *UART_TX_REG = c;
370 }
371 early_putc_t *early_putc = imx6_early_putc;
372 #endif
373
374 static platform_method_t imx6_methods[] = {
375 PLATFORMMETHOD(platform_attach, imx6_attach),
376 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init),
377 PLATFORMMETHOD(platform_late_init, imx6_late_init),
378 PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset),
379
380 #ifdef SMP
381 PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap),
382 PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid),
383 #endif
384
385 PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init),
386
387 PLATFORMMETHOD_END,
388 };
389
390 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80);
391 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80);
392 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80);
393 FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67);
394