1 /* radare2 - LGPL - Copyright 2019 - v3l0c1r4pt0r */
2
3 #include <r_lib.h>
4
5 #ifndef OR1K_DISAS_H
6 #define OR1K_DISAS_H
7
8 /** Default mask for opcode */
9 #define INSN_OPCODE_MASK (0x3fULL * 0x4000000)
10 #define INSN_OPCODE_SHIFT 26
11
12 /** Empty mask for unused operands */
13 #define INSN_EMPTY_SHIFT 0
14 #define INSN_EMPTY_MASK 0
15
16 /** Mask for N operand */
17 #define INSN_N_MASK 0x3ffffff
18
19 /** Shift for D operand */
20 #define INSN_D_SHIFT 21
21 /** Mask for D operand */
22 #define INSN_D_MASK (0x1f * 0x200000)
23
24 /** Mask for K operand */
25 #define INSN_K_MASK 0xffff
26
27 /** Shift for B operand */
28 #define INSN_B_SHIFT 11
29 /** Mask for B operand */
30 #define INSN_B_MASK (0x1f * 0x800)
31
32 /** Shift for A operand */
33 #define INSN_A_SHIFT 16
34 /** Mask for A operand */
35 #define INSN_A_MASK (0x1f * 0x10000)
36
37 /** Mask for I operand */
38 #define INSN_I_MASK 0xffff
39
40 /** Mask for L operand */
41 #define INSN_L_MASK 0x3f
42
43 /** Shift for first K operand */
44 #define INSN_K1_SHIFT 21
45 /** Mask for first K operand */
46 #define INSN_K1_MASK (0x1f * 0x200000)
47
48 /** Mask for second K operand */
49 #define INSN_K2_MASK 0x7ff
50
51 typedef enum insn_type {
52 INSN_END = 0, /**< end of array indicator */
53 INSN_INVAL = 0, /**< invalid opcode */
54 INSN_X, /**< no operands */
55 INSN_N, /**< 26-bit immediate */
56 INSN_DN, /**< 5-bit destination register, then 26-bit immediate */
57 INSN_K, /**< 16-bit immediate */
58 INSN_DK, /**< 5-bit destination register, then 16-bit immediate */
59 INSN_D, /**< 5-bit destination register */
60 INSN_B, /**< 5-bit source register */
61 INSN_AI, /**< 5-bit source register, then 16-bit immediate */
62 INSN_DAI, /**< 5-bit destination register, 5-bit source register, then 16-bit
63 immediate */
64 INSN_DAK, /**< 5-bit destination register, 5-bit source register, then 16-bit
65 immediate */
66 INSN_DAL, /**< 5-bit destination register, 5-bit source register, then 6-bit
67 immediate */
68 INSN_KABK, /**< 5-bit MSB of immediate, 5-bit source register, 5-bit source
69 register, then 11-bit rest of immediate */
70 INSN_AB, /**< 5-bit source register, then 5-bit source register */
71 INSN_DA, /**< 5-bit destination register, then 5-bit source register */
72 INSN_DAB, /**< 5-bit destination register, 5-bit source register, then 5-bit
73 source register */
74 INSN_IABI, /**< 5-bit MSB of immediate, 5-bit source register, 5-bit source
75 register, then 11-bit rest of immediate */
76 INSN_SIZE, /**< number of types */
77 } insn_type_t;
78
79 typedef enum {
80 INSN_OPER_K1, /**< 5-bit MSBs of immediate */
81 INSN_OPER_K2, /**< 11-bit LSBs of immediate */
82 INSN_OPER_A, /**< 5-bit source register */
83 INSN_OPER_B, /**< 5-bit source register */
84 INSN_OPER_N, /**< 26-bit immediate */
85 INSN_OPER_K, /**< 16-bit immediate */
86 INSN_OPER_D, /**< 5-bit destination register */
87 INSN_OPER_I, /**< 16-bit immediate */
88 INSN_OPER_L, /**< 6-bit immediate */
89 INSN_OPER_SIZE /**< number of operand types */
90 } insn_oper_t;
91
92 typedef struct {
93 int oper;
94 ut32 mask;
95 ut32 shift;
96 } insn_oper_descr_t;
97
98 typedef struct {
99 int type;
100 char *format;
101 insn_oper_descr_t operands[INSN_OPER_SIZE];
102 } insn_type_descr_t;
103
104 typedef struct {
105 ut32 opcode;
106 char *name;
107 int type;
108 int opcode_mask;
109 int insn_type; /**< One of \link _RAnalOpType \endlink */
110 } insn_extra_t;
111
112 typedef struct {
113 ut32 opcode;
114 char *name;
115 int type;
116 int insn_type; /**< One of \link _RAnalOpType \endlink */
117 insn_extra_t *extra;
118 } insn_t;
119
120 extern insn_type_descr_t types[];
121 extern size_t types_count;
122
123 extern insn_extra_t extra_0x5[];
124 extern insn_extra_t extra_0x6[];
125 extern insn_extra_t extra_0x8[];
126 extern insn_extra_t extra_0x2e[];
127 extern insn_extra_t extra_0x2f[];
128 extern insn_extra_t extra_0x31[];
129 extern insn_extra_t extra_0x32[];
130 extern insn_extra_t extra_0x38[];
131 extern insn_extra_t extra_0x39[];
132
133 extern insn_t or1k_insns[];
134 extern size_t insns_count;
135
136 insn_extra_t *find_extra_descriptor(insn_extra_t *extra_descr, ut32 insn);
137
138 /**
139 * \brief Performs sign extension of number
140 *
141 * \param number number to extend
142 * \param mask mask under which number is placed
143 *
144 * \return sign-extended number
145 *
146 * If mask does not begin on the lsb, space on the right will also be filled with ones
147 *
148 */
149 ut32 sign_extend(ut32 number, ut32 mask);
150
get_operand_mask(insn_type_descr_t * type_descr,insn_oper_t operand)151 static inline ut32 get_operand_mask(insn_type_descr_t *type_descr, insn_oper_t operand) {
152 return type_descr->operands[operand].mask;
153 }
154
get_operand_shift(insn_type_descr_t * type_descr,insn_oper_t operand)155 static inline ut32 get_operand_shift(insn_type_descr_t *type_descr, insn_oper_t operand) {
156 return type_descr->operands[operand].shift;
157 }
158
get_operand_value(ut32 insn,insn_type_descr_t * type_descr,insn_oper_t operand)159 static inline ut32 get_operand_value(ut32 insn, insn_type_descr_t *type_descr, insn_oper_t operand) {
160 return (insn & get_operand_mask(type_descr, operand)) >> get_operand_shift(type_descr, operand);
161 }
162
has_type_descriptor(insn_type_t type)163 static inline int has_type_descriptor(insn_type_t type) {
164 return types + types_count > &types[type];
165 }
166
is_type_descriptor_defined(insn_type_t type)167 static inline int is_type_descriptor_defined(insn_type_t type) {
168 return types[type].type == type;
169 }
170
type_of_opcode(insn_t * descr,insn_extra_t * extra_descr)171 static inline insn_type_t type_of_opcode(insn_t *descr, insn_extra_t *extra_descr) {
172 r_return_val_if_fail (descr, INSN_END);
173
174 if (extra_descr == NULL) {
175 return descr->type;
176 } else {
177 return extra_descr->type;
178 }
179 }
180
181 #endif /* OR1K_DISAS_H */
182