| /dports/lang/v8/v8-9.6.180.12/src/torque/ |
| H A D | csa-generator.cc | 85 for (const Instruction& instruction : block->instructions()) { in EmitBlock() local
103 const PushUninitializedInstruction& instruction, in EmitInstruction()
115 const PushBuiltinPointerInstruction& instruction, in EmitInstruction()
125 const NamespaceConstantInstruction& instruction, in EmitInstruction()
364 const CallCsaMacroAndBranchInstruction& instruction, in EmitInstruction()
603 const CallBuiltinPointerInstruction& instruction, in EmitInstruction()
750 void CSAGenerator::EmitInstruction(const BranchInstruction& instruction, in EmitInstruction()
812 void CSAGenerator::EmitInstruction(const GotoInstruction& instruction, in EmitInstruction()
836 void CSAGenerator::EmitInstruction(const ReturnInstruction& instruction, in EmitInstruction()
849 const PrintConstantStringInstruction& instruction, in EmitInstruction()
[all …]
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| /dports/java/openjdk13/jdk13u-jdk-13.0.10-1-1/src/hotspot/cpu/ppc/ |
| H A D | disassembler_ppc.cpp | 42 #define print_instruction_bits(st, instruction, start_bit, end_bit) \ argument
50 #define print_decoded_bo_bits(env, instruction, end_bit) \ argument
72 #define print_decoded_bh_bits(env, instruction, end_bit, is_bclr) \ argument
128 uint32_t instruction = *(uint32_t*)here; in decode_instruction0() local
162 uint32_t instruction = *(uint32_t*)here; in annotate() local
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| /dports/java/openjdk14/jdk14u-jdk-14.0.2-12-1/src/hotspot/cpu/ppc/ |
| H A D | disassembler_ppc.cpp | 40 #define print_instruction_bits(st, instruction, start_bit, end_bit) \ argument
48 #define print_decoded_bo_bits(env, instruction, end_bit) \ argument
70 #define print_decoded_bh_bits(env, instruction, end_bit, is_bclr) \ argument
126 uint32_t instruction = *(uint32_t*)here; in decode_instruction0() local
160 uint32_t instruction = *(uint32_t*)here; in annotate() local
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| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/mips32/ |
| H A D | MIPS32r6int.c | 12 #define TEST_3R(instruction, RSval, RTval, RD, RS, RT) \ argument
30 #define TEST_3R2b(instruction, RSval, RTval, RD, RS, RT, val) \ argument
47 #define TEST_2R(instruction, RSval, RD, RS) \ argument
63 #define TEST_2Rb(instruction, RSval, RD, RS, val) \ argument
79 #define TEST_Rb(instruction, RSval, RS, val) \ argument
|
| H A D | msa_shuffle.c | 43 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
68 #define TEST_3IR(instruction, offset1, offset2, WD, WS, RT) \ argument
93 #define TEST_ELM(instruction, offset, WD, WS, n) \ argument
115 #define TEST_I8(instruction, offset, WD, WS, imm) \ argument
137 #define TEST_INSVE(instruction, offset, WD, WS, n) \ argument
|
| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/mips64/ |
| H A D | MIPS64r6int.c | 12 #define TEST_3R(instruction, RSval, RTval, RD, RS, RT) \ argument
30 #define TEST_3R2b(instruction, RSval, RTval, RD, RS, RT, val) \ argument
47 #define TEST_2R(instruction, RSval, RD, RS) \ argument
63 #define TEST_2Rb(instruction, RSval, RD, RS, val) \ argument
79 #define TEST_Rb(instruction, RSval, RS, val) \ argument
|
| H A D | rotate_swap.c | 3 #define TESTINST_DROTR(instruction, in, SA) \ argument
19 #define TESTINST_DROTRV(instruction, in, SA) \ argument
36 #define TESTINST_DSWAP(instruction, in) \ argument
|
| H A D | msa_shuffle.c | 43 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
68 #define TEST_3IR(instruction, offset1, offset2, WD, WS, RT) \ argument
93 #define TEST_ELM(instruction, offset, WD, WS, n) \ argument
115 #define TEST_I8(instruction, offset, WD, WS, imm) \ argument
137 #define TEST_INSVE(instruction, offset, WD, WS, n) \ argument
|
| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/mips64/ |
| H A D | MIPS64r6int.c | 12 #define TEST_3R(instruction, RSval, RTval, RD, RS, RT) \ argument
30 #define TEST_3R2b(instruction, RSval, RTval, RD, RS, RT, val) \ argument
47 #define TEST_2R(instruction, RSval, RD, RS) \ argument
63 #define TEST_2Rb(instruction, RSval, RD, RS, val) \ argument
79 #define TEST_Rb(instruction, RSval, RS, val) \ argument
|
| H A D | rotate_swap.c | 3 #define TESTINST_DROTR(instruction, in, SA) \ argument
19 #define TESTINST_DROTRV(instruction, in, SA) \ argument
36 #define TESTINST_DSWAP(instruction, in) \ argument
|
| H A D | msa_shuffle.c | 43 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
68 #define TEST_3IR(instruction, offset1, offset2, WD, WS, RT) \ argument
93 #define TEST_ELM(instruction, offset, WD, WS, n) \ argument
115 #define TEST_I8(instruction, offset, WD, WS, imm) \ argument
137 #define TEST_INSVE(instruction, offset, WD, WS, n) \ argument
|
| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/mips32/ |
| H A D | MIPS32r6int.c | 12 #define TEST_3R(instruction, RSval, RTval, RD, RS, RT) \ argument
30 #define TEST_3R2b(instruction, RSval, RTval, RD, RS, RT, val) \ argument
47 #define TEST_2R(instruction, RSval, RD, RS) \ argument
63 #define TEST_2Rb(instruction, RSval, RD, RS, val) \ argument
79 #define TEST_Rb(instruction, RSval, RS, val) \ argument
|
| H A D | msa_shuffle.c | 43 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
68 #define TEST_3IR(instruction, offset1, offset2, WD, WS, RT) \ argument
93 #define TEST_ELM(instruction, offset, WD, WS, n) \ argument
115 #define TEST_I8(instruction, offset, WD, WS, imm) \ argument
137 #define TEST_INSVE(instruction, offset, WD, WS, n) \ argument
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/net/third_party/quiche/src/quic/core/qpack/ |
| H A D | qpack_instruction_encoder_test.cc | 18 const QpackInstruction* instruction) { in CreateQpackInstructionWithValues()
82 const QpackInstruction instruction{QpackInstructionOpcode{0x00, 0x80}, in TEST_F() local
98 const QpackInstruction instruction{ in TEST_F() local
121 const QpackInstruction instruction{QpackInstructionOpcode{0xc0, 0xc0}, in TEST_F() local
143 const QpackInstruction instruction{QpackInstructionOpcode{0xe0, 0xe0}, in TEST_F() local
163 const QpackInstruction instruction{QpackInstructionOpcode{0xf0, 0xf0}, in TEST_F() local
183 const QpackInstruction instruction{QpackInstructionOpcode{0xf0, 0xf0}, in TEST_F() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/net/third_party/quiche/src/quic/core/qpack/ |
| H A D | qpack_instruction_encoder_test.cc | 19 const QpackInstruction* instruction) { in CreateQpackInstructionWithValues()
81 const QpackInstruction instruction{QpackInstructionOpcode{0x00, 0x80}, in TEST_F() local
97 const QpackInstruction instruction{ in TEST_F() local
120 const QpackInstruction instruction{QpackInstructionOpcode{0xc0, 0xc0}, in TEST_F() local
142 const QpackInstruction instruction{QpackInstructionOpcode{0xe0, 0xe0}, in TEST_F() local
162 const QpackInstruction instruction{QpackInstructionOpcode{0xf0, 0xf0}, in TEST_F() local
182 const QpackInstruction instruction{QpackInstructionOpcode{0xf0, 0xf0}, in TEST_F() local
|
| /dports/x11-wm/sway/sway-1.5.1/sway/desktop/ |
| H A D | transaction.c | 53 struct sway_transaction_instruction *instruction = in transaction_destroy() local
87 struct sway_transaction_instruction *instruction) { in copy_output_state()
96 struct sway_transaction_instruction *instruction) { in copy_workspace_state()
126 struct sway_transaction_instruction *instruction) { in copy_container_state()
165 struct sway_transaction_instruction *instruction = in transaction_add_node() local
294 struct sway_transaction_instruction *instruction = in transaction_apply() local
387 struct sway_transaction_instruction *instruction) { in should_configure()
418 struct sway_transaction_instruction *instruction = in transaction_commit() local
474 struct sway_transaction_instruction *instruction) { in set_instruction_ready()
502 struct sway_transaction_instruction *instruction = in transaction_notify_view_ready_by_serial() local
[all …]
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| /dports/java/openjdk16/jdk16u-jdk-16.0.2-7-1/src/hotspot/cpu/ppc/ |
| H A D | disassembler_ppc.cpp | 40 #define print_instruction_bits(st, instruction, start_bit, end_bit) \ argument
48 #define print_decoded_bo_bits(env, instruction, end_bit) \ argument
70 #define print_decoded_bh_bits(env, instruction, end_bit, is_bclr) \ argument
126 uint32_t instruction = *(uint32_t*)here; in decode_instruction0() local
160 uint32_t instruction = *(uint32_t*)here; in annotate() local
|
| /dports/java/openjdk17/jdk17u-jdk-17.0.1-12-1/src/hotspot/cpu/ppc/ |
| H A D | disassembler_ppc.cpp | 39 #define print_instruction_bits(st, instruction, start_bit, end_bit) \ argument
47 #define print_decoded_bo_bits(env, instruction, end_bit) \ argument
69 #define print_decoded_bh_bits(env, instruction, end_bit, is_bclr) \ argument
125 uint32_t instruction = *(uint32_t*)here; in decode_instruction0() local
159 uint32_t instruction = *(uint32_t*)here; in annotate() local
|
| /dports/java/openjdk15/jdk15u-jdk-15.0.6-1-1/src/hotspot/cpu/ppc/ |
| H A D | disassembler_ppc.cpp | 40 #define print_instruction_bits(st, instruction, start_bit, end_bit) \ argument
48 #define print_decoded_bo_bits(env, instruction, end_bit) \ argument
70 #define print_decoded_bh_bits(env, instruction, end_bit, is_bclr) \ argument
126 uint32_t instruction = *(uint32_t*)here; in decode_instruction0() local
160 uint32_t instruction = *(uint32_t*)here; in annotate() local
|
| /dports/emulators/mess/mame-mame0226/src/devices/cpu/m88000/ |
| H A D | m88000d.h | 33 struct instruction struct
41 m88000_disassembler(const std::map<u32, const m88000_disassembler::instruction> &ops); argument
|
| /dports/emulators/mame/mame-mame0226/src/devices/cpu/m88000/ |
| H A D | m88000d.h | 33 struct instruction struct
41 m88000_disassembler(const std::map<u32, const m88000_disassembler::instruction> &ops); argument
|
| /dports/www/guacamole-client/guacamole-client-1.3.0/guacamole/src/main/java/org/apache/guacamole/tunnel/ |
| H A D | OutputStreamInterceptingFilter.java | 113 private GuacamoleInstruction handleBlob(GuacamoleInstruction instruction) { in handleBlob()
173 private void handleEnd(GuacamoleInstruction instruction) { in handleEnd()
192 private void handleSync(GuacamoleInstruction instruction) { in handleSync()
197 public GuacamoleInstruction filter(GuacamoleInstruction instruction) in filter()
|
| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/arm/ |
| H A D | neon128.c | 51 #define TESTINSN_imm(instruction, QD, imm) \ argument
83 #define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \ argument
118 #define TESTINSN_un_q(instruction, QD, QM, QMtype, QMval) \ argument
164 #define TESTINSN_bin(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
202 #define TESTINSN_bin_f(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
240 #define TESTINSN_bin_q(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
291 #define TESTINSN_dual(instruction, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
|
| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/arm/ |
| H A D | neon128.c | 51 #define TESTINSN_imm(instruction, QD, imm) \ argument
83 #define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \ argument
118 #define TESTINSN_un_q(instruction, QD, QM, QMtype, QMval) \ argument
164 #define TESTINSN_bin(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
202 #define TESTINSN_bin_f(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
240 #define TESTINSN_bin_q(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
291 #define TESTINSN_dual(instruction, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
|
| /dports/converters/wkhtmltopdf/qt-5db36ec/src/3rdparty/webkit/Source/JavaScriptCore/jit/ |
| H A D | JITCall.cpp | 58 void JIT::emit_op_call_put_result(Instruction* instruction) in emit_op_call_put_result()
64 void JIT::compileOpCallVarargs(Instruction* instruction) in compileOpCallVarargs()
109 void JIT::compileOpCall(OpcodeID opcodeID, Instruction* instruction, unsigned) in compileOpCall()
145 void JIT::compileOpCallSlowCase(Instruction* instruction, Vector<SlowCaseEntry>::iterator& iter, un… in compileOpCallSlowCase()
166 void JIT::compileOpCall(OpcodeID opcodeID, Instruction* instruction, unsigned callLinkInfoIndex) in compileOpCall()
221 void JIT::compileOpCallSlowCase(Instruction* instruction, Vector<SlowCaseEntry>::iterator& iter, un… in compileOpCallSlowCase()
|