| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/SPIRV-Tools/source/fuzz/ |
| H A D | transformation_make_vector_operation_dynamic.cpp | 39 auto instruction = in IsApplicable() local
60 auto instruction = in Apply() local
89 opt::IRContext* ir_context, opt::Instruction* instruction) { in IsVectorOperation()
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| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/mips32/ |
| H A D | msa_comparison.c | 25 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
50 #define TEST_COP1(instruction, offset, WT) \ argument
78 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| H A D | vfp.c | 65 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
84 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \ argument
103 #define TESTINSN6LOADw(instruction, indexVal, fd, index, base) \ argument
120 #define TESTINSN6LOADd(instruction, indexVal, fd, index, base) \ argument
136 #define TESTINSN6LOADlu(instruction, indexVal, fd, index, base) \ argument
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| H A D | msa_arithmetic.c | 24 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
48 #define TEST_BIT(instruction, offset, WD, WS, n) \ argument
70 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/mips32/ |
| H A D | msa_comparison.c | 25 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
50 #define TEST_COP1(instruction, offset, WT) \ argument
78 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| H A D | vfp.c | 65 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
84 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \ argument
103 #define TESTINSN6LOADw(instruction, indexVal, fd, index, base) \ argument
120 #define TESTINSN6LOADd(instruction, indexVal, fd, index, base) \ argument
136 #define TESTINSN6LOADlu(instruction, indexVal, fd, index, base) \ argument
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| H A D | msa_arithmetic.c | 24 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
48 #define TEST_BIT(instruction, offset, WD, WS, n) \ argument
70 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/mips64/ |
| H A D | msa_comparison.c | 25 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
50 #define TEST_COP1(instruction, offset, WT) \ argument
78 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| H A D | msa_arithmetic.c | 24 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
48 #define TEST_BIT(instruction, offset, WD, WS, n) \ argument
70 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/mips64/ |
| H A D | msa_comparison.c | 25 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
50 #define TEST_COP1(instruction, offset, WT) \ argument
78 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| H A D | msa_arithmetic.c | 24 #define TEST_3R(instruction, offset1, offset2, WD, WS, WT) \ argument
48 #define TEST_BIT(instruction, offset, WD, WS, n) \ argument
70 #define TEST_I5(instruction, offset, WD, WS, imm) \ argument
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| /dports/graphics/spirv-tools/SPIRV-Tools-2021.4/source/fuzz/ |
| H A D | fuzzer_pass_replace_opselects_with_conditional_branches.cpp | 53 for (auto& instruction : block) { in Apply() local
102 auto instruction = in Apply() local
138 InstructionNeedsSplitBefore(opt::Instruction* instruction) { in InstructionNeedsSplitBefore()
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| H A D | transformation_make_vector_operation_dynamic.cpp | 38 auto instruction = in IsApplicable() local
59 auto instruction = in Apply() local
88 opt::IRContext* ir_context, opt::Instruction* instruction) { in IsVectorOperation()
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/SPIRV-Tools/src/source/fuzz/ |
| H A D | transformation_make_vector_operation_dynamic.cpp | 39 auto instruction = in IsApplicable() local
60 auto instruction = in Apply() local
89 opt::IRContext* ir_context, opt::Instruction* instruction) { in IsVectorOperation()
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| /dports/www/proxygen/proxygen-2021.12.27.00/proxygen/lib/http/codec/compress/ |
| H A D | HPACKEncodeBuffer.cpp | 52 uint64_t value, const HPACK::Instruction& instruction) { in encodeInteger()
57 uint8_t instruction, in encodeInteger()
105 uint32_t HPACKEncodeBuffer::encodeHuffman(uint8_t instruction, in encodeHuffman()
124 uint32_t HPACKEncodeBuffer::encodeLiteral(uint8_t instruction, in encodeLiteral()
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| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/arm/ |
| H A D | v6intARM.c | 9 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
41 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
70 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
100 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
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| H A D | v6media.c | 18 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
50 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
79 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
109 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
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| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/arm/ |
| H A D | v6intARM.c | 9 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
41 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
70 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
100 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
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| H A D | v6media.c | 18 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
50 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
79 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
109 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
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| /dports/lang/gcc10-devel/gcc-10-20211008/libgo/go/encoding/json/ |
| H A D | number_test.go | 62 "-0e-34",
63 }
64
65 for _, test := range validTests {
66 if !isValidNumber(test) {
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| /dports/sysutils/triton/Triton-0.8.1/src/examples/pin/ |
| H A D | looking_for_stack_base_and_main_addr.py | 18 def looking_for_main_addr(instruction): argument
38 def before(instruction): argument
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| H A D | runtime_memory_tainting.py | 17 def cbeforeSymProc(instruction): argument
23 def cafter(instruction): argument
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| /dports/sysutils/triton/Triton-0.8.1/src/testers/pin/ |
| H A D | unsuported_semantics.py | 14 def cbefore(instruction): argument
25 def cafter(instruction): argument
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| /dports/www/osticket/upload/include/staff/templates/ |
| H A D | 2fas.tmpl.php | 50 $instruction = __('Enter the token sent to you and click Verify'); variable
52 $instruction = __('Complete the form below and then click Next to verify the setup'); variable
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| /dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/tests/ |
| H A D | decoder_tests.cpp | 23 …st auto get_ir = [](const A32::ASIMDMatcher<A32::ArmTranslatorVisitor>& matcher, u32 instruction) { in __anon1abfa0850102()
34 …de_error = [&get_ir](const A32::ASIMDMatcher<A32::ArmTranslatorVisitor>& matcher, u32 instruction){ in __anon1abfa0850202()
56 const u32 instruction = expect | x; variable
|