xref: /dragonfly/sys/dev/misc/ipmi/ipmivars.h (revision 7670f87f)
1 /*-
2  * Copyright (c) 2006 IronPort Systems Inc. <ambrisko@ironport.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD: head/sys/dev/ipmi/ipmivars.h 253812 2013-07-30 18:44:29Z sbruno $
27  */
28 
29 #ifndef __IPMIVARS_H__
30 #define	__IPMIVARS_H__
31 
32 struct ipmi_get_info {
33 	int		iface_type;
34 	uint64_t	address;
35 	int		offset;
36 	int		io_mode;
37 	int		irq;
38 };
39 
40 struct ipmi_device;
41 
42 struct ipmi_request {
43 	TAILQ_ENTRY(ipmi_request) ir_link;
44 	struct ipmi_device *ir_owner;	/* Driver uses NULL. */
45 	u_char		*ir_request;	/* Request is data to send to BMC. */
46 	size_t		ir_requestlen;
47 	u_char		*ir_reply;	/* Reply is data read from BMC. */
48 	size_t		ir_replybuflen;	/* Length of ir_reply[] buffer. */
49 	int		ir_replylen;	/* Length of reply from BMC. */
50 	int		ir_error;
51 	long		ir_msgid;
52 	uint8_t		ir_addr;
53 	uint8_t		ir_command;
54 	uint8_t		ir_compcode;
55 };
56 
57 #define	MAX_RES				3
58 #define KCS_DATA			0
59 #define KCS_CTL_STS			1
60 #define SMIC_DATA			0
61 #define SMIC_CTL_STS			1
62 #define SMIC_FLAGS			2
63 
64 struct ipmi_softc;
65 
66 /* Per file descriptor data. */
67 struct ipmi_device {
68 	TAILQ_ENTRY(ipmi_device) ipmi_link;
69 	TAILQ_HEAD(,ipmi_request) ipmi_completed_requests;
70 	struct ipmi_softc	*ipmi_softc;
71 	int			ipmi_closing;
72 	int			ipmi_requests;
73 	u_char			ipmi_address;	/* IPMB address. */
74 	u_char			ipmi_lun;
75 };
76 
77 struct ipmi_kcs {
78 };
79 
80 struct ipmi_smic {
81 };
82 
83 struct ipmi_ssif {
84 	device_t smbus;
85 	int	smbus_address;
86 };
87 
88 struct ipmi_softc {
89 	device_t		ipmi_dev;
90 	union {
91 		struct ipmi_kcs kcs;
92 		struct ipmi_smic smic;
93 		struct ipmi_ssif ssif;
94 	} _iface;
95 	int			ipmi_io_rid;
96 	int			ipmi_io_type;
97 	struct resource		*ipmi_io_res[MAX_RES];
98 	int			ipmi_io_spacing;
99 	int			ipmi_irq_rid;
100 	struct resource		*ipmi_irq_res;
101 	void			*ipmi_irq;
102 	int			ipmi_detaching;
103 	int			ipmi_opened;
104 	struct cdev		*ipmi_cdev;
105 	TAILQ_HEAD(,ipmi_request) ipmi_pending_requests;
106 	int			ipmi_watchdog_active;
107 	struct intr_config_hook	ipmi_ich;
108 	struct lock		ipmi_lock;
109 	struct cv		ipmi_request_added;
110 	struct thread		*ipmi_kthread;
111 	driver_intr_t		*ipmi_intr;
112 	struct kqinfo		ipmi_kq;
113 
114 	struct callout		ipmi_watchdog;
115 	int			ipmi_wdog_period;
116 	int			ipmi_wdog_enable;
117 
118 	int			(*ipmi_startup)(struct ipmi_softc *);
119 	int			(*ipmi_enqueue_request)(struct ipmi_softc *, struct ipmi_request *);
120 };
121 
122 #define	ipmi_ssif_smbus_address		_iface.ssif.smbus_address
123 #define	ipmi_ssif_smbus			_iface.ssif.smbus
124 
125 struct ipmi_ipmb {
126 	u_char foo;
127 };
128 
129 #define KCS_MODE		0x01
130 #define SMIC_MODE		0x02
131 #define	BT_MODE			0x03
132 #define SSIF_MODE		0x04
133 
134 /* KCS status flags */
135 #define KCS_STATUS_OBF			0x01 /* Data Out ready from BMC */
136 #define KCS_STATUS_IBF			0x02 /* Data In from System */
137 #define KCS_STATUS_SMS_ATN		0x04 /* Ready in RX queue */
138 #define KCS_STATUS_C_D			0x08 /* Command/Data register write*/
139 #define KCS_STATUS_OEM1			0x10
140 #define KCS_STATUS_OEM2			0x20
141 #define KCS_STATUS_S0			0x40
142 #define KCS_STATUS_S1			0x80
143  #define KCS_STATUS_STATE(x)		((x)>>6)
144  #define KCS_STATUS_STATE_IDLE		0x0
145  #define KCS_STATUS_STATE_READ		0x1
146  #define KCS_STATUS_STATE_WRITE		0x2
147  #define KCS_STATUS_STATE_ERROR		0x3
148 #define	KCS_IFACE_STATUS_OK		0x00
149 #define KCS_IFACE_STATUS_ABORT		0x01
150 #define KCS_IFACE_STATUS_ILLEGAL	0x02
151 #define KCS_IFACE_STATUS_LENGTH_ERR	0x06
152 #define	KCS_IFACE_STATUS_UNKNOWN_ERR	0xff
153 
154 /* KCS control codes */
155 #define KCS_CONTROL_GET_STATUS_ABORT	0x60
156 #define KCS_CONTROL_WRITE_START		0x61
157 #define KCS_CONTROL_WRITE_END		0x62
158 #define KCS_DATA_IN_READ		0x68
159 
160 /* SMIC status flags */
161 #define SMIC_STATUS_BUSY		0x01 /* System set and BMC clears it */
162 #define SMIC_STATUS_SMS_ATN		0x04 /* BMC has a message */
163 #define SMIC_STATUS_EVT_ATN		0x08 /* Event has been RX */
164 #define SMIC_STATUS_SMI			0x10 /* asserted SMI */
165 #define SMIC_STATUS_TX_RDY		0x40 /* Ready to accept WRITE */
166 #define SMIC_STATUS_RX_RDY		0x80 /* Ready to read */
167 #define	SMIC_STATUS_RESERVED		0x22
168 
169 /* SMIC control codes */
170 #define SMIC_CC_SMS_GET_STATUS		0x40
171 #define SMIC_CC_SMS_WR_START		0x41
172 #define SMIC_CC_SMS_WR_NEXT		0x42
173 #define SMIC_CC_SMS_WR_END		0x43
174 #define SMIC_CC_SMS_RD_START		0x44
175 #define SMIC_CC_SMS_RD_NEXT		0x45
176 #define SMIC_CC_SMS_RD_END		0x46
177 
178 /* SMIC status codes */
179 #define SMIC_SC_SMS_RDY			0xc0
180 #define SMIC_SC_SMS_WR_START		0xc1
181 #define SMIC_SC_SMS_WR_NEXT		0xc2
182 #define SMIC_SC_SMS_WR_END		0xc3
183 #define SMIC_SC_SMS_RD_START		0xc4
184 #define SMIC_SC_SMS_RD_NEXT		0xc5
185 #define SMIC_SC_SMS_RD_END		0xc6
186 
187 #define	IPMI_ADDR(netfn, lun)		((netfn) << 2 | (lun))
188 #define	IPMI_REPLY_ADDR(addr)		((addr) + 0x4)
189 
190 #define	IPMI_LOCK(sc)			lockmgr(&(sc)->ipmi_lock, LK_EXCLUSIVE)
191 #define	IPMI_UNLOCK(sc)			lockmgr(&(sc)->ipmi_lock, LK_RELEASE)
192 #define	IPMI_LOCK_ASSERT(sc)		KKASSERT(lockowned(&(sc)->ipmi_lock))
193 
194 #define	ipmi_alloc_driver_request(addr, cmd, reqlen, replylen)		\
195 	ipmi_alloc_request(NULL, 0, (addr), (cmd), (reqlen), (replylen))
196 
197 /* I/O to a single I/O resource. */
198 #define INB_SINGLE(sc, x)						\
199 	bus_read_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x))
200 #define OUTB_SINGLE(sc, x, value)					\
201 	bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value)
202 
203 /* I/O with each register in its in I/O resource. */
204 #define INB_MULTIPLE(sc, x)			\
205 	bus_read_1((sc)->ipmi_io_res[(x)], 0)
206 #define OUTB_MULTIPLE(sc, x, value)					\
207 	bus_write_1((sc)->ipmi_io_res[(x)], 0, value)
208 
209 /*
210  * Determine I/O method based on whether or not we have more than one I/O
211  * resource.
212  */
213 #define	INB(sc, x)							\
214 	((sc)->ipmi_io_res[1] != NULL ? INB_MULTIPLE(sc, x) : INB_SINGLE(sc, x))
215 #define	OUTB(sc, x, value)						\
216 	((sc)->ipmi_io_res[1] != NULL ? OUTB_MULTIPLE(sc, x, value) :	\
217 	    OUTB_SINGLE(sc, x, value))
218 
219 #define MAX_TIMEOUT 6 * hz
220 
221 int	ipmi_attach(device_t);
222 int	ipmi_detach(device_t);
223 void	ipmi_release_resources(device_t);
224 
225 /* Manage requests. */
226 struct ipmi_request *ipmi_alloc_request(struct ipmi_device *, long, uint8_t,
227 	    uint8_t, size_t, size_t);
228 void	ipmi_complete_request(struct ipmi_softc *, struct ipmi_request *);
229 struct ipmi_request *ipmi_dequeue_request(struct ipmi_softc *);
230 void	ipmi_free_request(struct ipmi_request *);
231 int	ipmi_polled_enqueue_request(struct ipmi_softc *, struct ipmi_request *);
232 int	ipmi_submit_driver_request(struct ipmi_softc *, struct ipmi_request *,
233 	    int);
234 
235 /* Identify BMC interface via SMBIOS. */
236 int	ipmi_smbios_identify(struct ipmi_get_info *);
237 
238 /* Match BMC PCI device listed in SMBIOS. */
239 const char *ipmi_pci_match(uint16_t, uint16_t);
240 
241 /* Interface attach routines. */
242 int	ipmi_kcs_attach(struct ipmi_softc *);
243 int	ipmi_kcs_probe_align(struct ipmi_softc *);
244 int	ipmi_smic_attach(struct ipmi_softc *);
245 int	ipmi_ssif_attach(struct ipmi_softc *, device_t, int);
246 
247 #ifdef IPMB
248 int	ipmi_handle_attn(struct ipmi_softc *);
249 #endif
250 
251 extern devclass_t ipmi_devclass;
252 extern int ipmi_attached;
253 
254 #endif	/* !__IPMIVARS_H__ */
255