1 /* $OpenBSD: irongate_pci.c,v 1.7 2014/03/29 18:09:28 guenther Exp $ */
2 /* $NetBSD: irongate_pci.c,v 1.2 2000/06/29 08:58:47 mrg Exp $ */
3
4 /*-
5 * Copyright (c) 2000 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic
35 * chipset.
36 */
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/device.h>
42
43 #include <uvm/uvm_extern.h>
44
45 #include <dev/pci/pcireg.h>
46 #include <dev/pci/pcivar.h>
47 #include <alpha/pci/irongatereg.h>
48 #include <alpha/pci/irongatevar.h>
49
50 void irongate_attach_hook(struct device *, struct device *,
51 struct pcibus_attach_args *);
52 int irongate_bus_maxdevs(void *, int);
53 pcitag_t irongate_make_tag(void *, int, int, int);
54 void irongate_decompose_tag(void *, pcitag_t, int *, int *,
55 int *);
56 int irongate_conf_size(void *, pcitag_t);
57 pcireg_t irongate_conf_read(void *, pcitag_t, int);
58 void irongate_conf_write(void *, pcitag_t, int, pcireg_t);
59
60 /* AMD 751 systems are always single-processor, so this is easy. */
61 #define PCI_CONF_LOCK(s) (s) = splhigh()
62 #define PCI_CONF_UNLOCK(s) splx((s))
63
64 #define PCI_CONF_ADDR (IRONGATE_IO_BASE|IRONGATE_CONFADDR)
65 #define PCI_CONF_DATA (IRONGATE_IO_BASE|IRONGATE_CONFDATA)
66
67 #define REGVAL(r) (*(volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r))
68
69 void
irongate_pci_init(pci_chipset_tag_t pc,void * v)70 irongate_pci_init(pci_chipset_tag_t pc, void *v)
71 {
72
73 pc->pc_conf_v = v;
74 pc->pc_attach_hook = irongate_attach_hook;
75 pc->pc_bus_maxdevs = irongate_bus_maxdevs;
76 pc->pc_make_tag = irongate_make_tag;
77 pc->pc_decompose_tag = irongate_decompose_tag;
78 pc->pc_conf_size = irongate_conf_size;
79 pc->pc_conf_read = irongate_conf_read;
80 pc->pc_conf_write = irongate_conf_write;
81 }
82
83 void
irongate_attach_hook(struct device * parent,struct device * self,struct pcibus_attach_args * pba)84 irongate_attach_hook(struct device *parent, struct device *self,
85 struct pcibus_attach_args *pba)
86 {
87 }
88
89 int
irongate_bus_maxdevs(void * ipv,int busno)90 irongate_bus_maxdevs(void *ipv, int busno)
91 {
92
93 return 32;
94 }
95
96 pcitag_t
irongate_make_tag(void * ipv,int b,int d,int f)97 irongate_make_tag(void *ipv, int b, int d, int f)
98 {
99
100 return (b << 16) | (d << 11) | (f << 8);
101 }
102
103 void
irongate_decompose_tag(void * ipv,pcitag_t tag,int * bp,int * dp,int * fp)104 irongate_decompose_tag(void *ipv, pcitag_t tag, int *bp, int *dp, int *fp)
105 {
106
107 if (bp != NULL)
108 *bp = (tag >> 16) & 0xff;
109 if (dp != NULL)
110 *dp = (tag >> 11) & 0x1f;
111 if (fp != NULL)
112 *fp = (tag >> 8) & 0x7;
113 }
114
115 int
irongate_conf_size(void * ipv,pcitag_t tag)116 irongate_conf_size(void *ipv, pcitag_t tag)
117 {
118 return PCI_CONFIG_SPACE_SIZE;
119 }
120
121 pcireg_t
irongate_conf_read(void * ipv,pcitag_t tag,int offset)122 irongate_conf_read(void *ipv, pcitag_t tag, int offset)
123 {
124 int d;
125
126 /*
127 * The AMD 751 appears in PCI configuration space, but
128 * that is ... counter-intuitive to the way we normally
129 * attach PCI-Host bridges on the Alpha. So, filter out
130 * the AMD 751 device here. We provide a private entry
131 * point for getting at it from machdep code.
132 */
133 irongate_decompose_tag(ipv, tag, NULL, &d, NULL);
134 if (d == IRONGATE_PCIHOST_DEV)
135 return ((pcireg_t) -1);
136
137 return (irongate_conf_read0(ipv, tag, offset));
138 }
139
140 pcireg_t
irongate_conf_read0(void * ipv,pcitag_t tag,int offset)141 irongate_conf_read0(void *ipv, pcitag_t tag, int offset)
142 {
143 pcireg_t data;
144 int s;
145
146 PCI_CONF_LOCK(s);
147 REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
148 alpha_mb();
149 data = REGVAL(PCI_CONF_DATA);
150 REGVAL(PCI_CONF_ADDR) = 0;
151 alpha_mb();
152 PCI_CONF_UNLOCK(s);
153
154 return (data);
155 }
156
157 void
irongate_conf_write(void * ipv,pcitag_t tag,int offset,pcireg_t data)158 irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data)
159 {
160 int s;
161
162 PCI_CONF_LOCK(s);
163 REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
164 alpha_mb();
165 REGVAL(PCI_CONF_DATA) = data;
166 alpha_mb();
167 REGVAL(PCI_CONF_ADDR) = 0;
168 alpha_mb();
169 PCI_CONF_UNLOCK(s);
170 }
171