1 /*
2 * nextpnr -- Next Generation Place and Route
3 *
4 * Copyright (C) 2018 David Shah <david@symbioticeda.com>
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
18 */
19
20 #ifndef ECP5_CELLS_H
21 #define ECP5_CELLS_H
22
23 #include "nextpnr.h"
24
25 NEXTPNR_NAMESPACE_BEGIN
26
27 // Create a standard ECP5 cell and return it
28 // Name will be automatically assigned if not specified
29 std::unique_ptr<CellInfo> create_ecp5_cell(Context *ctx, IdString type, std::string name = "");
30
31 // Return true if a cell is a LUT
is_lut(const BaseCtx * ctx,const CellInfo * cell)32 inline bool is_lut(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("LUT4"); }
33
34 // Return true if a cell is a flipflop
is_ff(const BaseCtx * ctx,const CellInfo * cell)35 inline bool is_ff(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("TRELLIS_FF"); }
36
is_carry(const BaseCtx * ctx,const CellInfo * cell)37 inline bool is_carry(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("CCU2C"); }
38
is_lc(const BaseCtx * ctx,const CellInfo * cell)39 inline bool is_lc(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("TRELLIS_SLICE"); }
40
is_trellis_io(const BaseCtx * ctx,const CellInfo * cell)41 inline bool is_trellis_io(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("TRELLIS_IO"); }
42
is_dpram(const BaseCtx * ctx,const CellInfo * cell)43 inline bool is_dpram(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("TRELLIS_DPR16X4"); }
44
is_pfumx(const BaseCtx * ctx,const CellInfo * cell)45 inline bool is_pfumx(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("PFUMX"); }
46
is_l6mux(const BaseCtx * ctx,const CellInfo * cell)47 inline bool is_l6mux(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("L6MUX21"); }
48
is_iologic_input_cell(const BaseCtx * ctx,const CellInfo * cell)49 inline bool is_iologic_input_cell(const BaseCtx *ctx, const CellInfo *cell)
50 {
51 return cell->type == ctx->id("IDDRX1F") || cell->type == ctx->id("IDDRX2F") || cell->type == ctx->id("IDDR71B") ||
52 cell->type == ctx->id("IDDRX2DQA");
53 }
is_iologic_output_cell(const BaseCtx * ctx,const CellInfo * cell)54 inline bool is_iologic_output_cell(const BaseCtx *ctx, const CellInfo *cell)
55 {
56 return cell->type == ctx->id("ODDRX1F") || cell->type == ctx->id("ODDRX2F") || cell->type == ctx->id("ODDR71B") ||
57 cell->type == ctx->id("ODDRX2DQA") || cell->type == ctx->id("ODDRX2DQSB") || cell->type == ctx->id("OSHX2A");
58 }
59
60 void ff_to_slice(Context *ctx, CellInfo *ff, CellInfo *lc, int index, bool driven_by_lut);
61 void lut_to_slice(Context *ctx, CellInfo *lut, CellInfo *lc, int index);
62 void ccu2c_to_slice(Context *ctx, CellInfo *ccu, CellInfo *lc);
63 void dram_to_ramw(Context *ctx, CellInfo *ram, CellInfo *lc);
64 void dram_to_ram_slice(Context *ctx, CellInfo *ram, CellInfo *lc, CellInfo *ramw, int index);
65
66 // Convert a nextpnr IO buffer to a TRELLIS_IO
67 void nxio_to_tr(Context *ctx, CellInfo *nxio, CellInfo *trio, std::vector<std::unique_ptr<CellInfo>> &created_cells,
68 std::unordered_set<IdString> &todelete_cells);
69
70 NEXTPNR_NAMESPACE_END
71
72 #endif
73