xref: /netbsd/sys/arch/sparc64/dev/iommuvar.h (revision 34d96f12)
1 /*	$NetBSD: iommuvar.h,v 1.25 2021/07/24 21:31:36 andvar Exp $	*/
2 
3 /*
4  * Copyright (c) 1999 Matthew R. Green
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef _SPARC64_DEV_IOMMUVAR_H_
30 #define _SPARC64_DEV_IOMMUVAR_H_
31 
32 /*
33  * Streaming buffer control
34  *
35  * It's easy to deal w/sysio since it has a single streaming buffer, and
36  * flushes are done on 8-byte boundaries.  But psycho is a pain since it
37  * has two streaming buffers and the streaming buffer flush dumps 64 bytes
38  * of data.
39  */
40 struct strbuf_ctl {
41 	struct iommu_state	*sb_is;		/* Pointer to our iommu */
42 	bus_space_handle_t	sb_sb;		/* Handle for our regs */
43 	paddr_t			sb_flushpa;	/* to flush streaming buffers */
44 	volatile int64_t	*sb_flush;
45 };
46 
47 /*
48  * per-IOMMU state
49  */
50 struct iommu_state {
51 	paddr_t			is_ptsb;	/* TSB physical address */
52 	int64_t			*is_tsb;	/* TSB virtual address */
53 	int			is_tsbsize;	/* 0 = 8K, ... */
54 	u_int			is_dvmabase;
55 	u_int			is_dvmaend;
56 	int64_t			is_cr;		/* IOMMU control register value */
57 	struct extent		*is_dvmamap;	/* DVMA map for this instance */
58 	kmutex_t		is_lock;	/* lock for DVMA map */
59 	int			is_flags;
60 #define IOMMU_FLUSH_CACHE	0x00000001
61 #define IOMMU_TSBSIZE_IN_PTSB	0x00000002	/* PCIe */
62 #define IOMMU_SYNC_BEFORE_UNMAP	0x00000004
63 
64 	struct strbuf_ctl	*is_sb[2];	/* Streaming buffers if any */
65 
66 	/* copies of our parents state, to allow us to be self contained */
67 	bus_space_tag_t		is_bustag;	/* our bus tag */
68 	bus_space_handle_t	is_iommu;	/* IOMMU registers */
69 	uint64_t		is_devhandle;   /* for sun4v hypervisor calls */
70 };
71 
72 /* interfaces for PCI/SBUS code */
73 void	iommu_init(char *, struct iommu_state *, int, uint32_t);
74 void	iommu_reset(struct iommu_state *);
75 paddr_t iommu_extract(struct iommu_state *, vaddr_t);
76 
77 int	iommu_dvmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
78 		struct proc *, int);
79 void	iommu_dvmamap_unload(bus_dma_tag_t, bus_dmamap_t);
80 int	iommu_dvmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
81 		bus_dma_segment_t *, int, bus_size_t, int);
82 void	iommu_dvmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, bus_size_t,
83 		int);
84 int	iommu_dvmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
85 		bus_dma_segment_t *, int, int *, int);
86 void	iommu_dvmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
87 int	iommu_dvmamem_map(bus_dma_tag_t, bus_dma_segment_t *, int, size_t,
88 		void **, int);
89 void	iommu_dvmamem_unmap(bus_dma_tag_t, void *, size_t);
90 
91 #endif /* _SPARC64_DEV_IOMMUVAR_H_ */
92