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Searched defs:ixDIDT_DBR_EDC_STALL_PATTERN_5_6 (Results 1 – 2 of 2) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7202 #define ixDIDT_DBR_EDC_STALL_PATTERN_5_6 macro
H A Dgc_9_1_offset.h7464 #define ixDIDT_DBR_EDC_STALL_PATTERN_5_6 macro