Searched defs:ixDIDT_DBR_EDC_STALL_PATTERN_5_6 (Results 1 – 2 of 2) sorted by path
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ | ||
H A D | gc_9_0_offset.h | 7202 #define ixDIDT_DBR_EDC_STALL_PATTERN_5_6 … macro |
H A D | gc_9_1_offset.h | 7464 #define ixDIDT_DBR_EDC_STALL_PATTERN_5_6 … macro |