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Searched defs:lane (Results 1 – 25 of 96) sorted by relevance

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/linux/drivers/phy/freescale/
H A Dphy-fsl-lynx-28g.c99 #define LYNX_28G_LNaPSS(lane) (0x1000 + (lane) * 0x4) argument
135 struct lynx_28g_lane lane[LYNX_28G_NUM_LANE]; member
152 #define lynx_28g_lane_rmw(lane, reg, val, mask) \ argument
155 #define lynx_28g_lane_read(lane, reg) \ argument
336 struct lynx_28g_lane *lane = phy_get_drvdata(phy); in lynx_28g_power_off() local
360 struct lynx_28g_lane *lane = phy_get_drvdata(phy); in lynx_28g_power_on() local
384 struct lynx_28g_lane *lane = phy_get_drvdata(phy); in lynx_28g_set_mode() local
434 struct lynx_28g_lane *lane = phy_get_drvdata(phy); in lynx_28g_validate() local
448 struct lynx_28g_lane *lane = phy_get_drvdata(phy); in lynx_28g_init() local
512 struct lynx_28g_lane *lane; in lynx_28g_cdr_lock_check() local
[all …]
/linux/drivers/net/dsa/b53/
H A Db53_serdes.c42 static void b53_serdes_set_lane(struct b53_device *dev, u8 lane) in b53_serdes_set_lane()
54 static void b53_serdes_write(struct b53_device *dev, u8 lane, in b53_serdes_write()
61 static u16 b53_serdes_read(struct b53_device *dev, u8 lane, in b53_serdes_read()
74 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_config() local
92 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_an_restart() local
106 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_get_state() local
142 u8 lane = b53_serdes_map_lane(dev, port); in b53_serdes_link_set() local
168 u8 lane = b53_serdes_map_lane(dev, port); in b53_serdes_phylink_get_caps() local
198 u8 lane = b53_serdes_map_lane(dev, port); in b53_serdes_phylink_mac_select_pcs() local
214 u8 lane = b53_serdes_map_lane(dev, port); in b53_serdes_init() local
/linux/drivers/phy/marvell/
H A Dphy-mvebu-a3700-comphy.c227 unsigned int lane; member
397 static void comphy_lane_reg_set(struct mvebu_a3700_comphy_lane *lane, in comphy_lane_reg_set()
415 static int comphy_lane_reg_poll(struct mvebu_a3700_comphy_lane *lane, in comphy_lane_reg_poll()
532 mvebu_a3700_comphy_sata_power_on(struct mvebu_a3700_comphy_lane *lane) in mvebu_a3700_comphy_sata_power_on()
599 static void comphy_gbe_phy_init(struct mvebu_a3700_comphy_lane *lane, in comphy_gbe_phy_init()
1112 static bool mvebu_a3700_comphy_check_mode(int lane, in mvebu_a3700_comphy_check_mode()
1138 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_a3700_comphy_set_mode() local
1159 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_a3700_comphy_power_on() local
1188 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_a3700_comphy_power_off() local
1219 struct mvebu_a3700_comphy_lane *lane; in mvebu_a3700_comphy_xlate() local
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H A Dphy-armada38x-comphy.c47 struct a38x_comphy_lane lane[MAX_A38X_COMPHY]; member
64 static void a38x_set_conf(struct a38x_comphy_lane *lane, bool enable) in a38x_set_conf()
79 static void a38x_comphy_set_reg(struct a38x_comphy_lane *lane, in a38x_comphy_set_reg()
88 static void a38x_comphy_set_speed(struct a38x_comphy_lane *lane, in a38x_comphy_set_speed()
97 static int a38x_comphy_poll(struct a38x_comphy_lane *lane, in a38x_comphy_poll()
120 struct a38x_comphy_lane *lane = phy_get_drvdata(phy); in a38x_comphy_set_mode() local
165 struct a38x_comphy_lane *lane; in a38x_comphy_xlate() local
H A Dphy-mvebu-cp110-comphy.c182 unsigned lane; member
277 unsigned long lane, unsigned long mode) in mvebu_comphy_smc()
496 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_comphy_set_mode_sgmii() local
529 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_comphy_set_mode_rxaui() local
582 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_comphy_set_mode_10gbaser() local
724 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_comphy_power_on_legacy() local
768 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_comphy_power_on() local
856 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_comphy_set_mode() local
876 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_comphy_power_off_legacy() local
922 struct mvebu_comphy_lane *lane; in mvebu_comphy_xlate() local
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/linux/drivers/phy/tegra/
H A Dxusb.c115 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, in tegra_xusb_lane_parse_dt()
141 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra_xusb_lane_destroy() local
191 struct phy *lane; in tegra_xusb_pad_register() local
208 struct tegra_xusb_lane *lane; in tegra_xusb_pad_register() local
348 struct tegra_xusb_lane *lane; in tegra_xusb_pad_program() local
403 struct tegra_xusb_lane *lane, *hit = ERR_PTR(-ENODEV); in tegra_xusb_find_lane() local
662 struct tegra_xusb_lane *lane; in tegra_xusb_setup_usb_role_switch() local
1395 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra_xusb_padctl_enable_phy_sleepwalk() local
1483 struct tegra_xusb_lane *lane; in tegra_phy_xusb_utmi_pad_power_on() local
1499 struct tegra_xusb_lane *lane; in tegra_phy_xusb_utmi_pad_power_down() local
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H A Dxusb-tegra210.c1699 struct tegra_xusb_lane *lane; in tegra210_usb3_set_lfps_detect() local
1800 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_usb2_phy_init() local
1835 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_usb2_phy_exit() local
1916 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_usb2_phy_set_mode() local
1954 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_usb2_phy_power_on() local
2114 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_usb2_phy_power_off() local
2296 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_hsic_phy_init() local
2317 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_hsic_phy_power_on() local
2402 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_hsic_phy_power_off() local
3089 struct tegra_xusb_lane *lane; in tegra210_utmi_port_reset() local
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H A Dxusb-tegra124.c292 struct tegra_xusb_lane *lane; in tegra124_usb3_save_context() local
466 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_init() local
473 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_exit() local
480 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_power_on() local
569 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_power_off() local
715 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_ulpi_phy_init() local
722 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_ulpi_phy_exit() local
851 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_hsic_phy_init() local
858 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_hsic_phy_exit() local
865 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_hsic_phy_power_on() local
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H A Dxusb-tegra186.c321 static void tegra186_usb2_lane_remove(struct tegra_xusb_lane *lane) in tegra186_usb2_lane_remove()
525 static int tegra186_utmi_enable_phy_wake(struct tegra_xusb_lane *lane) in tegra186_utmi_enable_phy_wake()
698 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra186_utmi_pad_power_on() local
731 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra186_utmi_pad_power_down() local
809 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra186_utmi_phy_set_mode() local
847 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra186_utmi_phy_power_on() local
925 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra186_utmi_phy_init() local
952 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra186_utmi_phy_exit() local
1097 static void tegra186_usb3_lane_remove(struct tegra_xusb_lane *lane) in tegra186_usb3_lane_remove()
1250 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra186_usb3_phy_power_on() local
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/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dpio_phy_regs.h156 #define VLV_TX_DW2(ch, lane) _VLV_TX((ch), (lane), 2) argument
163 #define VLV_TX_DW3(ch, lane) _VLV_TX((ch), (lane), 3) argument
170 #define VLV_TX_DW4(ch, lane) _VLV_TX((ch), (lane), 4) argument
177 #define VLV_TX_DW5(ch, lane) _VLV_TX((ch), (lane), 5) argument
290 #define CHV_TX_DW0(ch, lane) _VLV_TX((ch), (lane), 0) argument
291 #define CHV_TX_DW1(ch, lane) _VLV_TX((ch), (lane), 1) argument
292 #define CHV_TX_DW2(ch, lane) _VLV_TX((ch), (lane), 2) argument
293 #define CHV_TX_DW3(ch, lane) _VLV_TX((ch), (lane), 3) argument
294 #define CHV_TX_DW4(ch, lane) _VLV_TX((ch), (lane), 4) argument
295 #define CHV_TX_DW5(ch, lane) _VLV_TX((ch), (lane), 5) argument
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H A Dintel_cx0_phy_regs.h39 #define XELPDP_PORT_M2P_MSGBUS_CTL(i915__, port, lane) \ argument
59 #define XELPDP_PORT_P2M_MSGBUS_STATUS(i915__, port, lane) \ argument
119 #define XELPDP_LANE_PIPE_RESET(lane) _PICK(lane, REG_BIT(31), REG_BIT(30)) argument
121 #define XELPDP_LANE_POWERDOWN_UPDATE(lane) _PICK(lane, REG_BIT(25), REG_BIT(24)) argument
126 #define XELPDP_LANE_POWERDOWN_NEW_STATE(lane, val) _PICK(lane, \ argument
161 #define XELPDP_PORT_MSGBUS_TIMER(i915__, port, lane) \ argument
182 #define XELPDP_LANE_PCLK_PLL_REQUEST(lane) REG_BIT(31 - ((lane) * 4)) argument
183 #define XELPDP_LANE_PCLK_PLL_ACK(lane) REG_BIT(30 - ((lane) * 4)) argument
184 #define XELPDP_LANE_PCLK_REFCLK_REQUEST(lane) REG_BIT(29 - ((lane) * 4)) argument
185 #define XELPDP_LANE_PCLK_REFCLK_ACK(lane) REG_BIT(28 - ((lane) * 4)) argument
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H A Dintel_cx0_phy.c78 int lane; in intel_cx0_program_msgbus_timer() local
120 int lane) in intel_clear_response_ready_flag()
342 int lane; in intel_cx0_write() local
395 u8 lane; in intel_cx0_rmw() local
2500 int lane = 0; in intel_cx0_get_powerdown_update() local
2511 int lane = 0; in intel_cx0_get_powerdown_state() local
2526 int lane; in intel_cx0_powerdown_change_sequence() local
2573 int lane = 0; in intel_cx0_get_pclk_refclk_request() local
2584 int lane = 0; in intel_cx0_get_pclk_refclk_ack() local
2696 int lane = 0; in intel_cx0_get_pclk_pll_request() local
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H A Dintel_dp_link_training.c345 int lane) in intel_dp_get_lane_adjust_tx_ffe_preset()
365 int lane) in intel_dp_get_lane_adjust_vswing_preemph()
401 int lane) in intel_dp_get_lane_adjust_train()
412 #define _TRAIN_REQ_VSWING_ARGS(link_status, lane) \ argument
419 #define _TRAIN_REQ_PREEMPH_ARGS(link_status, lane) \ argument
426 #define _TRAIN_REQ_TX_FFE_ARGS(link_status, lane) \ argument
440 int lane; in intel_dp_get_adjust_train() local
639 int lane; in intel_dp_link_max_vswing_reached() local
757 int lane; in intel_dp_adjust_request_changed() local
H A Dbxt_dpio_phy_regs.h28 #define _BXT_LANE_OFFSET(lane) (((lane) >> 1) * 0x200 + \ argument
30 #define _MMIO_BXT_PHY_CH_LN(phy, ch, lane, reg_ch0, reg_ch1) \ argument
209 #define BXT_PORT_TX_DW2_LN(phy, ch, lane) _MMIO_BXT_PHY_CH_LN(phy, ch, lane, \ argument
226 #define BXT_PORT_TX_DW3_LN(phy, ch, lane) _MMIO_BXT_PHY_CH_LN(phy, ch, lane, \ argument
241 #define BXT_PORT_TX_DW4_LN(phy, ch, lane) _MMIO_BXT_PHY_CH_LN(phy, ch, lane, \ argument
256 #define BXT_PORT_TX_DW5_LN(phy, ch, lane) _MMIO_BXT_PHY_CH_LN(phy, ch, lane, \ argument
269 #define BXT_PORT_TX_DW14_LN(phy, ch, lane) _MMIO_BXT_PHY_CH_LN(phy, ch, lane, \ argument
/linux/drivers/net/dsa/mv88e6xxx/
H A Dserdes.c37 int lane, int device, int reg, u16 *val) in mv88e6390_serdes_read()
244 int lane = -ENODEV; in mv88e6341_serdes_get_lane() local
261 int lane = -ENODEV; in mv88e6390_serdes_get_lane() local
286 int lane = -ENODEV; in mv88e6390x_serdes_get_lane() local
362 int lane = -ENODEV; in mv88e6393x_serdes_get_lane() local
414 static uint64_t mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_get_stat()
436 int lane; in mv88e6390_serdes_get_stats() local
495 int lane; in mv88e6390_serdes_get_regs() local
/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_training.c305 uint32_t lane; in maximize_lane_settings() local
461 uint32_t lane; in dp_is_max_vs_reached() local
477 uint32_t lane; in dp_is_cr_done() local
491 uint32_t lane; in dp_is_ch_eq_done() local
502 uint32_t lane; in dp_is_symbol_locked() local
522 uint32_t lane; in dp_check_link_loss_status() local
567 uint32_t lane; in dp_get_lane_status_and_lane_adjust() local
644 uint32_t lane; in override_lane_settings() local
685 uint32_t lane; in override_training_settings() local
815 uint32_t lane; in dp_decide_lane_settings() local
[all …]
H A Dlink_dp_training_fixed_vs_pe_retimer.c52 uint8_t lane; in dp_fixed_vs_pe_read_lane_adjust() local
80 uint8_t lane = 0; in dp_fixed_vs_pe_set_retimer_lane_settings() local
106 uint8_t lane = 0; in perform_fixed_vs_pe_nontransparent_training_sequence() local
212 uint8_t lane = 0; in dp_perform_fixed_vs_pe_training_sequence() local
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c239 int pre_emphasis, int lane) in analogix_dp_set_lane_lane_pre_emphasis()
262 int lane, lane_count, pll_tries, retval; in analogix_dp_link_start() local
338 int lane; in analogix_dp_clock_recovery_ok() local
352 int lane; in analogix_dp_channel_eq_ok() local
369 analogix_dp_get_adjust_request_voltage(u8 adjust_request[2], int lane) in analogix_dp_get_adjust_request_voltage()
379 int lane) in analogix_dp_get_adjust_request_pre_emphasis()
388 u8 training_lane_set, int lane) in analogix_dp_set_lane_link_training()
410 int lane) in analogix_dp_get_lane_link_training()
446 int lane, lane_count; in analogix_dp_get_adjust_training_lane() local
469 int lane, lane_count, retval; in analogix_dp_process_clock_recovery() local
[all …]
/linux/drivers/phy/samsung/
H A Dphy-gs101-ufs.c23 #define PHY_PMA_TRSV_ADDR(reg, lane) (PHY_APB_ADDR((reg) + \ argument
121 static int gs101_phy_wait_for_calibration(struct phy *phy, u8 lane) in gs101_phy_wait_for_calibration()
146 static int gs101_phy_wait_for_cdr_lock(struct phy *phy, u8 lane) in gs101_phy_wait_for_cdr_lock()
H A Dphy-samsung-ufs.c33 u8 lane) in samsung_ufs_phy_config()
48 int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy, u8 lane) in samsung_ufs_phy_wait_for_lock_acq()
/linux/arch/arm/mach-mv78xx0/
H A Dpcie.c18 #define MV78XX0_MBUS_PCIE_MEM_TARGET(port, lane) ((port) ? 8 : 4) argument
19 #define MV78XX0_MBUS_PCIE_MEM_ATTR(port, lane) (0xf8 & ~(0x10 << (lane))) argument
20 #define MV78XX0_MBUS_PCIE_IO_TARGET(port, lane) ((port) ? 8 : 4) argument
21 #define MV78XX0_MBUS_PCIE_IO_ATTR(port, lane) (0xf0 & ~(0x10 << (lane))) argument
/linux/drivers/net/ethernet/ti/
H A Dnetcp_xgbepcsr.c148 void __iomem *serdes_regs, int lane) in netcp_xgbe_serdes_lane_config()
182 void __iomem *serdes_regs, int lane) in netcp_xgbe_serdes_lane_enable()
283 void __iomem *sig_detect_reg, int lane) in netcp_xgbe_serdes_reset_cdr()
430 int lane, int cm, int c1, int c2) in netcp_xgbe_serdes_setup_cm_c1_c2()
/linux/drivers/nvdimm/
H A Dbtt.c208 static int btt_log_group_read(struct arena_info *arena, u32 lane, in btt_log_group_read()
329 static int btt_log_read(struct arena_info *arena, u32 lane, in btt_log_read()
363 static int __btt_log_write(struct arena_info *arena, u32 lane, in __btt_log_write()
384 static int btt_flog_write(struct arena_info *arena, u32 lane, u32 sub, in btt_flog_write()
507 static int arena_clear_freelist_error(struct arena_info *arena, u32 lane) in arena_clear_freelist_error()
1198 u32 lane = 0, premap, postmap; in btt_read_pg() local
1310 u32 premap = 0, old_postmap, new_postmap, lane = 0, i; in btt_write_pg() local
/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-errata.c51 int lane; in __cvmx_helper_errata_qlm_disable_2nd_order_cdr() local
/linux/drivers/ata/
H A Dsata_highbank.c259 u8 lane = port_data[sata_port].lane_mapping; in highbank_cphy_disable_overrides() local
270 u8 lane = port_data[sata_port].lane_mapping; in cphy_override_tx_attenuation() local
289 u8 lane = port_data[sata_port].lane_mapping; in cphy_override_rx_mode() local
313 u8 lane = port_data[sata_port].lane_mapping; in highbank_cphy_override_lane() local

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