Searched defs:legacy_surf_level (Results 1 – 11 of 11) sorted by relevance
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/common/ |
H A D | ac_surface.h | 82 struct legacy_surf_level { struct 83 uint64_t offset; 84 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 85 uint32_t dcc_offset; /* relative offset within DCC mip tree */ 86 uint32_t dcc_fast_clear_size; 87 uint32_t dcc_slice_fast_clear_size; 88 unsigned nblk_x:15; 89 unsigned nblk_y:15;
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/dports/lang/clover/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/libosmesa/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/mesa-libs/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/mesa-dri/mesa-21.3.6/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/amd/common/ |
H A D | ac_surface.h | 92 struct legacy_surf_level { struct 93 uint32_t offset_256B; /* divided by 256, the hw can only do 40-bit addresses */ 94 uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */ 95 unsigned nblk_x : 15; 96 unsigned nblk_y : 15;
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