| /open-nvidia-gpu/src/nvidia/arch/nvalloc/unix/x86emu/ |
| H A D | ops2.c | 732 u32 srcval,mask; in x86emuOp2_bts_R() local
747 u16 srcval,mask; in x86emuOp2_bts_R() local
765 u32 srcval,mask; in x86emuOp2_bts_R() local
780 u16 srcval,mask; in x86emuOp2_bts_R() local
798 u32 srcval,mask; in x86emuOp2_bts_R() local
813 u16 srcval,mask; in x86emuOp2_bts_R() local
1977 u32 mask; in x86emuOp2_btX_I() local
2003 u16 mask; in x86emuOp2_btX_I() local
2050 u32 srcval,mask; in x86emuOp2_btc_R() local
2065 u16 srcval,mask; in x86emuOp2_btc_R() local
[all …]
|
| H A D | prim_ops.c | 932 register u32 res, cnt, mask, cf; in rcl_long() local
957 u32 mask, cf, ocf = 0; in rcr_byte() local
1041 u32 mask, cf, ocf = 0; in rcr_word() local
1073 u32 mask, cf, ocf = 0; in rcr_long() local
1105 register unsigned int res, cnt, mask; in rol_byte() local
1154 register unsigned int res, cnt, mask; in rol_word() local
1179 register u32 res, cnt, mask; in rol_long() local
1204 register unsigned int res, cnt, mask; in ror_byte() local
1273 register u32 res, cnt, mask; in ror_long() local
1567 unsigned int cnt, res, cf, mask, sf; in sar_word() local
[all …]
|
| /open-nvidia-gpu/src/common/inc/ |
| H A D | nvCpuIntrinsics.h | 300 static NV_FORCEINLINE int __NV_clz(unsigned int mask) { in __NV_clz()
304 static NV_FORCEINLINE int __NV_ctz(unsigned int mask) { in __NV_ctz()
308 static NV_FORCEINLINE int __NV_clzll(unsigned long long mask) { in __NV_clzll()
312 static NV_FORCEINLINE int __NV_ctzll(unsigned long long mask) { in __NV_ctzll()
329 static NV_FORCEINLINE void _BitScanForward64on32(unsigned int *index, NvU64 mask) in _BitScanForward64on32()
347 static NV_FORCEINLINE void _BitScanReverse64on32(unsigned int *index, NvU64 mask) in _BitScanReverse64on32()
371 unsigned int index, mask; in __NVbsfNext() local
388 unsigned int index, mask; in __NVbsrNext() local
407 NvU64 mask; in __NVbsfNext64() local
425 NvU64 mask; in __NVbsrNext64() local
|
| H A D | nv_speculation_barrier.h | 187 unsigned long mask; in nv_array_index_no_speculate() local
|
| /open-nvidia-gpu/kernel-open/nvidia-uvm/ |
| H A D | uvm_processors.c | 50 void uvm_processor_mask_cache_free(uvm_processor_mask_t *mask) in uvm_processor_mask_cache_free()
56 int uvm_find_closest_node_mask(int src, const nodemask_t *mask) in uvm_find_closest_node_mask()
76 const uvm_processor_mask_t *mask) in uvm_processor_mask_gpu_subset()
91 const uvm_processor_mask_t *mask) in uvm_parent_gpus_from_processor_mask()
|
| H A D | uvm_va_block.h | 1713 static bool uvm_page_mask_test(const uvm_page_mask_t *mask, uvm_page_index_t page_index) in uvm_page_mask_test()
1720 static bool uvm_page_mask_test_and_set(uvm_page_mask_t *mask, uvm_page_index_t page_index) in uvm_page_mask_test_and_set()
1734 static void uvm_page_mask_set(uvm_page_mask_t *mask, uvm_page_index_t page_index) in uvm_page_mask_set()
1741 static void uvm_page_mask_clear(uvm_page_mask_t *mask, uvm_page_index_t page_index) in uvm_page_mask_clear()
1748 static bool uvm_page_mask_region_test(const uvm_page_mask_t *mask, in uvm_page_mask_region_test()
1796 static void uvm_page_mask_zero(uvm_page_mask_t *mask) in uvm_page_mask_zero()
1801 static bool uvm_page_mask_empty(const uvm_page_mask_t *mask) in uvm_page_mask_empty()
1806 static bool uvm_page_mask_full(const uvm_page_mask_t *mask) in uvm_page_mask_full()
1811 static void uvm_page_mask_fill(uvm_page_mask_t *mask) in uvm_page_mask_fill()
1847 static NvU32 uvm_page_mask_weight(const uvm_page_mask_t *mask) in uvm_page_mask_weight()
[all …]
|
| H A D | uvm_turing_fault_buffer.c | 32 NvU32 mask; in clear_replayable_faults_interrupt() local
54 NvU32 mask; in uvm_hal_turing_disable_replayable_faults() local
|
| H A D | uvm_turing_access_counter_buffer.c | 32 NvU32 mask; in clear_access_counter_notifications_interrupt() local
43 NvU32 mask; in uvm_hal_turing_disable_access_counter_notifications() local
|
| H A D | uvm_processors.h | 538 #define for_each_parent_id_in_mask(id, mask) … argument
543 #define for_each_parent_gpu_id_in_mask(gpu_id, mask) … argument
548 #define for_each_id_in_mask(id, mask) \ argument
553 #define for_each_gpu_id_in_mask(gpu_id, mask) \ argument
588 #define for_each_closest_uvm_node(nid, src, mask) … argument
|
| H A D | uvm_global.c | 436 void uvm_global_gpu_retain(const uvm_processor_mask_t *mask) in uvm_global_gpu_retain()
444 void uvm_global_gpu_release(const uvm_processor_mask_t *mask) in uvm_global_gpu_release()
|
| H A D | uvm_volta_access_counter_buffer.c | 38 NvU32 mask; in uvm_hal_volta_enable_access_counter_notifications() local
49 NvU32 mask; in uvm_hal_volta_disable_access_counter_notifications() local
|
| H A D | uvm_va_space.h | 374 uvm_processor_mask_t mask; member
687 static uvm_gpu_t *uvm_processor_mask_find_first_va_space_gpu(const uvm_processor_mask_t *mask, uvm_… in uvm_processor_mask_find_first_va_space_gpu()
713 static uvm_gpu_t *__uvm_processor_mask_find_next_va_space_gpu(const uvm_processor_mask_t *mask, in __uvm_processor_mask_find_next_va_space_gpu()
736 static uvm_gpu_t *uvm_processor_mask_find_next_va_space_gpu(const uvm_processor_mask_t *mask, in uvm_processor_mask_find_next_va_space_gpu()
746 #define for_each_va_space_gpu_in_mask(gpu, va_space, mask) \ argument
778 #define for_each_closest_id(id, mask, src, va_space) \ argument
|
| H A D | uvm_pascal_fault_buffer.c | 45 NvU32 mask; in uvm_hal_pascal_enable_replayable_faults() local
56 NvU32 mask; in uvm_hal_pascal_disable_replayable_faults() local
|
| H A D | uvm_pushbuffer.c | 175 static uvm_pushbuffer_chunk_t *get_chunk_in_mask(uvm_pushbuffer_t *pushbuffer, unsigned long *mask) in get_chunk_in_mask()
209 …ic void set_chunk(uvm_pushbuffer_t *pushbuffer, uvm_pushbuffer_chunk_t *chunk, unsigned long *mask) in set_chunk()
218 … void clear_chunk(uvm_pushbuffer_t *pushbuffer, uvm_pushbuffer_chunk_t *chunk, unsigned long *mask) in clear_chunk()
|
| /open-nvidia-gpu/src/nvidia/src/libraries/nvbitvector/ |
| H A D | nvbitvector.c | 333 NvU64 mask; in bitVectorTestAllSet_IMPL() local
366 NvU64 mask; in bitVectorTestAllCleared_IMPL() local
402 NvU64 mask; in bitVectorTestEqual_IMPL() local
442 NvU64 mask; in bitVectorTestIsSubset_IMPL() local
514 NvU64 mask; in bitVectorAnd_IMPL() local
564 NvU64 mask; in bitVectorOr_IMPL() local
614 NvU64 mask; in bitVectorXor_IMPL() local
660 NvU64 mask; in bitVectorComplement_IMPL() local
727 NvU64 mask; in bitVectorCountTrailingZeros_IMPL() local
765 NvU64 mask; in bitVectorCountLeadingZeros_IMPL() local
[all …]
|
| /open-nvidia-gpu/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/ |
| H A D | regmap.c | 46 #define SETBITS(bits, mask, newVal) ((bits & (~mask)) | (mask & newVal)) argument
203 NvU64 mask = NV_U64_MAX; in _pmaRegmapScanNumaUnevictable() local
649 NvU64 mapIndex, mapOffset, bits, mask, val; in pmaRegmapRead() local
727 NvU64 mask = beginOffs == 0 ? 0 : NV_U64_MAX << (FRAME_TO_U64_SIZE - beginOffs); in _scanContiguousSearchLoop() local
827 NvU64 mask = beginOffs == FRAME_TO_U64_MASK ? 0 : NV_U64_MAX >> (1llu + beginOffs); in _scanContiguousSearchLoopReverse() local
940 NvU64 mask = beginOffs == 0 ? 0 : NV_U64_MAX << (FRAME_TO_U64_SIZE - beginOffs); in _scanDiscontiguousSearchLoop() local
988 NvU64 mask = beginOffs == 0 ? 0 : NV_U64_MAX << (FRAME_TO_U64_SIZE - beginOffs); in _scanDiscontiguousSearchLoop() local
1095 NvU64 mask = beginOffs == FRAME_TO_U64_MASK ? 0 : NV_U64_MAX >> (1llu + beginOffs); in _scanDiscontiguousSearchLoopReverse() local
1146 NvU64 mask = beginOffs == FRAME_TO_U64_MASK ? 0 : NV_U64_MAX >> (1llu + beginOffs); in _scanDiscontiguousSearchLoopReverse() local
|
| /open-nvidia-gpu/src/nvidia/src/libraries/mmu/ |
| H A D | mmu_fmt.c | 30 NvU64 mask = 0; in mmuFmtAllPageSizes() local
46 NvU64 mask = mmuFmtLevelPageSize(pLevel); in mmuFmtAllLevelCoverages() local
|
| /open-nvidia-gpu/src/nvidia/src/libraries/containers/ |
| H A D | ringbuf.c | 127 NvU64 mask = RINGBUF_ARRAY_MASK(pBase); in ringbufPeekN_IMPL() local
203 NvU64 mask = RINGBUF_ARRAY_MASK(pBase); in ringbufAppendN_IMPL() local
|
| /open-nvidia-gpu/src/nvidia/src/kernel/virtualization/ |
| H A D | common_vgpu_mgr.c | 138 NvU64 mask = 0; in vgpuMgrReserveSystemChannelIDs() local
241 NvU64 mask = 0; in vgpuMgrFreeSystemChannelIDs() local
|
| /open-nvidia-gpu/src/nvidia/src/kernel/platform/sli/ |
| H A D | sli.c | 40 static NvU32 rmSliNextMask(NvU32 mask) in rmSliNextMask()
71 NvU32 mask; in rmSliSearchForSliCombination() local
|
| /open-nvidia-gpu/src/nvidia/src/kernel/gpu/intr/arch/turing/ |
| H A D | intr_tu102.c | 489 NvU64 mask = NV_U64_MAX; in _intrEnableStall_TU102() local
731 NvU64 mask = 0; in intrGetUvmSharedLeafEnDisableMask_TU102() local
984 NvU64 mask = 0; in intrRetriggerTopLevel_TU102() local
1310 NvU64 mask = intrGetIntrTopCategoryMask(pIntr, in intrGetIntrTopNonStallMask_TU102() local
|
| /open-nvidia-gpu/src/nvidia-modeset/include/ |
| H A D | nvkms-dma.h | 147 static inline void nvPushEvoSubDevMask(NVDevEvoPtr pDevEvo, NvU32 mask) { in nvPushEvoSubDevMask()
157 NvU32 mask = nvDispSubDevMaskEvo(pDispEvo); in nvPushEvoSubDevMaskDisp() local
|
| /open-nvidia-gpu/src/nvidia/src/kernel/rmapi/ |
| H A D | rmapi.c | 246 NvU32 mask = 0; in _rmapiRefGpuAccessNeeded() local
292 NvU32 mask; in rmapiPrologue() local
346 NvU32 mask; in rmapiEpilogue() local
|
| /open-nvidia-gpu/src/nvidia/src/kernel/gpu/intr/arch/ampere/ |
| H A D | intr_ga100.c | 61 NvU64 mask = 0; in intrGetUvmSharedLeafEnDisableMask_GA100() local
|
| /open-nvidia-gpu/src/nvidia/arch/nvalloc/common/inc/ |
| H A D | rmgspseq.h | 114 NvU32 mask; member
122 NvU32 mask; member
|