1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2015 Aurelien Jacobs <aurel@gnuage.org>
5  *
6  * This program is free software: you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation, either version 3 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef LIBSIGROK_HARDWARE_MAYNUO_M97_PROTOCOL_H
21 #define LIBSIGROK_HARDWARE_MAYNUO_M97_PROTOCOL_H
22 
23 #include <stdint.h>
24 #include <libsigrok/libsigrok.h>
25 #include "libsigrok-internal.h"
26 
27 #define LOG_PREFIX "maynuo-m97"
28 
29 struct maynuo_m97_model {
30 	unsigned int id;
31 	const char *name;
32 	unsigned int max_current;
33 	unsigned int max_voltage;
34 	unsigned int max_power;
35 };
36 
37 struct dev_context {
38 	const struct maynuo_m97_model *model;
39 	struct sr_sw_limits limits;
40 	int expecting_registers;
41 };
42 
43 enum maynuo_m97_coil {
44 	PC1        = 0x0500,
45 	PC2        = 0X0501,
46 	TRIG       = 0x0502,
47 	REMOTE     = 0x0503,
48 	ISTATE     = 0x0510,
49 	TRACK      = 0x0511,
50 	MEMORY     = 0x0512,
51 	VOICEEN    = 0x0513,
52 	CONNECT    = 0x0514,
53 	ATEST      = 0x0515,
54 	ATESTUN    = 0x0516,
55 	ATESTPASS  = 0x0517,
56 	IOVER      = 0x0520,
57 	UOVER      = 0x0521,
58 	POVER      = 0x0522,
59 	HEAT       = 0x0523,
60 	REVERSE    = 0x0524,
61 	UNREG      = 0x0525,
62 	ERREP      = 0x0526,
63 	ERRCAL     = 0x0527,
64 };
65 
66 enum maynuo_m97_register {
67 	CMD        = 0x0A00,
68 	IFIX       = 0x0A01,
69 	UFIX       = 0x0A03,
70 	PFIX       = 0x0A05,
71 	RFIX       = 0x0A07,
72 	TMCCS      = 0x0A09,
73 	TMCVS      = 0x0A0B,
74 	UCCONSET   = 0x0A0D,
75 	UCCOFFSET  = 0x0A0F,
76 	UCVONSET   = 0x0A11,
77 	UCVOFFSET  = 0x0A13,
78 	UCPONSET   = 0x0A15,
79 	UCPOFFSET  = 0x0A17,
80 	UCRONSET   = 0x0A19,
81 	UCROFFSET  = 0x0A1B,
82 	UCCCV      = 0x0A1D,
83 	UCRCV      = 0x0A1F,
84 	IA         = 0x0A21,
85 	IB         = 0x0A23,
86 	TMAWD      = 0x0A25,
87 	TMBWD      = 0x0A27,
88 	TMTRANSRIS = 0x0A29,
89 	TMTRANSFAL = 0x0A2B,
90 	MODETRAN   = 0x0A2D,
91 	UBATTEND   = 0x0A2E,
92 	BATT       = 0x0A30,
93 	SERLIST    = 0x0A32,
94 	SERATEST   = 0x0A33,
95 	IMAX       = 0x0A34,
96 	UMAX       = 0x0A36,
97 	PMAX       = 0x0A38,
98 	ILCAL      = 0x0A3A,
99 	IHCAL      = 0x0A3C,
100 	ULCAL      = 0x0A3E,
101 	UHCAL      = 0x0A40,
102 	TAGSCAL    = 0x0A42,
103 	U          = 0x0B00,
104 	I          = 0x0B02,
105 	SETMODE    = 0x0B04,
106 	INPUTMODE  = 0x0B05,
107 	MODEL      = 0x0B06,
108 	EDITION    = 0x0B07,
109 };
110 
111 enum maynuo_m97_mode {
112 	CC            =  1,
113 	CV            =  2,
114 	CW            =  3,
115 	CR            =  4,
116 	CC_SOFT_START = 20,
117 	DYNAMIC       = 25,
118 	SHORT_CIRCUIT = 26,
119 	LIST          = 27,
120 	CC_L_AND_UL   = 30,
121 	CV_L_AND_UL   = 31,
122 	CW_L_AND_UL   = 32,
123 	CR_L_AND_UL   = 33,
124 	CC_TO_CV      = 34,
125 	CR_TO_CV      = 36,
126 	BATTERY_TEST  = 38,
127 	CV_SOFT_START = 39,
128 	SYSTEM_PARAM  = 41,
129 	INPUT_ON      = 42,
130 	INPUT_OFF     = 43,
131 };
132 
133 SR_PRIV int maynuo_m97_get_bit(struct sr_modbus_dev_inst *modbus,
134 		enum maynuo_m97_coil address, int *value);
135 SR_PRIV int maynuo_m97_set_bit(struct sr_modbus_dev_inst *modbus,
136 		enum maynuo_m97_coil address, int value);
137 SR_PRIV int maynuo_m97_get_float(struct sr_modbus_dev_inst *modbus,
138 		enum maynuo_m97_register address, float *value);
139 SR_PRIV int maynuo_m97_set_float(struct sr_modbus_dev_inst *modbus,
140 		enum maynuo_m97_register address, float value);
141 
142 SR_PRIV int maynuo_m97_get_mode(struct sr_modbus_dev_inst *modbus,
143 		enum maynuo_m97_mode *mode);
144 SR_PRIV int maynuo_m97_set_mode(struct sr_modbus_dev_inst *modbus,
145 		enum maynuo_m97_mode mode);
146 SR_PRIV int maynuo_m97_set_input(struct sr_modbus_dev_inst *modbus, int enable);
147 SR_PRIV int maynuo_m97_get_model_version(struct sr_modbus_dev_inst *modbus,
148 		uint16_t *model, uint16_t *version);
149 
150 SR_PRIV const char *maynuo_m97_mode_to_str(enum maynuo_m97_mode mode);
151 
152 SR_PRIV int maynuo_m97_capture_start(const struct sr_dev_inst *sdi);
153 SR_PRIV int maynuo_m97_receive_data(int fd, int revents, void *cb_data);
154 
155 #endif
156