1 /* $NetBSD: mcpcia.c,v 1.35 2021/08/07 16:18:41 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1998 by Matthew Jacob
35 * NASA AMES Research Center.
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice immediately at the beginning of the file, without modification,
43 * this list of conditions, and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
47 * 3. The name of the author may not be used to endorse or promote products
48 * derived from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
54 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
56 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
57 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
58 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
59 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
60 * SUCH DAMAGE.
61 */
62
63 /*
64 * MCPCIA mcbus to PCI bus adapter
65 * found on AlphaServer 4100 systems.
66 */
67
68 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
69
70 __KERNEL_RCSID(0, "$NetBSD: mcpcia.c,v 1.35 2021/08/07 16:18:41 thorpej Exp $");
71
72 #include <sys/param.h>
73 #include <sys/systm.h>
74 #include <sys/device.h>
75 #include <sys/kmem.h>
76
77 #include <machine/autoconf.h>
78 #include <machine/rpb.h>
79 #include <machine/sysarch.h>
80
81 #include <alpha/mcbus/mcbusreg.h>
82 #include <alpha/mcbus/mcbusvar.h>
83 #include <alpha/pci/mcpciareg.h>
84 #include <alpha/pci/mcpciavar.h>
85
86 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
87 #define MCPCIA_SYSBASE(mc) \
88 ((((unsigned long) (mc)->cc_gid) << MCBUS_GID_SHIFT) | \
89 (((unsigned long) (mc)->cc_mid) << MCBUS_MID_SHIFT) | \
90 (MCBUS_IOSPACE))
91
92 #define MCPCIA_PROBE(mid, gid) \
93 badaddr((void *)KV(((((unsigned long) gid) << MCBUS_GID_SHIFT) | \
94 (((unsigned long) mid) << MCBUS_MID_SHIFT) | \
95 (MCBUS_IOSPACE) | MCPCIA_PCI_BRIDGE | _MCPCIA_PCI_REV)), \
96 sizeof(uint32_t))
97
98 static int mcpciamatch(device_t, cfdata_t, void *);
99 static void mcpciaattach(device_t, device_t, void *);
100
101 CFATTACH_DECL_NEW(mcpcia, sizeof(struct mcpcia_softc),
102 mcpciamatch, mcpciaattach, NULL, NULL);
103
104 void mcpcia_init0(struct mcpcia_config *, int);
105
106 /*
107 * We have one statically-allocated mcpcia_config structure; this is
108 * the one used for the console (which, coincidentally, is the only
109 * MCPCIA with an EISA adapter attached to it).
110 */
111 struct mcpcia_config mcpcia_console_configuration;
112
113 static int mcpcia_bus_get_window(int, int,
114 struct alpha_bus_space_translation *abst);
115
116 static int
mcpciamatch(device_t parent,cfdata_t cf,void * aux)117 mcpciamatch(device_t parent, cfdata_t cf, void *aux)
118 {
119 struct mcbus_dev_attach_args *ma = aux;
120 if (ma->ma_type == MCBUS_TYPE_PCI)
121 return (1);
122 return (0);
123 }
124
125 static void
mcpciaattach(device_t parent,device_t self,void * aux)126 mcpciaattach(device_t parent, device_t self, void *aux)
127 {
128 struct mcbus_dev_attach_args *ma = aux;
129 struct mcpcia_softc *mcp = device_private(self);
130 struct mcpcia_config *ccp;
131 struct pcibus_attach_args pba;
132 uint32_t ctl;
133
134 /*
135 * Make sure this MCPCIA exists...
136 */
137 if (MCPCIA_PROBE(ma->ma_mid, ma->ma_gid)) {
138 mcp->mcpcia_cc = NULL;
139 printf(" (not present)\n");
140 return;
141 }
142 printf("\n");
143
144 /*
145 * Determine if we're the console's MCPCIA.
146 */
147 if (ma->ma_mid == mcpcia_console_configuration.cc_mid &&
148 ma->ma_gid == mcpcia_console_configuration.cc_gid)
149 ccp = &mcpcia_console_configuration;
150 else {
151 ccp = kmem_zalloc(sizeof(struct mcpcia_config), KM_SLEEP);
152 ccp->cc_mid = ma->ma_mid;
153 ccp->cc_gid = ma->ma_gid;
154 }
155
156 mcp->mcpcia_dev = self;
157 mcp->mcpcia_cc = ccp;
158 ccp->cc_sc = mcp;
159
160 /* This initializes cc_sysbase so we can do register access. */
161 mcpcia_init0(ccp, 1);
162
163 ctl = REGVAL(MCPCIA_PCI_REV(ccp));
164 aprint_normal_dev(self,
165 "Horse Revision %d, %s Handed Saddle Revision %d,"
166 " CAP Revision %d\n", HORSE_REV(ctl),
167 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl),
168 CAP_REV(ctl));
169
170 mcpcia_dma_init(ccp);
171
172 /*
173 * Set up interrupts
174 */
175 alpha_pci_intr_init(ccp, &ccp->cc_iot, &ccp->cc_memt, &ccp->cc_pc);
176
177 /*
178 * Attach PCI bus
179 */
180 pba.pba_iot = &ccp->cc_iot;
181 pba.pba_memt = &ccp->cc_memt;
182 pba.pba_dmat = /* start with direct, may change... */
183 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI);
184 pba.pba_dmat64 = NULL;
185 pba.pba_pc = &ccp->cc_pc;
186 pba.pba_bus = 0;
187 pba.pba_bridgetag = NULL;
188 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
189 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
190 config_found(self, &pba, pcibusprint, CFARGS_NONE);
191
192 /*
193 * Clear any errors that may have occurred during the probe
194 * sequence.
195 */
196 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF;
197 alpha_mb();
198 }
199
200 void
mcpcia_init(void)201 mcpcia_init(void)
202 {
203 struct mcpcia_config *ccp = &mcpcia_console_configuration;
204 int i;
205
206 /*
207 * Look for all of the MCPCIAs on the system. One of them
208 * will have an EISA attached to it. This MCPCIA is the
209 * only one that can be used for the console. Once we find
210 * that one, initialize it.
211 */
212
213 for (i = 0; i < MCPCIA_PER_MCBUS; i++) {
214 ccp->cc_mid = mcbus_mcpcia_probe_order[i];
215 /*
216 * XXX If we ever support more than one MCBUS, we'll
217 * XXX have to probe for them, and map them to unit
218 * XXX numbers.
219 */
220 ccp->cc_gid = MCBUS_GID_FROM_INSTANCE(0);
221 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp);
222
223 if (badaddr((void *)ALPHA_PHYS_TO_K0SEG(MCPCIA_PCI_REV(ccp)),
224 sizeof(uint32_t)))
225 continue;
226
227 if (EISA_PRESENT(REGVAL(MCPCIA_PCI_REV(ccp)))) {
228 mcpcia_init0(ccp, 0);
229
230 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 2;
231 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3;
232
233 alpha_bus_get_window = mcpcia_bus_get_window;
234 return;
235 }
236 }
237
238 panic("mcpcia_init: unable to find EISA bus");
239 }
240
241 void
mcpcia_init0(struct mcpcia_config * ccp,int mallocsafe)242 mcpcia_init0(struct mcpcia_config *ccp, int mallocsafe)
243 {
244 uint32_t ctl;
245
246 if (ccp->cc_initted == 0) {
247 /* don't do these twice since they set up extents */
248 mcpcia_bus_io_init(&ccp->cc_iot, ccp);
249 mcpcia_bus_mem_init(&ccp->cc_memt, ccp);
250 }
251 ccp->cc_mallocsafe = mallocsafe;
252
253 mcpcia_pci_init(&ccp->cc_pc, ccp);
254
255 /*
256 * Establish a precalculated base for convenience's sake.
257 */
258 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp);
259
260 /*
261 * Disable interrupts and clear errors prior to probing
262 */
263 REGVAL(MCPCIA_INT_MASK0(ccp)) = 0;
264 REGVAL(MCPCIA_INT_MASK1(ccp)) = 0;
265 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF;
266 alpha_mb();
267
268 if (ccp == &mcpcia_console_configuration) {
269 /*
270 * Use this opportunity to also find out the MID and CPU
271 * type of the currently running CPU (that's us, billybob....)
272 */
273 ctl = REGVAL(MCPCIA_WHOAMI(ccp));
274 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl);
275 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 &&
276 mcbus_primary.mcbus_valid == 0) {
277 mcbus_primary.mcbus_bcache =
278 MCBUS_CPU_INFO(ctl) & CPU_BCacheMask;
279 mcbus_primary.mcbus_valid = 1;
280 }
281 alpha_mb();
282 }
283
284 ccp->cc_initted = 1;
285 }
286
287 #ifdef TEST_PROBE_DEATH
288 static void
die_heathen_dog(void * arg)289 die_heathen_dog(void *arg)
290 {
291 struct mcpcia_config *ccp = arg;
292
293 /* this causes a fatal machine check (0x670) */
294 REGVAL(MCPCIA_CAP_DIAG(ccp)) |= CAP_DIAG_MC_ADRPE;
295 }
296 #endif
297
298 void
mcpcia_config_cleanup(void)299 mcpcia_config_cleanup(void)
300 {
301 volatile uint32_t ctl;
302 struct mcpcia_softc *mcp;
303 struct mcpcia_config *ccp;
304 int i;
305 extern struct cfdriver mcpcia_cd;
306
307 /*
308 * Turn on Hard, Soft error interrupts. Maybe i2c too.
309 */
310 for (i = 0; i < mcpcia_cd.cd_ndevs; i++) {
311 if ((mcp = device_lookup_private(&mcpcia_cd, i)) == NULL)
312 continue;
313
314 ccp = mcp->mcpcia_cc;
315 if (ccp == NULL)
316 continue;
317
318 ctl = REGVAL(MCPCIA_INT_MASK0(ccp));
319 ctl |= MCPCIA_GEN_IENABL;
320 REGVAL(MCPCIA_INT_MASK0(ccp)) = ctl;
321 alpha_mb();
322
323 /* force stall while write completes */
324 ctl = REGVAL(MCPCIA_INT_MASK0(ccp));
325 }
326 #ifdef TEST_PROBE_DEATH
327 (void) timeout (die_heathen_dog, &mcpcia_console_configuration,
328 30 * hz);
329 #endif
330 }
331
332 static int
mcpcia_bus_get_window(int type,int window,struct alpha_bus_space_translation * abst)333 mcpcia_bus_get_window(int type, int window,
334 struct alpha_bus_space_translation *abst)
335 {
336 struct mcpcia_config *ccp = &mcpcia_console_configuration;
337 bus_space_tag_t st;
338
339 switch (type) {
340 case ALPHA_BUS_TYPE_PCI_IO:
341 st = &ccp->cc_iot;
342 break;
343
344 case ALPHA_BUS_TYPE_PCI_MEM:
345 st = &ccp->cc_memt;
346 break;
347
348 default:
349 panic("mcpcia_bus_get_window");
350 }
351
352 return (alpha_bus_space_get_window(st, window, abst));
353 }
354