1 #ifndef _G_MEM_MGR_NVOC_H_
2 #define _G_MEM_MGR_NVOC_H_
3 #include "nvoc/runtime.h"
4
5 #ifdef __cplusplus
6 extern "C" {
7 #endif
8
9 /*
10 * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
11 * SPDX-License-Identifier: MIT
12 *
13 * Permission is hereby granted, free of charge, to any person obtaining a
14 * copy of this software and associated documentation files (the "Software"),
15 * to deal in the Software without restriction, including without limitation
16 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17 * and/or sell copies of the Software, and to permit persons to whom the
18 * Software is furnished to do so, subject to the following conditions:
19 *
20 * The above copyright notice and this permission notice shall be included in
21 * all copies or substantial portions of the Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
29 * DEALINGS IN THE SOFTWARE.
30 */
31
32 #include "g_mem_mgr_nvoc.h"
33
34 #ifndef MEM_MGR_H
35 #define MEM_MGR_H
36
37 #include "core/core.h"
38 #include "gpu/eng_state.h"
39
40 #include "gpu/mem_mgr/fbsr.h"
41 #include "gpu/gpu.h"
42
43 #include "mem_mgr/mem.h"
44
45 #include "mem_mgr/mem_list.h"
46
47 #include "gpu/mem_mgr/virt_mem_allocator_common.h"
48 #include "containers/map.h"
49 #include "gpu/mem_mgr/heap_base.h"
50 #include "mem_mgr/vaspace.h"
51
52 #include "gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h"
53
54 struct CeUtils;
55
56 #ifndef __NVOC_CLASS_CeUtils_TYPEDEF__
57 #define __NVOC_CLASS_CeUtils_TYPEDEF__
58 typedef struct CeUtils CeUtils;
59 #endif /* __NVOC_CLASS_CeUtils_TYPEDEF__ */
60
61 #ifndef __nvoc_class_id_CeUtils
62 #define __nvoc_class_id_CeUtils 0x8b8bae
63 #endif /* __nvoc_class_id_CeUtils */
64
65
66
67 typedef volatile struct _cl906f_tag1 Nv906fControl;
68 typedef struct KERNEL_MIG_GPU_INSTANCE KERNEL_MIG_GPU_INSTANCE;
69
70 typedef struct
71 {
72 MEMORY_DESCRIPTOR *pMemDesc;
73 NvU64 offset;
74 } TRANSFER_SURFACE;
75
76 // Memory transfer engine types.
77 typedef enum
78 {
79 TRANSFER_TYPE_PROCESSOR = 0, // CPU/GSP/DPU depending on execution context
80 TRANSFER_TYPE_GSP_DMA, // Dma engine internal to GSP
81 TRANSFER_TYPE_CE, // Copy Engine using CeUtils channel
82 TRANSFER_TYPE_CE_PRI, // Copy Engine using PRIs
83 TRANSFER_TYPE_BAR0, // Copy using BAR0 PRAMIN
84 } TRANSFER_TYPE;
85
86 #define TRANSFER_FLAGS_NONE 0
87 #define TRANSFER_FLAGS_DEFER_FLUSH NVBIT32(0) // Applicable only for write operations
88 #define TRANSFER_FLAGS_SHADOW_ALLOC NVBIT32(1) // Applicable only for non-PROCESSOR transfers
89 #define TRANSFER_FLAGS_SHADOW_INIT_MEM NVBIT32(2) // Applicable only for non-PROCESSOR transfers
90 #define TRANSFER_FLAGS_PERSISTENT_CPU_MAPPING NVBIT32(3) // Require long lived PROCESSOR mapping
91 #define TRANSFER_FLAGS_DESTROY_MAPPING NVBIT32(4) // Destroy any cached mappings when complete
92 #define TRANSFER_FLAGS_USE_BAR1 NVBIT32(5) // Use only BAR1 for PROCESSOR transfers
93 #define TRANSFER_FLAGS_PREFER_CE NVBIT32(6) // Use CE if possible (BAR0 on simulation for perf)
94 #define TRANSFER_FLAGS_CE_PRI_DEFER_FLUSH NVBIT32(7) // Defer CE flush; only affects PRI CE operations
95
96 // Protection flags: at most 1 may be set, none means READ_WRITE by default
97 #define TRANSFER_FLAGS_MAP_PROTECT_READABLE NVBIT32(8) // Transfer is only reading data
98 #define TRANSFER_FLAGS_MAP_PROTECT_WRITEABLE NVBIT32(9) // Transfer is only writing data
99
100 #define TRANSFER_FLAGS_PREFER_PROCESSOR NVBIT32(10) // Use BAR1/2 if possible
101
102 typedef struct
103 {
104 NvU32 bar1Size;
105 NvU32 bar1AvailSize;
106 NvU32 bankSwizzleAlignment;
107 NvU32 bar1MaxContigAvailSize;
108 } GETBAR1INFO, *PGETBAR1INFO;
109
110 //
111 // RM Default PTE kind
112 // Bug #2242255, introducing the RM Default kind to allow sharing memory between
113 // different architectures especially between Turing+ and Pre Turing chips
114 //
115 #define RM_DEFAULT_PTE_KIND 0x100
116
117 typedef enum
118 {
119 FB_IS_KIND_Z, // Kind is a Z buffer
120 FB_IS_KIND_ZBC, // Zero bandwidth clears
121 FB_IS_KIND_ZBC_ALLOWS_1, // ZBC with 1 bit of tag
122 FB_IS_KIND_ZBC_ALLOWS_2, // ZBC with 2 bits of tag
123 FB_IS_KIND_ZBC_ALLOWS_4, // ZBC with 4 bits of tag
124 FB_IS_KIND_COMPRESSIBLE, // Any compressible kind
125 FB_IS_KIND_COMPRESSIBLE_1, // Compressible with 1 comp tag bit
126 FB_IS_KIND_COMPRESSIBLE_2, // Compressible with 2 comp tag bits
127 FB_IS_KIND_COMPRESSIBLE_4, // Compressible with 4 comp tag bits
128 FB_IS_KIND_SUPPORTED, // Kind is supported
129 FB_IS_KIND_DISALLOW_PLC, // Kind Disallows PLC
130 } FB_IS_KIND_OP;
131
132 // Surface compression parameters
133 typedef struct COMPR_INFO
134 {
135 // Surface kind; if not compressed, following parameters are ignored
136 NvU32 kind;
137
138 // Compression page shift; 0 if kind is uncompressed
139 NvU32 compPageShift;
140
141 //
142 // Are comptags are determined per-page by PA?
143 // If set, following parameters are ignored
144 //
145 NvBool bPhysBasedComptags;
146
147 // see GMMU_COMPR_INFO
148 NvU32 compPageIndexLo;
149 NvU32 compPageIndexHi;
150 NvU32 compTagLineMin;
151 NvU32 compTagLineMultiplier;
152 } COMPR_INFO;
153
154 //
155 // Individual entry for logging Fb reserved use-cases
156 //
157 typedef struct NV_FB_RSVD_BLOCK_LOG_ENTRY
158 {
159 // Owner tag associated with reservation block
160 NvU32 ownerId;
161
162 // Size of the memory reserved
163 NvU64 rsvdSize;
164 } NV_FB_RSVD_BLOCK_LOG_ENTRY;
165
166 // Total number of FB internal reservation enries
167 #define NV_FB_RSVD_BLOCK_LOG_ENTRY_MAX 10U
168
169 //
170 // Structure for logging Fb reserved use-cases
171 //
172 typedef struct NV_FB_RSVD_BLOCK_LOG_INFO
173 {
174 // Counter for logging entries
175 NvU32 counter;
176
177 // List of all reserved entries
178 NV_FB_RSVD_BLOCK_LOG_ENTRY rsvdBlockList[NV_FB_RSVD_BLOCK_LOG_ENTRY_MAX];
179 } NV_FB_RSVD_BLOCK_LOG_INFO;
180
181 //
182 // Macro for initializing reserved block log data
183 //
184 #define NV_FB_RSVD_BLOCK_LOG_INIT(pMem) \
185 { \
186 ((pMem)->rsvdBlockInfo).counter = 0; \
187 for (NvU32 i = 0; i < NV_FB_RSVD_BLOCK_LOG_ENTRY_MAX; i++) \
188 { \
189 ((pMem)->rsvdBlockInfo).rsvdBlockList[i].ownerId = 0; \
190 ((pMem)->rsvdBlockInfo).rsvdBlockList[i].rsvdSize = 0; \
191 } \
192 }
193
194 //
195 // Macro for adding new reserved block entry to the list
196 // If unable to log, marks the status as NV_ERR_NO_MEMORY otherwise keeps it unchanged
197 //
198 #define NV_FB_RSVD_BLOCK_LOG_ENTRY_ADD(status, pMem, tag, size) \
199 { \
200 if(((pMem)->rsvdBlockInfo).counter < NV_FB_RSVD_BLOCK_LOG_ENTRY_MAX) \
201 { \
202 ((pMem)->rsvdBlockInfo).rsvdBlockList[((pMem)->rsvdBlockInfo).counter].ownerId = (tag); \
203 ((pMem)->rsvdBlockInfo).rsvdBlockList[((pMem)->rsvdBlockInfo).counter].rsvdSize = (size); \
204 (((pMem)->rsvdBlockInfo).counter)++; \
205 } \
206 else \
207 { \
208 status = NV_ERR_NO_MEMORY; \
209 } \
210 }
211
212 //
213 // Fixed Channel Properties for Memutils Object
214 //
215
216 typedef NV_STATUS FbScrubCallback(OBJGPU *);
217
218 #define BLOCK_INDEX_FROM_ADDR(addr,size) ((NvU32)((addr) >> size))
219 #define BLOCK_ADDR_FROM_INDEX(idx,size) (((NvU64)(idx)) << size)
220
221 #define MEMUTILS_SIZE_PER_BLOCK_INBYTES (0x68)
222 #define MEMUTILS_TOTAL_SIZE_PER_BLOCK_INBYTES (0x60) //(COPY + PB SEMA)
223 #define MEMUTILS_TD_BLOCKS_PER_CHUNK 0x40
224
225 #define BLOCK_INDEX_FROM_ADDR(addr,size) ((NvU32)((addr) >> size))
226 #define BLOCK_ADDR_FROM_INDEX(idx,size) (((NvU64)(idx)) << size)
227
228 #define MEMUTILS_NUM_PAYLOAD_SEMAPHORES (2)
229 #define MEMUTILS_NUM_GPFIFIO_ENTRIES (32)
230 // PB size should be a multiple of chunk size
231 #define MEMUTILS_CHANNEL_PB_SIZE (0x10 * MEMUTILS_SIZE_PER_BLOCK_INBYTES * \
232 MEMUTILS_TD_BLOCKS_PER_CHUNK)
233 #define MEMUTILS_CHANNEL_SEMAPHORE_SIZE (4 * MEMUTILS_NUM_PAYLOAD_SEMAPHORES)
234 #define MEMUTILS_CHANNEL_NOTIFIER_SIZE (sizeof(NvNotification) * 1)
235
236 // offset and line length should be a multiple of 4KB
237 #define MEMUTIL_SCRUB_OFFSET_ALIGNMENT (4 * 1024)
238 #define MEMUTIL_SCRUB_LINE_LENGTH_ALIGNMENT (4 * 1024)
239
240 typedef enum {
241 CE_SCRUBBER_CHANNEL,
242 FAST_SCRUBBER_CHANNEL,
243 COPY_CHANNEL,
244 SWL_SCRUBBER_CHANNEL,
245 MAX_CHANNEL_TYPE
246 } CHANNEL_KIND;
247
248 // This will be moved to a channel object next
249 typedef struct OBJCHANNEL
250 {
251 NvHandle deviceId; // Device Handle
252 NvHandle physMemId; // Memory Handle
253 NvHandle channelId; // Channel Handle
254 NvHandle subdeviceId; // Subdevice Handle
255 NvHandle errNotifierIdVirt;
256 NvHandle errNotifierIdPhys;
257 NvHandle engineObjectId;
258 NvHandle eventId;
259 NvHandle pushBufferId;
260 NvHandle bitMapSemPhysId;
261 NvHandle bitMapSemVirtId;
262 NvHandle hVASpaceId; // VASpace handle, when scrubber in virtual mode
263 NvHandle hFbAlias; // Used only for virtual channels
264 NvHandle hFbAliasVA;
265 // to be moved later
266
267 NvU32 channelSize;
268 NvU32 channelNumGpFifioEntries;
269 NvU32 channelPbSize;
270 NvU32 channelNotifierSize;
271 NvU32 methodSizePerBlock;
272 NvU32 semaOffset;
273 NvU32 finishPayloadOffset;
274 NvU32 authTagBufSemaOffset;
275 NvU32 finishPayload;
276 NvBool isChannelSynchronized;
277 NvBool isProgressChecked;
278 //
279 // RM internal channels are created as privileged channels (physical address access) by default
280 // For MMU Bug: 2739505, we need to switch to use channels in non-privileged mode.
281 //
282 NvBool bUseVasForCeCopy; // set to NV_TRUE, when scrubber operates in virtual address
283 struct RsClient *pRsClient;
284 struct OBJVASPACE *pVAS;
285 NvU32 engineType;
286 NvU64 startFbOffset;
287 NvU64 fbSize;
288 NvU64 fbAliasVA;
289 NvU64 vaStartOffset;
290 // to be moved to a separate object later
291
292 NvU32 *pBlockPendingState;
293 NvU32 *pBlockDoneState;
294 NvU32 blockCount;
295 NvHandle hClient;
296 NvBool bClientAllocated;
297 NvU64 pbGpuVA;
298 NvU64 pbGpuBitMapVA;
299 NvU64 pbGpuNotifierVA;
300 MEMORY_DESCRIPTOR *pUserdMemdesc;
301 MEMORY_DESCRIPTOR *pChannelBufferMemdesc;
302 MEMORY_DESCRIPTOR *pErrNotifierMemdesc;
303 NvU8 *pbCpuVA;
304 NvU8 *pbBitMapVA;
305 Nv906fControl *pControlGPFifo;
306 NvU32 classEngineID;
307 NVOS10_EVENT_KERNEL_CALLBACK_EX callback;
308 NvU32 state;
309 NvU32 hTdCopyClass;
310 NvU32 sec2Class;
311 NvU32 minBlockSize;
312 NvU32 maxBlockSize;
313 NvU32 channelPutOffset;
314 NvU8 blockShift;
315 NvU32 lastPayloadPushed;
316 NvBool isChannelActive;
317 NvU32 workSubmitToken;
318 //
319 // Work submit token read from notifier memory.
320 //
321 NvNotification *pTokenFromNotifier;
322 NvU32 lastSubmittedEntry;
323 NvHandle lastAllocatedHandle;
324 CHANNEL_KIND type;
325
326 // Used for Volta+
327 NvHandle doorbellRegionHandle;
328 NvU8 *pDoorbellRegion;
329 NvU32 *pDoorbellRegisterOffset;
330 NvBool bUseDoorbellRegister;
331 NvHandle hUserD;
332 NvBool bClientUserd;
333
334 OBJGPU *pGpu;
335 NvU32 ceId;
336
337 // Used by Partition Scrubber
338 KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance;
339 NvHandle hPartitionRef;
340
341 NvBool bSecure;
342
343 } OBJCHANNEL, *POBJCHANNEL;
344
345 #define NV_METHOD(SubCh, Method, Num) \
346 (DRF_DEF(906F, _DMA_INCR, _OPCODE, _VALUE) | \
347 DRF_NUM(906F, _DMA_INCR, _COUNT, Num) | \
348 DRF_NUM(906F, _DMA_INCR, _SUBCHANNEL, SubCh) | \
349 DRF_NUM(906F, _DMA_INCR, _ADDRESS, (Method) >> 2))
350
351 #define PUSH_DATA(Data) MEM_WR32(ptr++, (Data))
352
353 #define PUSH_PAIR(SubCh, Method, Data) \
354 do \
355 { \
356 PUSH_DATA(NV_METHOD(SubCh, (Method), 1)); \
357 PUSH_DATA((Data)); \
358 } while (0)
359
360 //-----------------------------------------------------------------------------
361
362 typedef struct
363 {
364 NvU32 lastSubmittedBlock;
365 NvBool isTopDownScrubber;
366 NvBool isActive;
367 NvU32 scrubberState;
368 NvU32 currentFbRegion;
369 NvU32 startBlock;
370 NvU32 endBlock;
371 NvU32 *pPendingBitMap;
372 NvU32 *pDoneBitMap;
373 NvU32 blockCount;
374 struct OBJCE *pCe;
375 NvBool bCeInUse;
376 OBJCHANNEL tdHeapState;
377 OBJCHANNEL allocationScrubberState;
378 } OBJSCRUB, *POBJSCRUB;
379
380 typedef struct
381 {
382 NvU64 base; // Base/start address of the region
383 NvU64 limit; // Last/end address of region
384 NvU64 rsvdSize; // Memory RM may be required to allocate in this region
385 NvBool bRsvdRegion; // Reserved region -- not publicly usable
386 NvU32 performance; // Relative performance. Higher is faster
387 NvBool bSupportCompressed; // Support compressed kinds
388 NvBool bSupportISO; // Support ISO (display, cursor, video) surfaces
389 NvBool bProtected; // Represents a protected region of memory.
390 NvBool bInternalHeap; // PMA:Used for internal RM allocations
391 NvBool bLostOnSuspend; // Not required to be Saved during S/R.
392 } FB_REGION_DESCRIPTOR, *PFB_REGION_DESCRIPTOR;
393
394 #define MAX_FB_REGIONS 16
395
396 // Maximum number of contexts created for WHQL test WDDM Max Contexts
397 #define WHQL_TEST_MAX_CONTEXTS 100
398
399 // Object 'get' macros for FB relative object retrievals.
400 #define MEMORY_MANAGER_GET_HEAP(p) ((p)->pHeap)
401
402 typedef struct _def_fb_mem_node
403 {
404 struct _def_fb_mem_node *pNext;
405
406 NvBool bFreeDescriptor;
407 PMEMORY_DESCRIPTOR pMemDesc;
408
409 } FB_MEM_NODE, *PFB_MEM_NODE;
410
411 // defines for MemoryManager::fbsrReservedRanges
412 #define MAX_FBSR_RESERVED_REGIONS 6 // Max. Memory descriptors for RM Instance memory
413 #define FBSR_RESERVED_INST_MEMORY_BEFORE_BAR2PTE 0
414 #define FBSR_RESERVED_INST_MEMORY_AFTER_BAR2PTE 1
415 #define FBSR_RESERVED_INST_MEMORY_GSP_HEAP 2
416 #define FBSR_RESERVED_INST_MEMORY_GSP_NON_WPR 3
417 #define FBSR_RESERVED_INST_MEMORY_GSP_WPR 4
418 #define FBSR_RESERVED_INST_MEMORY_VGA_WORKSPACE 5
419
420 /*!
421 * MemoryManager provides the root memory management of GPU video memory.
422 * External entities might provide suballocators on top of MemoryManager.
423 *
424 * MemoryManager can have static information on the memory system (e.g.: list of
425 * kinds, etc), however MemoryManager does not have direct access to the GPU
426 * memory system (e.g.: BAR0 registers). It relies on KernelMemorySystem for
427 * operations on the memory system.
428 *
429 * MemoryManager is instantiated in VGPU guest/GSP Client as well as the VGPU
430 * host/GSP-RM.
431 */
432
433 #define MEM_MGR_STUB_ORIN(...)
434
435
436 // Private field names are wrapped in PRIVATE_FIELD, which does nothing for
437 // the matching C source file, but causes diagnostics to be issued if another
438 // source file references the field.
439 #ifdef NVOC_MEM_MGR_H_PRIVATE_ACCESS_ALLOWED
440 #define PRIVATE_FIELD(x) x
441 #else
442 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
443 #endif
444
445 struct RM_POOL_ALLOC_MEM_RESERVE_INFO;
446
447 struct __nvoc_inner_struc_MemoryManager_1__ {
448 NvU64 fbUsableMemSize;
449 NvU64 fbTotalMemSizeMb;
450 NvU64 fbAddrSpaceSizeMb;
451 NvU64 mapRamSizeMb;
452 NvU64 fbOverrideSizeMb;
453 NvU64 reservedMemSize;
454 NvU32 numFBRegions;
455 FB_REGION_DESCRIPTOR fbRegion[16];
456 NvU32 numFBRegionPriority;
457 NvU64 maxFBPSize;
458 NvU64 minFBPSize;
459 NvU32 fbRegionPriority[16];
460 NvU64 ReservedConsoleDispMemSize;
461 PMEMORY_DESCRIPTOR pReservedConsoleMemDesc;
462 NvU32 lowerRangeMag;
463 NvU32 lowerRangeScale;
464 NvU32 middleRangeMag;
465 NvU32 middleRangeScale;
466 NvU32 upperRangeMag;
467 NvU32 upperRangeScale;
468 };
469
470 struct MIG_MEMORY_PARTITIONING_INFO {
471 struct NV_RANGE partitionableMemoryRange;
472 struct NV_RANGE partitionableBar1Range;
473 NvHandle hClient;
474 NvHandle hDevice;
475 NvHandle hSubdevice;
476 };
477
478
479 struct MemoryManager {
480 const struct NVOC_RTTI *__nvoc_rtti;
481 struct OBJENGSTATE __nvoc_base_OBJENGSTATE;
482 struct Object *__nvoc_pbase_Object;
483 struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE;
484 struct MemoryManager *__nvoc_pbase_MemoryManager;
485 NV_STATUS (*__memmgrConstructEngine__)(OBJGPU *, struct MemoryManager *, ENGDESCRIPTOR);
486 NV_STATUS (*__memmgrStatePreInitLocked__)(OBJGPU *, struct MemoryManager *);
487 NV_STATUS (*__memmgrStateInitLocked__)(OBJGPU *, struct MemoryManager *);
488 NV_STATUS (*__memmgrStateLoad__)(OBJGPU *, struct MemoryManager *, NvU32);
489 NV_STATUS (*__memmgrStatePostLoad__)(OBJGPU *, struct MemoryManager *, NvU32);
490 NV_STATUS (*__memmgrStatePreUnload__)(OBJGPU *, struct MemoryManager *, NvU32);
491 NV_STATUS (*__memmgrStateUnload__)(OBJGPU *, struct MemoryManager *, NvU32);
492 void (*__memmgrStateDestroy__)(OBJGPU *, struct MemoryManager *);
493 NV_STATUS (*__memmgrAllocateConsoleRegion__)(OBJGPU *, struct MemoryManager *, FB_REGION_DESCRIPTOR *);
494 NV_STATUS (*__memmgrMemUtilsSec2CtxInit__)(OBJGPU *, struct MemoryManager *, OBJCHANNEL *);
495 NvBool (*__memmgrMemUtilsCheckMemoryFastScrubEnable__)(OBJGPU *, struct MemoryManager *, NvU32, NvBool, RmPhysAddr, NvU32, NV_ADDRESS_SPACE);
496 NV_STATUS (*__memmgrAllocDetermineAlignment__)(OBJGPU *, struct MemoryManager *, NvU64 *, NvU64 *, NvU64, NvU32, NvU32, NvU32, NvU64);
497 NvU64 (*__memmgrGetMaxContextSize__)(OBJGPU *, struct MemoryManager *);
498 NvU64 (*__memmgrGetFbTaxSize__)(OBJGPU *, struct MemoryManager *);
499 void (*__memmgrScrubRegistryOverrides__)(OBJGPU *, struct MemoryManager *);
500 NvU32 (*__memmgrGetPteKindBl__)(OBJGPU *, struct MemoryManager *);
501 NvU32 (*__memmgrGetPteKindPitch__)(OBJGPU *, struct MemoryManager *);
502 NvU32 (*__memmgrChooseKindCompressC__)(OBJGPU *, struct MemoryManager *, FB_ALLOC_PAGE_FORMAT *);
503 NV_STATUS (*__memmgrGetFlaKind__)(OBJGPU *, struct MemoryManager *, NvU32 *);
504 NvBool (*__memmgrIsMemDescSupportedByFla__)(OBJGPU *, struct MemoryManager *, MEMORY_DESCRIPTOR *);
505 NvU32 (*__memmgrDetermineComptag__)(OBJGPU *, struct MemoryManager *, RmPhysAddr);
506 NvU32 (*__memmgrGetGrHeapReservationSize__)(OBJGPU *, struct MemoryManager *);
507 NvU32 (*__memmgrGetRunlistEntriesReservedFbSpace__)(OBJGPU *, struct MemoryManager *);
508 NvU32 (*__memmgrGetUserdReservedFbSpace__)(OBJGPU *, struct MemoryManager *);
509 NV_STATUS (*__memmgrCheckReservedMemorySize__)(OBJGPU *, struct MemoryManager *);
510 NV_STATUS (*__memmgrReadMmuLock__)(OBJGPU *, struct MemoryManager *, NvBool *, NvU64 *, NvU64 *);
511 NV_STATUS (*__memmgrBlockMemLockedMemory__)(OBJGPU *, struct MemoryManager *);
512 NV_STATUS (*__memmgrInsertUnprotectedRegionAtBottomOfFb__)(OBJGPU *, struct MemoryManager *, NvU64 *);
513 NV_STATUS (*__memmgrInitBaseFbRegions__)(OBJGPU *, struct MemoryManager *);
514 void (*__memmgrGetDisablePlcKind__)(struct MemoryManager *, NvU32 *);
515 void (*__memmgrEnableDynamicPageOfflining__)(OBJGPU *, struct MemoryManager *);
516 NV_STATUS (*__memmgrSetPartitionableMem__)(OBJGPU *, struct MemoryManager *);
517 NV_STATUS (*__memmgrAllocMIGGPUInstanceMemory__)(OBJGPU *, struct MemoryManager *, NvU32, NvHandle *, struct NV_RANGE *, struct Heap **);
518 NV_STATUS (*__memmgrGetBlackListPages__)(OBJGPU *, struct MemoryManager *, BLACKLIST_ADDRESS *, NvU32 *);
519 NV_STATUS (*__memmgrDiscoverMIGPartitionableMemoryRange__)(OBJGPU *, struct MemoryManager *, struct NV_RANGE *);
520 NV_STATUS (*__memmgrValidateFBEndReservation__)(OBJGPU *, struct MemoryManager *);
521 NV_STATUS (*__memmgrStatePreLoad__)(POBJGPU, struct MemoryManager *, NvU32);
522 NV_STATUS (*__memmgrStatePostUnload__)(POBJGPU, struct MemoryManager *, NvU32);
523 NV_STATUS (*__memmgrStateInitUnlocked__)(POBJGPU, struct MemoryManager *);
524 void (*__memmgrInitMissing__)(POBJGPU, struct MemoryManager *);
525 NV_STATUS (*__memmgrStatePreInitUnlocked__)(POBJGPU, struct MemoryManager *);
526 NvBool (*__memmgrIsPresent__)(POBJGPU, struct MemoryManager *);
527 NvBool bFbsrWddmModeEnabled;
528 NvBool bFbRegionsSupported;
529 NvBool bPmaSupportedOnPlatform;
530 NvBool bPmaEnabled;
531 NvBool bPmaInitialized;
532 NvBool bPmaForcePersistence;
533 NvBool bClientPageTablesPmaManaged;
534 NvBool bScanoutSysmem;
535 NvBool bMixedDensityFbp;
536 NvBool bPreferSlowRegion;
537 NvBool bPersistentStandbyBuffer;
538 NvBool bEnableFbsrPagedDma;
539 NvBool bDisallowSplitLowerMemory;
540 NvBool bIgnoreUpperMemory;
541 NvBool bSmallPageCompression;
542 NvBool bSysmemCompressionSupportDef;
543 NvBool bBug1698088IncreaseRmReserveMemoryWar;
544 NvBool bBug2301372IncreaseRmReserveMemoryWar;
545 NvBool bEnableFbsrFileMode;
546 NvBool bEnableDynamicPageOfflining;
547 NvBool bVgpuPmaSupport;
548 NvBool bScrubChannelSetupInProgress;
549 NvBool bBug3922001DisableCtxBufOnSim;
550 NvBool bEnableDynamicGranularityPageArrays;
551 NvBool bAllowNoncontiguousAllocation;
552 NvBool bLocalEgmSupported;
553 NvBool bLocalEgmEnabled;
554 NvU32 localEgmPeerId;
555 NvS32 localEgmNodeId;
556 NvU64 localEgmBasePhysAddr;
557 NvU64 localEgmSize;
558 NvBool bEccInterleavedVidmemScrub;
559 NvBool bScrubberInitialized;
560 NvBool bAllowSysmemHugePages;
561 NvBool bEccScrubOverride;
562 NvU64 sysmemPageSize;
563 struct Heap *pHeap;
564 NvBool bScrubOnFreeEnabled;
565 NvBool bFastScrubberEnabled;
566 NvBool bDisableAsyncScrubforMods;
567 NvBool bUseVasForCeMemoryOps;
568 NvBool bCePhysicalVidmemAccessNotSupported;
569 NvBool bRmExecutingEccScrub;
570 NvBool bBug1441072EccScrubWar;
571 NvU64 heapStartOffset;
572 NvU64 rsvdMemoryBase;
573 NvU32 rsvdMemorySize;
574 struct CeUtils *pCeUtils;
575 struct CeUtils *pCeUtilsSuspended;
576 NvBool bDisableGlobalCeUtils;
577 OBJSCRUB eccScrubberState;
578 struct __nvoc_inner_struc_MemoryManager_1__ Ram;
579 NvU32 PteKindOverride;
580 NvU32 zbcSurfaces;
581 NvU64 overrideInitHeapMin;
582 NvU64 overrideHeapMax;
583 NvU64 rsvdMemorySizeIncrement;
584 struct OBJFBSR *pFbsr[8];
585 struct OBJFBSR *pActiveFbsr;
586 NvU32 fbsrStartMode;
587 NvU32 fixedFbsrModesMask;
588 MEMORY_DESCRIPTOR *fbsrReservedRanges[6];
589 PFB_MEM_NODE pMemHeadNode;
590 PFB_MEM_NODE pMemTailNode;
591 struct RM_POOL_ALLOC_MEM_RESERVE_INFO *pPageLevelReserve;
592 struct MIG_MEMORY_PARTITIONING_INFO MIGMemoryPartitioningInfo;
593 NV_FB_RSVD_BLOCK_LOG_INFO rsvdBlockInfo;
594 NvHandle hClient;
595 NvHandle hDevice;
596 NvHandle hSubdevice;
597 NvBool bReservedMemAtBottom;
598 NvHandle hThirdPartyP2P;
599 NvBool bMonitoredFenceSupported;
600 NvBool b64BitSemaphoresSupported;
601 NvBool bGenericKindSupport;
602 };
603
604 #ifndef __NVOC_CLASS_MemoryManager_TYPEDEF__
605 #define __NVOC_CLASS_MemoryManager_TYPEDEF__
606 typedef struct MemoryManager MemoryManager;
607 #endif /* __NVOC_CLASS_MemoryManager_TYPEDEF__ */
608
609 #ifndef __nvoc_class_id_MemoryManager
610 #define __nvoc_class_id_MemoryManager 0x22ad47
611 #endif /* __nvoc_class_id_MemoryManager */
612
613 extern const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryManager;
614
615 #define __staticCast_MemoryManager(pThis) \
616 ((pThis)->__nvoc_pbase_MemoryManager)
617
618 #ifdef __nvoc_mem_mgr_h_disabled
619 #define __dynamicCast_MemoryManager(pThis) ((MemoryManager*)NULL)
620 #else //__nvoc_mem_mgr_h_disabled
621 #define __dynamicCast_MemoryManager(pThis) \
622 ((MemoryManager*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(MemoryManager)))
623 #endif //__nvoc_mem_mgr_h_disabled
624
625 #define PDB_PROP_MEMMGR_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE.
626 #define PDB_PROP_MEMMGR_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING
627
628 NV_STATUS __nvoc_objCreateDynamic_MemoryManager(MemoryManager**, Dynamic*, NvU32, va_list);
629
630 NV_STATUS __nvoc_objCreate_MemoryManager(MemoryManager**, Dynamic*, NvU32);
631 #define __objCreate_MemoryManager(ppNewObj, pParent, createFlags) \
632 __nvoc_objCreate_MemoryManager((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
633
634 #define memmgrConstructEngine(pGpu, pMemoryManager, arg0) memmgrConstructEngine_DISPATCH(pGpu, pMemoryManager, arg0)
635 #define memmgrStatePreInitLocked(pGpu, pMemoryManager) memmgrStatePreInitLocked_DISPATCH(pGpu, pMemoryManager)
636 #define memmgrStateInitLocked(pGpu, pMemoryManager) memmgrStateInitLocked_DISPATCH(pGpu, pMemoryManager)
637 #define memmgrStateLoad(pGpu, pMemoryManager, arg0) memmgrStateLoad_DISPATCH(pGpu, pMemoryManager, arg0)
638 #define memmgrStatePostLoad(pGpu, pMemoryManager, arg0) memmgrStatePostLoad_DISPATCH(pGpu, pMemoryManager, arg0)
639 #define memmgrStatePreUnload(pGpu, pMemoryManager, arg0) memmgrStatePreUnload_DISPATCH(pGpu, pMemoryManager, arg0)
640 #define memmgrStateUnload(pGpu, pMemoryManager, arg0) memmgrStateUnload_DISPATCH(pGpu, pMemoryManager, arg0)
641 #define memmgrStateDestroy(pGpu, pMemoryManager) memmgrStateDestroy_DISPATCH(pGpu, pMemoryManager)
642 #define memmgrAllocateConsoleRegion(pGpu, pMemoryManager, arg0) memmgrAllocateConsoleRegion_DISPATCH(pGpu, pMemoryManager, arg0)
643 #define memmgrAllocateConsoleRegion_HAL(pGpu, pMemoryManager, arg0) memmgrAllocateConsoleRegion_DISPATCH(pGpu, pMemoryManager, arg0)
644 #define memmgrMemUtilsSec2CtxInit(pGpu, pMemoryManager, arg0) memmgrMemUtilsSec2CtxInit_DISPATCH(pGpu, pMemoryManager, arg0)
645 #define memmgrMemUtilsSec2CtxInit_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsSec2CtxInit_DISPATCH(pGpu, pMemoryManager, arg0)
646 #define memmgrMemUtilsCheckMemoryFastScrubEnable(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4)
647 #define memmgrMemUtilsCheckMemoryFastScrubEnable_HAL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4)
648 #define memmgrAllocDetermineAlignment(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment) memmgrAllocDetermineAlignment_DISPATCH(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment)
649 #define memmgrAllocDetermineAlignment_HAL(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment) memmgrAllocDetermineAlignment_DISPATCH(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment)
650 #define memmgrGetMaxContextSize(pGpu, pMemoryManager) memmgrGetMaxContextSize_DISPATCH(pGpu, pMemoryManager)
651 #define memmgrGetMaxContextSize_HAL(pGpu, pMemoryManager) memmgrGetMaxContextSize_DISPATCH(pGpu, pMemoryManager)
652 #define memmgrGetFbTaxSize(pGpu, pMemoryManager) memmgrGetFbTaxSize_DISPATCH(pGpu, pMemoryManager)
653 #define memmgrGetFbTaxSize_HAL(pGpu, pMemoryManager) memmgrGetFbTaxSize_DISPATCH(pGpu, pMemoryManager)
654 #define memmgrScrubRegistryOverrides(pGpu, pMemoryManager) memmgrScrubRegistryOverrides_DISPATCH(pGpu, pMemoryManager)
655 #define memmgrScrubRegistryOverrides_HAL(pGpu, pMemoryManager) memmgrScrubRegistryOverrides_DISPATCH(pGpu, pMemoryManager)
656 #define memmgrGetPteKindBl(pGpu, pMemoryManager) memmgrGetPteKindBl_DISPATCH(pGpu, pMemoryManager)
657 #define memmgrGetPteKindBl_HAL(pGpu, pMemoryManager) memmgrGetPteKindBl_DISPATCH(pGpu, pMemoryManager)
658 #define memmgrGetPteKindPitch(pGpu, pMemoryManager) memmgrGetPteKindPitch_DISPATCH(pGpu, pMemoryManager)
659 #define memmgrGetPteKindPitch_HAL(pGpu, pMemoryManager) memmgrGetPteKindPitch_DISPATCH(pGpu, pMemoryManager)
660 #define memmgrChooseKindCompressC(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressC_DISPATCH(pGpu, pMemoryManager, arg0)
661 #define memmgrChooseKindCompressC_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressC_DISPATCH(pGpu, pMemoryManager, arg0)
662 #define memmgrGetFlaKind(pGpu, pMemoryManager, arg0) memmgrGetFlaKind_DISPATCH(pGpu, pMemoryManager, arg0)
663 #define memmgrGetFlaKind_HAL(pGpu, pMemoryManager, arg0) memmgrGetFlaKind_DISPATCH(pGpu, pMemoryManager, arg0)
664 #define memmgrIsMemDescSupportedByFla(pGpu, pMemoryManager, pMemDesc) memmgrIsMemDescSupportedByFla_DISPATCH(pGpu, pMemoryManager, pMemDesc)
665 #define memmgrIsMemDescSupportedByFla_HAL(pGpu, pMemoryManager, pMemDesc) memmgrIsMemDescSupportedByFla_DISPATCH(pGpu, pMemoryManager, pMemDesc)
666 #define memmgrDetermineComptag(pGpu, pMemoryManager, arg0) memmgrDetermineComptag_DISPATCH(pGpu, pMemoryManager, arg0)
667 #define memmgrDetermineComptag_HAL(pGpu, pMemoryManager, arg0) memmgrDetermineComptag_DISPATCH(pGpu, pMemoryManager, arg0)
668 #define memmgrGetGrHeapReservationSize(pGpu, pMemoryManager) memmgrGetGrHeapReservationSize_DISPATCH(pGpu, pMemoryManager)
669 #define memmgrGetGrHeapReservationSize_HAL(pGpu, pMemoryManager) memmgrGetGrHeapReservationSize_DISPATCH(pGpu, pMemoryManager)
670 #define memmgrGetRunlistEntriesReservedFbSpace(pGpu, pMemoryManager) memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(pGpu, pMemoryManager)
671 #define memmgrGetRunlistEntriesReservedFbSpace_HAL(pGpu, pMemoryManager) memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(pGpu, pMemoryManager)
672 #define memmgrGetUserdReservedFbSpace(pGpu, pMemoryManager) memmgrGetUserdReservedFbSpace_DISPATCH(pGpu, pMemoryManager)
673 #define memmgrGetUserdReservedFbSpace_HAL(pGpu, pMemoryManager) memmgrGetUserdReservedFbSpace_DISPATCH(pGpu, pMemoryManager)
674 #define memmgrCheckReservedMemorySize(pGpu, pMemoryManager) memmgrCheckReservedMemorySize_DISPATCH(pGpu, pMemoryManager)
675 #define memmgrCheckReservedMemorySize_HAL(pGpu, pMemoryManager) memmgrCheckReservedMemorySize_DISPATCH(pGpu, pMemoryManager)
676 #define memmgrReadMmuLock(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi) memmgrReadMmuLock_DISPATCH(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi)
677 #define memmgrReadMmuLock_HAL(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi) memmgrReadMmuLock_DISPATCH(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi)
678 #define memmgrBlockMemLockedMemory(pGpu, pMemoryManager) memmgrBlockMemLockedMemory_DISPATCH(pGpu, pMemoryManager)
679 #define memmgrBlockMemLockedMemory_HAL(pGpu, pMemoryManager) memmgrBlockMemLockedMemory_DISPATCH(pGpu, pMemoryManager)
680 #define memmgrInsertUnprotectedRegionAtBottomOfFb(pGpu, pMemoryManager, pSize) memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(pGpu, pMemoryManager, pSize)
681 #define memmgrInsertUnprotectedRegionAtBottomOfFb_HAL(pGpu, pMemoryManager, pSize) memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(pGpu, pMemoryManager, pSize)
682 #define memmgrInitBaseFbRegions(pGpu, pMemoryManager) memmgrInitBaseFbRegions_DISPATCH(pGpu, pMemoryManager)
683 #define memmgrInitBaseFbRegions_HAL(pGpu, pMemoryManager) memmgrInitBaseFbRegions_DISPATCH(pGpu, pMemoryManager)
684 #define memmgrGetDisablePlcKind(pMemoryManager, pteKind) memmgrGetDisablePlcKind_DISPATCH(pMemoryManager, pteKind)
685 #define memmgrGetDisablePlcKind_HAL(pMemoryManager, pteKind) memmgrGetDisablePlcKind_DISPATCH(pMemoryManager, pteKind)
686 #define memmgrEnableDynamicPageOfflining(pGpu, pMemoryManager) memmgrEnableDynamicPageOfflining_DISPATCH(pGpu, pMemoryManager)
687 #define memmgrEnableDynamicPageOfflining_HAL(pGpu, pMemoryManager) memmgrEnableDynamicPageOfflining_DISPATCH(pGpu, pMemoryManager)
688 #define memmgrSetPartitionableMem(pGpu, pMemoryManager) memmgrSetPartitionableMem_DISPATCH(pGpu, pMemoryManager)
689 #define memmgrSetPartitionableMem_HAL(pGpu, pMemoryManager) memmgrSetPartitionableMem_DISPATCH(pGpu, pMemoryManager)
690 #define memmgrAllocMIGGPUInstanceMemory(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap) memmgrAllocMIGGPUInstanceMemory_DISPATCH(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap)
691 #define memmgrAllocMIGGPUInstanceMemory_HAL(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap) memmgrAllocMIGGPUInstanceMemory_DISPATCH(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap)
692 #define memmgrGetBlackListPages(pGpu, pMemoryManager, pBlAddrs, pCount) memmgrGetBlackListPages_DISPATCH(pGpu, pMemoryManager, pBlAddrs, pCount)
693 #define memmgrGetBlackListPages_HAL(pGpu, pMemoryManager, pBlAddrs, pCount) memmgrGetBlackListPages_DISPATCH(pGpu, pMemoryManager, pBlAddrs, pCount)
694 #define memmgrDiscoverMIGPartitionableMemoryRange(pGpu, pMemoryManager, pMemoryRange) memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(pGpu, pMemoryManager, pMemoryRange)
695 #define memmgrDiscoverMIGPartitionableMemoryRange_HAL(pGpu, pMemoryManager, pMemoryRange) memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(pGpu, pMemoryManager, pMemoryRange)
696 #define memmgrValidateFBEndReservation(pGpu, pMemoryManager) memmgrValidateFBEndReservation_DISPATCH(pGpu, pMemoryManager)
697 #define memmgrValidateFBEndReservation_HAL(pGpu, pMemoryManager) memmgrValidateFBEndReservation_DISPATCH(pGpu, pMemoryManager)
698 #define memmgrStatePreLoad(pGpu, pEngstate, arg0) memmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg0)
699 #define memmgrStatePostUnload(pGpu, pEngstate, arg0) memmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg0)
700 #define memmgrStateInitUnlocked(pGpu, pEngstate) memmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate)
701 #define memmgrInitMissing(pGpu, pEngstate) memmgrInitMissing_DISPATCH(pGpu, pEngstate)
702 #define memmgrStatePreInitUnlocked(pGpu, pEngstate) memmgrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate)
703 #define memmgrIsPresent(pGpu, pEngstate) memmgrIsPresent_DISPATCH(pGpu, pEngstate)
704 NV_STATUS memmgrSavePowerMgmtState_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
705
706
707 #ifdef __nvoc_mem_mgr_h_disabled
memmgrSavePowerMgmtState(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)708 static inline NV_STATUS memmgrSavePowerMgmtState(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
709 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
710 return NV_ERR_NOT_SUPPORTED;
711 }
712 #else //__nvoc_mem_mgr_h_disabled
713 #define memmgrSavePowerMgmtState(pGpu, pMemoryManager) memmgrSavePowerMgmtState_KERNEL(pGpu, pMemoryManager)
714 #endif //__nvoc_mem_mgr_h_disabled
715
716 #define memmgrSavePowerMgmtState_HAL(pGpu, pMemoryManager) memmgrSavePowerMgmtState(pGpu, pMemoryManager)
717
718 NV_STATUS memmgrRestorePowerMgmtState_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
719
720
721 #ifdef __nvoc_mem_mgr_h_disabled
memmgrRestorePowerMgmtState(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)722 static inline NV_STATUS memmgrRestorePowerMgmtState(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
723 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
724 return NV_ERR_NOT_SUPPORTED;
725 }
726 #else //__nvoc_mem_mgr_h_disabled
727 #define memmgrRestorePowerMgmtState(pGpu, pMemoryManager) memmgrRestorePowerMgmtState_KERNEL(pGpu, pMemoryManager)
728 #endif //__nvoc_mem_mgr_h_disabled
729
730 #define memmgrRestorePowerMgmtState_HAL(pGpu, pMemoryManager) memmgrRestorePowerMgmtState(pGpu, pMemoryManager)
731
732 NvU64 memmgrDeterminePageSize_IMPL(struct MemoryManager *pMemoryManager, NvHandle hClient, NvU64 memSize, NvU32 memFormat, NvU32 pageFormatFlags, NvU32 *pRetAttr, NvU32 *pRetAttr2);
733
734
735 #ifdef __nvoc_mem_mgr_h_disabled
memmgrDeterminePageSize(struct MemoryManager * pMemoryManager,NvHandle hClient,NvU64 memSize,NvU32 memFormat,NvU32 pageFormatFlags,NvU32 * pRetAttr,NvU32 * pRetAttr2)736 static inline NvU64 memmgrDeterminePageSize(struct MemoryManager *pMemoryManager, NvHandle hClient, NvU64 memSize, NvU32 memFormat, NvU32 pageFormatFlags, NvU32 *pRetAttr, NvU32 *pRetAttr2) {
737 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
738 return 0;
739 }
740 #else //__nvoc_mem_mgr_h_disabled
741 #define memmgrDeterminePageSize(pMemoryManager, hClient, memSize, memFormat, pageFormatFlags, pRetAttr, pRetAttr2) memmgrDeterminePageSize_IMPL(pMemoryManager, hClient, memSize, memFormat, pageFormatFlags, pRetAttr, pRetAttr2)
742 #endif //__nvoc_mem_mgr_h_disabled
743
744 #define memmgrDeterminePageSize_HAL(pMemoryManager, hClient, memSize, memFormat, pageFormatFlags, pRetAttr, pRetAttr2) memmgrDeterminePageSize(pMemoryManager, hClient, memSize, memFormat, pageFormatFlags, pRetAttr, pRetAttr2)
745
memmgrReserveConsoleRegion_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_REGION_DESCRIPTOR * arg0)746 static inline NV_STATUS memmgrReserveConsoleRegion_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) {
747 return NV_OK;
748 }
749
750
751 #ifdef __nvoc_mem_mgr_h_disabled
memmgrReserveConsoleRegion(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_REGION_DESCRIPTOR * arg0)752 static inline NV_STATUS memmgrReserveConsoleRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) {
753 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
754 return NV_ERR_NOT_SUPPORTED;
755 }
756 #else //__nvoc_mem_mgr_h_disabled
757 #define memmgrReserveConsoleRegion(pGpu, pMemoryManager, arg0) memmgrReserveConsoleRegion_56cd7a(pGpu, pMemoryManager, arg0)
758 #endif //__nvoc_mem_mgr_h_disabled
759
760 #define memmgrReserveConsoleRegion_HAL(pGpu, pMemoryManager, arg0) memmgrReserveConsoleRegion(pGpu, pMemoryManager, arg0)
761
762 NV_STATUS memmgrGetKindComprForGpu_KERNEL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, OBJGPU *pGpu, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo);
763
764
765 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetKindComprForGpu(struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * arg0,OBJGPU * pGpu,NvU64 offset,NvU32 * kind,COMPR_INFO * pComprInfo)766 static inline NV_STATUS memmgrGetKindComprForGpu(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, OBJGPU *pGpu, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo) {
767 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
768 return NV_ERR_NOT_SUPPORTED;
769 }
770 #else //__nvoc_mem_mgr_h_disabled
771 #define memmgrGetKindComprForGpu(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo) memmgrGetKindComprForGpu_KERNEL(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo)
772 #endif //__nvoc_mem_mgr_h_disabled
773
774 #define memmgrGetKindComprForGpu_HAL(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo) memmgrGetKindComprForGpu(pMemoryManager, arg0, pGpu, offset, kind, pComprInfo)
775
memmgrScrubInit_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)776 static inline NV_STATUS memmgrScrubInit_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
777 return NV_OK;
778 }
779
780
781 #ifdef __nvoc_mem_mgr_h_disabled
memmgrScrubInit(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)782 static inline NV_STATUS memmgrScrubInit(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
783 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
784 return NV_ERR_NOT_SUPPORTED;
785 }
786 #else //__nvoc_mem_mgr_h_disabled
787 #define memmgrScrubInit(pGpu, pMemoryManager) memmgrScrubInit_56cd7a(pGpu, pMemoryManager)
788 #endif //__nvoc_mem_mgr_h_disabled
789
790 #define memmgrScrubInit_HAL(pGpu, pMemoryManager) memmgrScrubInit(pGpu, pMemoryManager)
791
792 NV_STATUS memmgrScrubHandlePostSchedulingEnable_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
793
794
795 #ifdef __nvoc_mem_mgr_h_disabled
memmgrScrubHandlePostSchedulingEnable(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)796 static inline NV_STATUS memmgrScrubHandlePostSchedulingEnable(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
797 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
798 return NV_ERR_NOT_SUPPORTED;
799 }
800 #else //__nvoc_mem_mgr_h_disabled
801 #define memmgrScrubHandlePostSchedulingEnable(pGpu, pMemoryManager) memmgrScrubHandlePostSchedulingEnable_GP100(pGpu, pMemoryManager)
802 #endif //__nvoc_mem_mgr_h_disabled
803
804 #define memmgrScrubHandlePostSchedulingEnable_HAL(pGpu, pMemoryManager) memmgrScrubHandlePostSchedulingEnable(pGpu, pMemoryManager)
805
memmgrGetScrubState_f2d351(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * arg0,NvU64 * arg1,NvBool * arg2)806 static inline void memmgrGetScrubState_f2d351(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvBool *arg2) {
807 NV_ASSERT_PRECOMP(0);
808 }
809
810
811 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetScrubState(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * arg0,NvU64 * arg1,NvBool * arg2)812 static inline void memmgrGetScrubState(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvBool *arg2) {
813 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
814 }
815 #else //__nvoc_mem_mgr_h_disabled
816 #define memmgrGetScrubState(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrGetScrubState_f2d351(pGpu, pMemoryManager, arg0, arg1, arg2)
817 #endif //__nvoc_mem_mgr_h_disabled
818
819 #define memmgrGetScrubState_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrGetScrubState(pGpu, pMemoryManager, arg0, arg1, arg2)
820
memmgrScrubInternalRegions_b3696a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)821 static inline void memmgrScrubInternalRegions_b3696a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
822 return;
823 }
824
825
826 #ifdef __nvoc_mem_mgr_h_disabled
memmgrScrubInternalRegions(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)827 static inline void memmgrScrubInternalRegions(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
828 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
829 }
830 #else //__nvoc_mem_mgr_h_disabled
831 #define memmgrScrubInternalRegions(pGpu, pMemoryManager) memmgrScrubInternalRegions_b3696a(pGpu, pMemoryManager)
832 #endif //__nvoc_mem_mgr_h_disabled
833
834 #define memmgrScrubInternalRegions_HAL(pGpu, pMemoryManager) memmgrScrubInternalRegions(pGpu, pMemoryManager)
835
memmgrEccScrubInProgress_491d52(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)836 static inline NvBool memmgrEccScrubInProgress_491d52(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
837 return ((NvBool)(0 != 0));
838 }
839
840 NvBool memmgrEccScrubInProgress_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
841
842
843 #ifdef __nvoc_mem_mgr_h_disabled
memmgrEccScrubInProgress(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)844 static inline NvBool memmgrEccScrubInProgress(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
845 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
846 return NV_FALSE;
847 }
848 #else //__nvoc_mem_mgr_h_disabled
849 #define memmgrEccScrubInProgress(pGpu, pMemoryManager) memmgrEccScrubInProgress_491d52(pGpu, pMemoryManager)
850 #endif //__nvoc_mem_mgr_h_disabled
851
852 #define memmgrEccScrubInProgress_HAL(pGpu, pMemoryManager) memmgrEccScrubInProgress(pGpu, pMemoryManager)
853
memmgrAsyncScrubRegion_f2d351(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 arg0,NvU64 arg1)854 static inline void memmgrAsyncScrubRegion_f2d351(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU64 arg1) {
855 NV_ASSERT_PRECOMP(0);
856 }
857
858
859 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAsyncScrubRegion(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 arg0,NvU64 arg1)860 static inline void memmgrAsyncScrubRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU64 arg1) {
861 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
862 }
863 #else //__nvoc_mem_mgr_h_disabled
864 #define memmgrAsyncScrubRegion(pGpu, pMemoryManager, arg0, arg1) memmgrAsyncScrubRegion_f2d351(pGpu, pMemoryManager, arg0, arg1)
865 #endif //__nvoc_mem_mgr_h_disabled
866
867 #define memmgrAsyncScrubRegion_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrAsyncScrubRegion(pGpu, pMemoryManager, arg0, arg1)
868
869 NV_STATUS memmgrScrubHandlePreSchedulingDisable_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
870
871
872 #ifdef __nvoc_mem_mgr_h_disabled
memmgrScrubHandlePreSchedulingDisable(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)873 static inline NV_STATUS memmgrScrubHandlePreSchedulingDisable(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
874 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
875 return NV_ERR_NOT_SUPPORTED;
876 }
877 #else //__nvoc_mem_mgr_h_disabled
878 #define memmgrScrubHandlePreSchedulingDisable(pGpu, pMemoryManager) memmgrScrubHandlePreSchedulingDisable_GP100(pGpu, pMemoryManager)
879 #endif //__nvoc_mem_mgr_h_disabled
880
881 #define memmgrScrubHandlePreSchedulingDisable_HAL(pGpu, pMemoryManager) memmgrScrubHandlePreSchedulingDisable(pGpu, pMemoryManager)
882
memmgrScrubDestroy_b3696a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)883 static inline void memmgrScrubDestroy_b3696a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
884 return;
885 }
886
887
888 #ifdef __nvoc_mem_mgr_h_disabled
memmgrScrubDestroy(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)889 static inline void memmgrScrubDestroy(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
890 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
891 }
892 #else //__nvoc_mem_mgr_h_disabled
893 #define memmgrScrubDestroy(pGpu, pMemoryManager) memmgrScrubDestroy_b3696a(pGpu, pMemoryManager)
894 #endif //__nvoc_mem_mgr_h_disabled
895
896 #define memmgrScrubDestroy_HAL(pGpu, pMemoryManager) memmgrScrubDestroy(pGpu, pMemoryManager)
897
memmgrScrubMemory_b3696a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,RmPhysAddr arg0,NvU64 arg1)898 static inline void memmgrScrubMemory_b3696a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0, NvU64 arg1) {
899 return;
900 }
901
902 void memmgrScrubMemory_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0, NvU64 arg1);
903
904
905 #ifdef __nvoc_mem_mgr_h_disabled
memmgrScrubMemory(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,RmPhysAddr arg0,NvU64 arg1)906 static inline void memmgrScrubMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0, NvU64 arg1) {
907 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
908 }
909 #else //__nvoc_mem_mgr_h_disabled
910 #define memmgrScrubMemory(pGpu, pMemoryManager, arg0, arg1) memmgrScrubMemory_b3696a(pGpu, pMemoryManager, arg0, arg1)
911 #endif //__nvoc_mem_mgr_h_disabled
912
913 #define memmgrScrubMemory_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrScrubMemory(pGpu, pMemoryManager, arg0, arg1)
914
memmgrMemUtilsMemSetBlocking_92bfc3(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0,RmPhysAddr arg1,NvU64 arg2)915 static inline NV_STATUS memmgrMemUtilsMemSetBlocking_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2) {
916 NV_ASSERT_PRECOMP(0);
917 return NV_ERR_NOT_SUPPORTED;
918 }
919
920
921 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsMemSetBlocking(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0,RmPhysAddr arg1,NvU64 arg2)922 static inline NV_STATUS memmgrMemUtilsMemSetBlocking(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2) {
923 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
924 return NV_ERR_NOT_SUPPORTED;
925 }
926 #else //__nvoc_mem_mgr_h_disabled
927 #define memmgrMemUtilsMemSetBlocking(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrMemUtilsMemSetBlocking_92bfc3(pGpu, pMemoryManager, arg0, arg1, arg2)
928 #endif //__nvoc_mem_mgr_h_disabled
929
930 #define memmgrMemUtilsMemSetBlocking_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrMemUtilsMemSetBlocking(pGpu, pMemoryManager, arg0, arg1, arg2)
931
memmgrMemUtilsMemSet_92bfc3(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0,RmPhysAddr arg1,NvU64 arg2,NvU32 arg3,NvU32 * arg4)932 static inline NV_STATUS memmgrMemUtilsMemSet_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2, NvU32 arg3, NvU32 *arg4) {
933 NV_ASSERT_PRECOMP(0);
934 return NV_ERR_NOT_SUPPORTED;
935 }
936
937
938 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsMemSet(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0,RmPhysAddr arg1,NvU64 arg2,NvU32 arg3,NvU32 * arg4)939 static inline NV_STATUS memmgrMemUtilsMemSet(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, RmPhysAddr arg1, NvU64 arg2, NvU32 arg3, NvU32 *arg4) {
940 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
941 return NV_ERR_NOT_SUPPORTED;
942 }
943 #else //__nvoc_mem_mgr_h_disabled
944 #define memmgrMemUtilsMemSet(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsMemSet_92bfc3(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4)
945 #endif //__nvoc_mem_mgr_h_disabled
946
947 #define memmgrMemUtilsMemSet_HAL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4) memmgrMemUtilsMemSet(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4)
948
memmgrMemUtilsAllocateEccScrubber_92bfc3(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)949 static inline NV_STATUS memmgrMemUtilsAllocateEccScrubber_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
950 NV_ASSERT_PRECOMP(0);
951 return NV_ERR_NOT_SUPPORTED;
952 }
953
954
955 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsAllocateEccScrubber(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)956 static inline NV_STATUS memmgrMemUtilsAllocateEccScrubber(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
957 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
958 return NV_ERR_NOT_SUPPORTED;
959 }
960 #else //__nvoc_mem_mgr_h_disabled
961 #define memmgrMemUtilsAllocateEccScrubber(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccScrubber_92bfc3(pGpu, pMemoryManager, arg0)
962 #endif //__nvoc_mem_mgr_h_disabled
963
964 #define memmgrMemUtilsAllocateEccScrubber_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccScrubber(pGpu, pMemoryManager, arg0)
965
memmgrMemUtilsAllocateEccAllocScrubber_92bfc3(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)966 static inline NV_STATUS memmgrMemUtilsAllocateEccAllocScrubber_92bfc3(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
967 NV_ASSERT_PRECOMP(0);
968 return NV_ERR_NOT_SUPPORTED;
969 }
970
971
972 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsAllocateEccAllocScrubber(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)973 static inline NV_STATUS memmgrMemUtilsAllocateEccAllocScrubber(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
974 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
975 return NV_ERR_NOT_SUPPORTED;
976 }
977 #else //__nvoc_mem_mgr_h_disabled
978 #define memmgrMemUtilsAllocateEccAllocScrubber(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccAllocScrubber_92bfc3(pGpu, pMemoryManager, arg0)
979 #endif //__nvoc_mem_mgr_h_disabled
980
981 #define memmgrMemUtilsAllocateEccAllocScrubber_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsAllocateEccAllocScrubber(pGpu, pMemoryManager, arg0)
982
983 NV_STATUS memmgrMemUtilsChannelInitialize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0);
984
985
986 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsChannelInitialize(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)987 static inline NV_STATUS memmgrMemUtilsChannelInitialize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
988 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
989 return NV_ERR_NOT_SUPPORTED;
990 }
991 #else //__nvoc_mem_mgr_h_disabled
992 #define memmgrMemUtilsChannelInitialize(pGpu, pMemoryManager, arg0) memmgrMemUtilsChannelInitialize_GM107(pGpu, pMemoryManager, arg0)
993 #endif //__nvoc_mem_mgr_h_disabled
994
995 #define memmgrMemUtilsChannelInitialize_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsChannelInitialize(pGpu, pMemoryManager, arg0)
996
997 NV_STATUS memmgrMemUtilsCopyEngineInitialize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0);
998
999
1000 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsCopyEngineInitialize(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)1001 static inline NV_STATUS memmgrMemUtilsCopyEngineInitialize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
1002 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1003 return NV_ERR_NOT_SUPPORTED;
1004 }
1005 #else //__nvoc_mem_mgr_h_disabled
1006 #define memmgrMemUtilsCopyEngineInitialize(pGpu, pMemoryManager, arg0) memmgrMemUtilsCopyEngineInitialize_GM107(pGpu, pMemoryManager, arg0)
1007 #endif //__nvoc_mem_mgr_h_disabled
1008
1009 #define memmgrMemUtilsCopyEngineInitialize_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsCopyEngineInitialize(pGpu, pMemoryManager, arg0)
1010
1011 NV_STATUS memmgrMemUtilsGetCopyEngineClass_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *pClass);
1012
1013
1014 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsGetCopyEngineClass(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 * pClass)1015 static inline NV_STATUS memmgrMemUtilsGetCopyEngineClass(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *pClass) {
1016 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1017 return NV_ERR_NOT_SUPPORTED;
1018 }
1019 #else //__nvoc_mem_mgr_h_disabled
1020 #define memmgrMemUtilsGetCopyEngineClass(pGpu, pMemoryManager, pClass) memmgrMemUtilsGetCopyEngineClass_GM107(pGpu, pMemoryManager, pClass)
1021 #endif //__nvoc_mem_mgr_h_disabled
1022
1023 #define memmgrMemUtilsGetCopyEngineClass_HAL(pGpu, pMemoryManager, pClass) memmgrMemUtilsGetCopyEngineClass(pGpu, pMemoryManager, pClass)
1024
1025 NV_STATUS memmgrMemUtilsCreateMemoryAlias_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0);
1026
1027
1028 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsCreateMemoryAlias(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)1029 static inline NV_STATUS memmgrMemUtilsCreateMemoryAlias(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
1030 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1031 return NV_ERR_NOT_SUPPORTED;
1032 }
1033 #else //__nvoc_mem_mgr_h_disabled
1034 #define memmgrMemUtilsCreateMemoryAlias(pGpu, pMemoryManager, arg0) memmgrMemUtilsCreateMemoryAlias_GM107(pGpu, pMemoryManager, arg0)
1035 #endif //__nvoc_mem_mgr_h_disabled
1036
1037 #define memmgrMemUtilsCreateMemoryAlias_HAL(pGpu, pMemoryManager, arg0) memmgrMemUtilsCreateMemoryAlias(pGpu, pMemoryManager, arg0)
1038
1039 NV_STATUS memmgrAllocHal_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo);
1040
1041
1042 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAllocHal(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_INFO * pFbAllocInfo)1043 static inline NV_STATUS memmgrAllocHal(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo) {
1044 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1045 return NV_ERR_NOT_SUPPORTED;
1046 }
1047 #else //__nvoc_mem_mgr_h_disabled
1048 #define memmgrAllocHal(pGpu, pMemoryManager, pFbAllocInfo) memmgrAllocHal_GM107(pGpu, pMemoryManager, pFbAllocInfo)
1049 #endif //__nvoc_mem_mgr_h_disabled
1050
1051 #define memmgrAllocHal_HAL(pGpu, pMemoryManager, pFbAllocInfo) memmgrAllocHal(pGpu, pMemoryManager, pFbAllocInfo)
1052
1053 NV_STATUS memmgrFreeHal_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo, PRMTIMEOUT pTimeout);
1054
1055
1056 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFreeHal(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_INFO * pFbAllocInfo,PRMTIMEOUT pTimeout)1057 static inline NV_STATUS memmgrFreeHal(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo, PRMTIMEOUT pTimeout) {
1058 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1059 return NV_ERR_NOT_SUPPORTED;
1060 }
1061 #else //__nvoc_mem_mgr_h_disabled
1062 #define memmgrFreeHal(pGpu, pMemoryManager, pFbAllocInfo, pTimeout) memmgrFreeHal_GM107(pGpu, pMemoryManager, pFbAllocInfo, pTimeout)
1063 #endif //__nvoc_mem_mgr_h_disabled
1064
1065 #define memmgrFreeHal_HAL(pGpu, pMemoryManager, pFbAllocInfo, pTimeout) memmgrFreeHal(pGpu, pMemoryManager, pFbAllocInfo, pTimeout)
1066
memmgrUpdateSurfaceCompression_5baef9(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,Memory * arg0,NvBool arg1)1067 static inline NV_STATUS memmgrUpdateSurfaceCompression_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *arg0, NvBool arg1) {
1068 NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
1069 }
1070
1071
1072 #ifdef __nvoc_mem_mgr_h_disabled
memmgrUpdateSurfaceCompression(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,Memory * arg0,NvBool arg1)1073 static inline NV_STATUS memmgrUpdateSurfaceCompression(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *arg0, NvBool arg1) {
1074 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1075 return NV_ERR_NOT_SUPPORTED;
1076 }
1077 #else //__nvoc_mem_mgr_h_disabled
1078 #define memmgrUpdateSurfaceCompression(pGpu, pMemoryManager, arg0, arg1) memmgrUpdateSurfaceCompression_5baef9(pGpu, pMemoryManager, arg0, arg1)
1079 #endif //__nvoc_mem_mgr_h_disabled
1080
1081 #define memmgrUpdateSurfaceCompression_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrUpdateSurfaceCompression(pGpu, pMemoryManager, arg0, arg1)
1082
1083 NV_STATUS memmgrGetBankPlacementData_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *pBankPlacementLowData);
1084
1085
1086 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetBankPlacementData(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 * pBankPlacementLowData)1087 static inline NV_STATUS memmgrGetBankPlacementData(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *pBankPlacementLowData) {
1088 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1089 return NV_ERR_NOT_SUPPORTED;
1090 }
1091 #else //__nvoc_mem_mgr_h_disabled
1092 #define memmgrGetBankPlacementData(pGpu, pMemoryManager, pBankPlacementLowData) memmgrGetBankPlacementData_GM107(pGpu, pMemoryManager, pBankPlacementLowData)
1093 #endif //__nvoc_mem_mgr_h_disabled
1094
1095 #define memmgrGetBankPlacementData_HAL(pGpu, pMemoryManager, pBankPlacementLowData) memmgrGetBankPlacementData(pGpu, pMemoryManager, pBankPlacementLowData)
1096
1097 void memmgrDirtyForPmTest_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool partialDirty);
1098
1099
1100 #ifdef __nvoc_mem_mgr_h_disabled
memmgrDirtyForPmTest(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvBool partialDirty)1101 static inline void memmgrDirtyForPmTest(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool partialDirty) {
1102 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1103 }
1104 #else //__nvoc_mem_mgr_h_disabled
1105 #define memmgrDirtyForPmTest(pGpu, pMemoryManager, partialDirty) memmgrDirtyForPmTest_GM107(pGpu, pMemoryManager, partialDirty)
1106 #endif //__nvoc_mem_mgr_h_disabled
1107
1108 #define memmgrDirtyForPmTest_HAL(pGpu, pMemoryManager, partialDirty) memmgrDirtyForPmTest(pGpu, pMemoryManager, partialDirty)
1109
1110 NvU32 memmgrGetReservedHeapSizeMb_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1111
1112
1113 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetReservedHeapSizeMb(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1114 static inline NvU32 memmgrGetReservedHeapSizeMb(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1115 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1116 return 0;
1117 }
1118 #else //__nvoc_mem_mgr_h_disabled
1119 #define memmgrGetReservedHeapSizeMb(pGpu, pMemoryManager) memmgrGetReservedHeapSizeMb_GM107(pGpu, pMemoryManager)
1120 #endif //__nvoc_mem_mgr_h_disabled
1121
1122 #define memmgrGetReservedHeapSizeMb_HAL(pGpu, pMemoryManager) memmgrGetReservedHeapSizeMb(pGpu, pMemoryManager)
1123
1124 NV_STATUS memmgrInitFbRegionsHal_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1125
memmgrInitFbRegionsHal_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1126 static inline NV_STATUS memmgrInitFbRegionsHal_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1127 return NV_OK;
1128 }
1129
1130
1131 #ifdef __nvoc_mem_mgr_h_disabled
memmgrInitFbRegionsHal(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1132 static inline NV_STATUS memmgrInitFbRegionsHal(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1133 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1134 return NV_ERR_NOT_SUPPORTED;
1135 }
1136 #else //__nvoc_mem_mgr_h_disabled
1137 #define memmgrInitFbRegionsHal(pGpu, pMemoryManager) memmgrInitFbRegionsHal_56cd7a(pGpu, pMemoryManager)
1138 #endif //__nvoc_mem_mgr_h_disabled
1139
1140 #define memmgrInitFbRegionsHal_HAL(pGpu, pMemoryManager) memmgrInitFbRegionsHal(pGpu, pMemoryManager)
1141
1142 void memmgrHandleSizeOverrides_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1143
1144
1145 #ifdef __nvoc_mem_mgr_h_disabled
memmgrHandleSizeOverrides(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1146 static inline void memmgrHandleSizeOverrides(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1147 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1148 }
1149 #else //__nvoc_mem_mgr_h_disabled
1150 #define memmgrHandleSizeOverrides(pGpu, pMemoryManager) memmgrHandleSizeOverrides_GP100(pGpu, pMemoryManager)
1151 #endif //__nvoc_mem_mgr_h_disabled
1152
1153 #define memmgrHandleSizeOverrides_HAL(pGpu, pMemoryManager) memmgrHandleSizeOverrides(pGpu, pMemoryManager)
1154
1155 NV_STATUS memmgrFinishHandleSizeOverrides_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1156
1157
1158 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFinishHandleSizeOverrides(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1159 static inline NV_STATUS memmgrFinishHandleSizeOverrides(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1160 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1161 return NV_ERR_NOT_SUPPORTED;
1162 }
1163 #else //__nvoc_mem_mgr_h_disabled
1164 #define memmgrFinishHandleSizeOverrides(pGpu, pMemoryManager) memmgrFinishHandleSizeOverrides_GP100(pGpu, pMemoryManager)
1165 #endif //__nvoc_mem_mgr_h_disabled
1166
1167 #define memmgrFinishHandleSizeOverrides_HAL(pGpu, pMemoryManager) memmgrFinishHandleSizeOverrides(pGpu, pMemoryManager)
1168
1169 NV_STATUS memmgrGetBAR1InfoForDevice_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, PGETBAR1INFO bar1Info);
1170
1171
1172 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetBAR1InfoForDevice(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,struct Device * pDevice,PGETBAR1INFO bar1Info)1173 static inline NV_STATUS memmgrGetBAR1InfoForDevice(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, PGETBAR1INFO bar1Info) {
1174 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1175 return NV_ERR_NOT_SUPPORTED;
1176 }
1177 #else //__nvoc_mem_mgr_h_disabled
1178 #define memmgrGetBAR1InfoForDevice(pGpu, pMemoryManager, pDevice, bar1Info) memmgrGetBAR1InfoForDevice_GM107(pGpu, pMemoryManager, pDevice, bar1Info)
1179 #endif //__nvoc_mem_mgr_h_disabled
1180
1181 #define memmgrGetBAR1InfoForDevice_HAL(pGpu, pMemoryManager, pDevice, bar1Info) memmgrGetBAR1InfoForDevice(pGpu, pMemoryManager, pDevice, bar1Info)
1182
1183 NvU64 memmgrGetVgpuHostRmReservedFb_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 vgpuTypeId);
1184
1185 NvU64 memmgrGetVgpuHostRmReservedFb_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 vgpuTypeId);
1186
1187 NvU64 memmgrGetVgpuHostRmReservedFb_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 vgpuTypeId);
1188
1189
1190 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetVgpuHostRmReservedFb(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 vgpuTypeId)1191 static inline NvU64 memmgrGetVgpuHostRmReservedFb(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 vgpuTypeId) {
1192 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1193 return 0;
1194 }
1195 #else //__nvoc_mem_mgr_h_disabled
1196 #define memmgrGetVgpuHostRmReservedFb(pGpu, pMemoryManager, vgpuTypeId) memmgrGetVgpuHostRmReservedFb_KERNEL(pGpu, pMemoryManager, vgpuTypeId)
1197 #endif //__nvoc_mem_mgr_h_disabled
1198
1199 #define memmgrGetVgpuHostRmReservedFb_HAL(pGpu, pMemoryManager, vgpuTypeId) memmgrGetVgpuHostRmReservedFb(pGpu, pMemoryManager, vgpuTypeId)
1200
1201 NvU64 memmgrGetRsvdSizeForSr_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1202
1203
1204 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetRsvdSizeForSr(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1205 static inline NvU64 memmgrGetRsvdSizeForSr(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1206 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1207 return 0;
1208 }
1209 #else //__nvoc_mem_mgr_h_disabled
1210 #define memmgrGetRsvdSizeForSr(pGpu, pMemoryManager) memmgrGetRsvdSizeForSr_GM107(pGpu, pMemoryManager)
1211 #endif //__nvoc_mem_mgr_h_disabled
1212
1213 #define memmgrGetRsvdSizeForSr_HAL(pGpu, pMemoryManager) memmgrGetRsvdSizeForSr(pGpu, pMemoryManager)
1214
memmgrVerifyDepthSurfaceAttrs_cbe027(struct MemoryManager * pMemoryManager,NvU32 arg0,NvU32 arg1)1215 static inline NvBool memmgrVerifyDepthSurfaceAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1) {
1216 return ((NvBool)(0 == 0));
1217 }
1218
1219
1220 #ifdef __nvoc_mem_mgr_h_disabled
memmgrVerifyDepthSurfaceAttrs(struct MemoryManager * pMemoryManager,NvU32 arg0,NvU32 arg1)1221 static inline NvBool memmgrVerifyDepthSurfaceAttrs(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1) {
1222 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1223 return NV_FALSE;
1224 }
1225 #else //__nvoc_mem_mgr_h_disabled
1226 #define memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg0, arg1) memmgrVerifyDepthSurfaceAttrs_cbe027(pMemoryManager, arg0, arg1)
1227 #endif //__nvoc_mem_mgr_h_disabled
1228
1229 #define memmgrVerifyDepthSurfaceAttrs_HAL(pMemoryManager, arg0, arg1) memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg0, arg1)
1230
1231 NV_STATUS memmgrAllocMemToSaveVgaWorkspace_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1);
1232
memmgrAllocMemToSaveVgaWorkspace_46f6a7(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR ** arg0,MEMORY_DESCRIPTOR ** arg1)1233 static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1) {
1234 return NV_ERR_NOT_SUPPORTED;
1235 }
1236
memmgrAllocMemToSaveVgaWorkspace_5baef9(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR ** arg0,MEMORY_DESCRIPTOR ** arg1)1237 static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1) {
1238 NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
1239 }
1240
1241
1242 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAllocMemToSaveVgaWorkspace(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR ** arg0,MEMORY_DESCRIPTOR ** arg1)1243 static inline NV_STATUS memmgrAllocMemToSaveVgaWorkspace(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR **arg0, MEMORY_DESCRIPTOR **arg1) {
1244 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1245 return NV_ERR_NOT_SUPPORTED;
1246 }
1247 #else //__nvoc_mem_mgr_h_disabled
1248 #define memmgrAllocMemToSaveVgaWorkspace(pGpu, pMemoryManager, arg0, arg1) memmgrAllocMemToSaveVgaWorkspace_5baef9(pGpu, pMemoryManager, arg0, arg1)
1249 #endif //__nvoc_mem_mgr_h_disabled
1250
1251 #define memmgrAllocMemToSaveVgaWorkspace_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrAllocMemToSaveVgaWorkspace(pGpu, pMemoryManager, arg0, arg1)
1252
1253 NvBool memmgrComparePhysicalAddresses_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU64 arg3);
1254
1255
1256 #ifdef __nvoc_mem_mgr_h_disabled
memmgrComparePhysicalAddresses(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0,NvU64 arg1,NvU32 arg2,NvU64 arg3)1257 static inline NvBool memmgrComparePhysicalAddresses(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU64 arg3) {
1258 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1259 return NV_FALSE;
1260 }
1261 #else //__nvoc_mem_mgr_h_disabled
1262 #define memmgrComparePhysicalAddresses(pGpu, pMemoryManager, arg0, arg1, arg2, arg3) memmgrComparePhysicalAddresses_GM107(pGpu, pMemoryManager, arg0, arg1, arg2, arg3)
1263 #endif //__nvoc_mem_mgr_h_disabled
1264
1265 #define memmgrComparePhysicalAddresses_HAL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3) memmgrComparePhysicalAddresses(pGpu, pMemoryManager, arg0, arg1, arg2, arg3)
1266
1267 RmPhysAddr memmgrGetInvalidOffset_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1268
1269
1270 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetInvalidOffset(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1271 static inline RmPhysAddr memmgrGetInvalidOffset(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1272 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1273 RmPhysAddr ret;
1274 portMemSet(&ret, 0, sizeof(RmPhysAddr));
1275 return ret;
1276 }
1277 #else //__nvoc_mem_mgr_h_disabled
1278 #define memmgrGetInvalidOffset(pGpu, pMemoryManager) memmgrGetInvalidOffset_GM107(pGpu, pMemoryManager)
1279 #endif //__nvoc_mem_mgr_h_disabled
1280
1281 #define memmgrGetInvalidOffset_HAL(pGpu, pMemoryManager) memmgrGetInvalidOffset(pGpu, pMemoryManager)
1282
1283 NvU32 memmgrGetAddrSpaceSizeMB_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1284
1285
1286 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetAddrSpaceSizeMB(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1287 static inline NvU32 memmgrGetAddrSpaceSizeMB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1288 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1289 return 0;
1290 }
1291 #else //__nvoc_mem_mgr_h_disabled
1292 #define memmgrGetAddrSpaceSizeMB(pGpu, pMemoryManager) memmgrGetAddrSpaceSizeMB_GM107(pGpu, pMemoryManager)
1293 #endif //__nvoc_mem_mgr_h_disabled
1294
1295 #define memmgrGetAddrSpaceSizeMB_HAL(pGpu, pMemoryManager) memmgrGetAddrSpaceSizeMB(pGpu, pMemoryManager)
1296
1297 NvU32 memmgrGetUsableMemSizeMB_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1298
1299
1300 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetUsableMemSizeMB(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1301 static inline NvU32 memmgrGetUsableMemSizeMB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1302 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1303 return 0;
1304 }
1305 #else //__nvoc_mem_mgr_h_disabled
1306 #define memmgrGetUsableMemSizeMB(pGpu, pMemoryManager) memmgrGetUsableMemSizeMB_GM107(pGpu, pMemoryManager)
1307 #endif //__nvoc_mem_mgr_h_disabled
1308
1309 #define memmgrGetUsableMemSizeMB_HAL(pGpu, pMemoryManager) memmgrGetUsableMemSizeMB(pGpu, pMemoryManager)
1310
1311 NV_STATUS memmgrGetSurfacePhysAttr_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *pMemory, NvU64 *pOffset, NvU32 *pMemAperture, NvU32 *pMemKind, NvU32 *pComprOffset, NvU32 *pComprKind, NvU32 *pLineMin, NvU32 *pLineMax, NvU32 *pZCullId, NvU32 *pGpuCacheAttr, NvU32 *pGpuP2PCacheAttr, NvU64 *contigSegmentSize);
1312
1313
1314 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetSurfacePhysAttr(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,Memory * pMemory,NvU64 * pOffset,NvU32 * pMemAperture,NvU32 * pMemKind,NvU32 * pComprOffset,NvU32 * pComprKind,NvU32 * pLineMin,NvU32 * pLineMax,NvU32 * pZCullId,NvU32 * pGpuCacheAttr,NvU32 * pGpuP2PCacheAttr,NvU64 * contigSegmentSize)1315 static inline NV_STATUS memmgrGetSurfacePhysAttr(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, Memory *pMemory, NvU64 *pOffset, NvU32 *pMemAperture, NvU32 *pMemKind, NvU32 *pComprOffset, NvU32 *pComprKind, NvU32 *pLineMin, NvU32 *pLineMax, NvU32 *pZCullId, NvU32 *pGpuCacheAttr, NvU32 *pGpuP2PCacheAttr, NvU64 *contigSegmentSize) {
1316 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1317 return NV_ERR_NOT_SUPPORTED;
1318 }
1319 #else //__nvoc_mem_mgr_h_disabled
1320 #define memmgrGetSurfacePhysAttr(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize) memmgrGetSurfacePhysAttr_GM107(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize)
1321 #endif //__nvoc_mem_mgr_h_disabled
1322
1323 #define memmgrGetSurfacePhysAttr_HAL(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize) memmgrGetSurfacePhysAttr(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize)
1324
memmgrVerifyComprAttrs_cbe027(struct MemoryManager * pMemoryManager,NvU32 arg0,NvU32 arg1,NvU32 arg2)1325 static inline NvBool memmgrVerifyComprAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1, NvU32 arg2) {
1326 return ((NvBool)(0 == 0));
1327 }
1328
1329
1330 #ifdef __nvoc_mem_mgr_h_disabled
memmgrVerifyComprAttrs(struct MemoryManager * pMemoryManager,NvU32 arg0,NvU32 arg1,NvU32 arg2)1331 static inline NvBool memmgrVerifyComprAttrs(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 arg1, NvU32 arg2) {
1332 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1333 return NV_FALSE;
1334 }
1335 #else //__nvoc_mem_mgr_h_disabled
1336 #define memmgrVerifyComprAttrs(pMemoryManager, arg0, arg1, arg2) memmgrVerifyComprAttrs_cbe027(pMemoryManager, arg0, arg1, arg2)
1337 #endif //__nvoc_mem_mgr_h_disabled
1338
1339 #define memmgrVerifyComprAttrs_HAL(pMemoryManager, arg0, arg1, arg2) memmgrVerifyComprAttrs(pMemoryManager, arg0, arg1, arg2)
1340
1341 NvBool memmgrIsKindCompressible_TU102(struct MemoryManager *pMemoryManager, NvU32 arg0);
1342
1343
1344 #ifdef __nvoc_mem_mgr_h_disabled
memmgrIsKindCompressible(struct MemoryManager * pMemoryManager,NvU32 arg0)1345 static inline NvBool memmgrIsKindCompressible(struct MemoryManager *pMemoryManager, NvU32 arg0) {
1346 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1347 return NV_FALSE;
1348 }
1349 #else //__nvoc_mem_mgr_h_disabled
1350 #define memmgrIsKindCompressible(pMemoryManager, arg0) memmgrIsKindCompressible_TU102(pMemoryManager, arg0)
1351 #endif //__nvoc_mem_mgr_h_disabled
1352
1353 #define memmgrIsKindCompressible_HAL(pMemoryManager, arg0) memmgrIsKindCompressible(pMemoryManager, arg0)
1354
memmgrIsKindBlocklinear_491d52(struct MemoryManager * pMemoryManager,NvU32 arg0)1355 static inline NvBool memmgrIsKindBlocklinear_491d52(struct MemoryManager *pMemoryManager, NvU32 arg0) {
1356 return ((NvBool)(0 != 0));
1357 }
1358
1359
1360 #ifdef __nvoc_mem_mgr_h_disabled
memmgrIsKindBlocklinear(struct MemoryManager * pMemoryManager,NvU32 arg0)1361 static inline NvBool memmgrIsKindBlocklinear(struct MemoryManager *pMemoryManager, NvU32 arg0) {
1362 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1363 return NV_FALSE;
1364 }
1365 #else //__nvoc_mem_mgr_h_disabled
1366 #define memmgrIsKindBlocklinear(pMemoryManager, arg0) memmgrIsKindBlocklinear_491d52(pMemoryManager, arg0)
1367 #endif //__nvoc_mem_mgr_h_disabled
1368
1369 #define memmgrIsKindBlocklinear_HAL(pMemoryManager, arg0) memmgrIsKindBlocklinear(pMemoryManager, arg0)
1370
1371 NvU32 memmgrChooseKindZ_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0);
1372
1373
1374 #ifdef __nvoc_mem_mgr_h_disabled
memmgrChooseKindZ(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_PAGE_FORMAT * arg0)1375 static inline NvU32 memmgrChooseKindZ(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) {
1376 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1377 return 0;
1378 }
1379 #else //__nvoc_mem_mgr_h_disabled
1380 #define memmgrChooseKindZ(pGpu, pMemoryManager, arg0) memmgrChooseKindZ_TU102(pGpu, pMemoryManager, arg0)
1381 #endif //__nvoc_mem_mgr_h_disabled
1382
1383 #define memmgrChooseKindZ_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindZ(pGpu, pMemoryManager, arg0)
1384
1385 NvU32 memmgrChooseKindCompressZ_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0);
1386
1387
1388 #ifdef __nvoc_mem_mgr_h_disabled
memmgrChooseKindCompressZ(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_PAGE_FORMAT * arg0)1389 static inline NvU32 memmgrChooseKindCompressZ(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) {
1390 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1391 return 0;
1392 }
1393 #else //__nvoc_mem_mgr_h_disabled
1394 #define memmgrChooseKindCompressZ(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressZ_TU102(pGpu, pMemoryManager, arg0)
1395 #endif //__nvoc_mem_mgr_h_disabled
1396
1397 #define memmgrChooseKindCompressZ_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressZ(pGpu, pMemoryManager, arg0)
1398
memmgrChooseKindCompressCForMS2_4a4dee(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0)1399 static inline NvU32 memmgrChooseKindCompressCForMS2_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) {
1400 return 0;
1401 }
1402
1403
1404 #ifdef __nvoc_mem_mgr_h_disabled
memmgrChooseKindCompressCForMS2(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0)1405 static inline NvU32 memmgrChooseKindCompressCForMS2(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) {
1406 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1407 return 0;
1408 }
1409 #else //__nvoc_mem_mgr_h_disabled
1410 #define memmgrChooseKindCompressCForMS2(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressCForMS2_4a4dee(pGpu, pMemoryManager, arg0)
1411 #endif //__nvoc_mem_mgr_h_disabled
1412
1413 #define memmgrChooseKindCompressCForMS2_HAL(pGpu, pMemoryManager, arg0) memmgrChooseKindCompressCForMS2(pGpu, pMemoryManager, arg0)
1414
1415 NvU32 memmgrGetUncompressedKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 kind, NvBool releaseReacquire);
1416
1417
1418 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetUncompressedKind(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 kind,NvBool releaseReacquire)1419 static inline NvU32 memmgrGetUncompressedKind(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 kind, NvBool releaseReacquire) {
1420 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1421 return 0;
1422 }
1423 #else //__nvoc_mem_mgr_h_disabled
1424 #define memmgrGetUncompressedKind(pGpu, pMemoryManager, kind, releaseReacquire) memmgrGetUncompressedKind_TU102(pGpu, pMemoryManager, kind, releaseReacquire)
1425 #endif //__nvoc_mem_mgr_h_disabled
1426
1427 #define memmgrGetUncompressedKind_HAL(pGpu, pMemoryManager, kind, releaseReacquire) memmgrGetUncompressedKind(pGpu, pMemoryManager, kind, releaseReacquire)
1428
memmgrGetUncompressedKindForMS2_5baef9(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0,NvU32 * arg1)1429 static inline NV_STATUS memmgrGetUncompressedKindForMS2_5baef9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 *arg1) {
1430 NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
1431 }
1432
1433
1434 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetUncompressedKindForMS2(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0,NvU32 * arg1)1435 static inline NV_STATUS memmgrGetUncompressedKindForMS2(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvU32 *arg1) {
1436 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1437 return NV_ERR_NOT_SUPPORTED;
1438 }
1439 #else //__nvoc_mem_mgr_h_disabled
1440 #define memmgrGetUncompressedKindForMS2(pGpu, pMemoryManager, arg0, arg1) memmgrGetUncompressedKindForMS2_5baef9(pGpu, pMemoryManager, arg0, arg1)
1441 #endif //__nvoc_mem_mgr_h_disabled
1442
1443 #define memmgrGetUncompressedKindForMS2_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrGetUncompressedKindForMS2(pGpu, pMemoryManager, arg0, arg1)
1444
1445 NV_STATUS memmgrChooseKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0, NvU32 arg1, NvU32 *arg2);
1446
1447
1448 #ifdef __nvoc_mem_mgr_h_disabled
memmgrChooseKind(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_PAGE_FORMAT * arg0,NvU32 arg1,NvU32 * arg2)1449 static inline NV_STATUS memmgrChooseKind(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0, NvU32 arg1, NvU32 *arg2) {
1450 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1451 return NV_ERR_NOT_SUPPORTED;
1452 }
1453 #else //__nvoc_mem_mgr_h_disabled
1454 #define memmgrChooseKind(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrChooseKind_TU102(pGpu, pMemoryManager, arg0, arg1, arg2)
1455 #endif //__nvoc_mem_mgr_h_disabled
1456
1457 #define memmgrChooseKind_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrChooseKind(pGpu, pMemoryManager, arg0, arg1, arg2)
1458
1459 NvBool memmgrIsKind_TU102(struct MemoryManager *pMemoryManager, FB_IS_KIND_OP arg0, NvU32 arg1);
1460
1461
1462 #ifdef __nvoc_mem_mgr_h_disabled
memmgrIsKind(struct MemoryManager * pMemoryManager,FB_IS_KIND_OP arg0,NvU32 arg1)1463 static inline NvBool memmgrIsKind(struct MemoryManager *pMemoryManager, FB_IS_KIND_OP arg0, NvU32 arg1) {
1464 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1465 return NV_FALSE;
1466 }
1467 #else //__nvoc_mem_mgr_h_disabled
1468 #define memmgrIsKind(pMemoryManager, arg0, arg1) memmgrIsKind_TU102(pMemoryManager, arg0, arg1)
1469 #endif //__nvoc_mem_mgr_h_disabled
1470
1471 #define memmgrIsKind_HAL(pMemoryManager, arg0, arg1) memmgrIsKind(pMemoryManager, arg0, arg1)
1472
1473 NvU32 memmgrGetMessageKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1474
1475
1476 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetMessageKind(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1477 static inline NvU32 memmgrGetMessageKind(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1478 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1479 return 0;
1480 }
1481 #else //__nvoc_mem_mgr_h_disabled
1482 #define memmgrGetMessageKind(pGpu, pMemoryManager) memmgrGetMessageKind_TU102(pGpu, pMemoryManager)
1483 #endif //__nvoc_mem_mgr_h_disabled
1484
1485 #define memmgrGetMessageKind_HAL(pGpu, pMemoryManager) memmgrGetMessageKind(pGpu, pMemoryManager)
1486
1487 NvU32 memmgrGetDefaultPteKindForNoHandle_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1488
1489
1490 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetDefaultPteKindForNoHandle(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1491 static inline NvU32 memmgrGetDefaultPteKindForNoHandle(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1492 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1493 return 0;
1494 }
1495 #else //__nvoc_mem_mgr_h_disabled
1496 #define memmgrGetDefaultPteKindForNoHandle(pGpu, pMemoryManager) memmgrGetDefaultPteKindForNoHandle_TU102(pGpu, pMemoryManager)
1497 #endif //__nvoc_mem_mgr_h_disabled
1498
1499 #define memmgrGetDefaultPteKindForNoHandle_HAL(pGpu, pMemoryManager) memmgrGetDefaultPteKindForNoHandle(pGpu, pMemoryManager)
1500
1501 NvBool memmgrIsSurfaceBlockLinear_TU102(struct MemoryManager *pMemoryManager, Memory *arg0, NvU32 arg1, NvU32 arg2);
1502
1503
1504 #ifdef __nvoc_mem_mgr_h_disabled
memmgrIsSurfaceBlockLinear(struct MemoryManager * pMemoryManager,Memory * arg0,NvU32 arg1,NvU32 arg2)1505 static inline NvBool memmgrIsSurfaceBlockLinear(struct MemoryManager *pMemoryManager, Memory *arg0, NvU32 arg1, NvU32 arg2) {
1506 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1507 return NV_FALSE;
1508 }
1509 #else //__nvoc_mem_mgr_h_disabled
1510 #define memmgrIsSurfaceBlockLinear(pMemoryManager, arg0, arg1, arg2) memmgrIsSurfaceBlockLinear_TU102(pMemoryManager, arg0, arg1, arg2)
1511 #endif //__nvoc_mem_mgr_h_disabled
1512
1513 #define memmgrIsSurfaceBlockLinear_HAL(pMemoryManager, arg0, arg1, arg2) memmgrIsSurfaceBlockLinear(pMemoryManager, arg0, arg1, arg2)
1514
1515 NvU32 memmgrGetHwPteKindFromSwPteKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 pteKind);
1516
1517
1518 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetHwPteKindFromSwPteKind(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 pteKind)1519 static inline NvU32 memmgrGetHwPteKindFromSwPteKind(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 pteKind) {
1520 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1521 return 0;
1522 }
1523 #else //__nvoc_mem_mgr_h_disabled
1524 #define memmgrGetHwPteKindFromSwPteKind(pGpu, pMemoryManager, pteKind) memmgrGetHwPteKindFromSwPteKind_TU102(pGpu, pMemoryManager, pteKind)
1525 #endif //__nvoc_mem_mgr_h_disabled
1526
1527 #define memmgrGetHwPteKindFromSwPteKind_HAL(pGpu, pMemoryManager, pteKind) memmgrGetHwPteKindFromSwPteKind(pGpu, pMemoryManager, pteKind)
1528
1529 NvU32 memmgrGetSwPteKindFromHwPteKind_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 pteKind);
1530
1531
1532 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetSwPteKindFromHwPteKind(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 pteKind)1533 static inline NvU32 memmgrGetSwPteKindFromHwPteKind(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 pteKind) {
1534 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1535 return 0;
1536 }
1537 #else //__nvoc_mem_mgr_h_disabled
1538 #define memmgrGetSwPteKindFromHwPteKind(pGpu, pMemoryManager, pteKind) memmgrGetSwPteKindFromHwPteKind_TU102(pGpu, pMemoryManager, pteKind)
1539 #endif //__nvoc_mem_mgr_h_disabled
1540
1541 #define memmgrGetSwPteKindFromHwPteKind_HAL(pGpu, pMemoryManager, pteKind) memmgrGetSwPteKindFromHwPteKind(pGpu, pMemoryManager, pteKind)
1542
1543 void memmgrGetPteKindForScrubber_TU102(struct MemoryManager *pMemoryManager, NvU32 *arg0);
1544
1545
1546 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetPteKindForScrubber(struct MemoryManager * pMemoryManager,NvU32 * arg0)1547 static inline void memmgrGetPteKindForScrubber(struct MemoryManager *pMemoryManager, NvU32 *arg0) {
1548 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1549 }
1550 #else //__nvoc_mem_mgr_h_disabled
1551 #define memmgrGetPteKindForScrubber(pMemoryManager, arg0) memmgrGetPteKindForScrubber_TU102(pMemoryManager, arg0)
1552 #endif //__nvoc_mem_mgr_h_disabled
1553
1554 #define memmgrGetPteKindForScrubber_HAL(pMemoryManager, arg0) memmgrGetPteKindForScrubber(pMemoryManager, arg0)
1555
1556 NvU32 memmgrGetCtagOffsetFromParams_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0);
1557
1558
1559 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetCtagOffsetFromParams(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_INFO * arg0)1560 static inline NvU32 memmgrGetCtagOffsetFromParams(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0) {
1561 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1562 return 0;
1563 }
1564 #else //__nvoc_mem_mgr_h_disabled
1565 #define memmgrGetCtagOffsetFromParams(pGpu, pMemoryManager, arg0) memmgrGetCtagOffsetFromParams_TU102(pGpu, pMemoryManager, arg0)
1566 #endif //__nvoc_mem_mgr_h_disabled
1567
1568 #define memmgrGetCtagOffsetFromParams_HAL(pGpu, pMemoryManager, arg0) memmgrGetCtagOffsetFromParams(pGpu, pMemoryManager, arg0)
1569
1570 void memmgrSetCtagOffsetInParams_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0, NvU32 arg1);
1571
1572
1573 #ifdef __nvoc_mem_mgr_h_disabled
memmgrSetCtagOffsetInParams(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_INFO * arg0,NvU32 arg1)1574 static inline void memmgrSetCtagOffsetInParams(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0, NvU32 arg1) {
1575 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1576 }
1577 #else //__nvoc_mem_mgr_h_disabled
1578 #define memmgrSetCtagOffsetInParams(pGpu, pMemoryManager, arg0, arg1) memmgrSetCtagOffsetInParams_TU102(pGpu, pMemoryManager, arg0, arg1)
1579 #endif //__nvoc_mem_mgr_h_disabled
1580
1581 #define memmgrSetCtagOffsetInParams_HAL(pGpu, pMemoryManager, arg0, arg1) memmgrSetCtagOffsetInParams(pGpu, pMemoryManager, arg0, arg1)
1582
memmgrChannelPushSemaphoreMethodsBlock_f2d351(struct MemoryManager * pMemoryManager,NvU32 arg0,NvU64 arg1,NvU32 arg2,NvU32 ** arg3)1583 static inline void memmgrChannelPushSemaphoreMethodsBlock_f2d351(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU32 **arg3) {
1584 NV_ASSERT_PRECOMP(0);
1585 }
1586
1587
1588 #ifdef __nvoc_mem_mgr_h_disabled
memmgrChannelPushSemaphoreMethodsBlock(struct MemoryManager * pMemoryManager,NvU32 arg0,NvU64 arg1,NvU32 arg2,NvU32 ** arg3)1589 static inline void memmgrChannelPushSemaphoreMethodsBlock(struct MemoryManager *pMemoryManager, NvU32 arg0, NvU64 arg1, NvU32 arg2, NvU32 **arg3) {
1590 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1591 }
1592 #else //__nvoc_mem_mgr_h_disabled
1593 #define memmgrChannelPushSemaphoreMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushSemaphoreMethodsBlock_f2d351(pMemoryManager, arg0, arg1, arg2, arg3)
1594 #endif //__nvoc_mem_mgr_h_disabled
1595
1596 #define memmgrChannelPushSemaphoreMethodsBlock_HAL(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushSemaphoreMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3)
1597
memmgrChannelPushAddressMethodsBlock_f2d351(struct MemoryManager * pMemoryManager,NvBool arg0,NvU32 arg1,RmPhysAddr arg2,NvU32 ** arg3)1598 static inline void memmgrChannelPushAddressMethodsBlock_f2d351(struct MemoryManager *pMemoryManager, NvBool arg0, NvU32 arg1, RmPhysAddr arg2, NvU32 **arg3) {
1599 NV_ASSERT_PRECOMP(0);
1600 }
1601
1602
1603 #ifdef __nvoc_mem_mgr_h_disabled
memmgrChannelPushAddressMethodsBlock(struct MemoryManager * pMemoryManager,NvBool arg0,NvU32 arg1,RmPhysAddr arg2,NvU32 ** arg3)1604 static inline void memmgrChannelPushAddressMethodsBlock(struct MemoryManager *pMemoryManager, NvBool arg0, NvU32 arg1, RmPhysAddr arg2, NvU32 **arg3) {
1605 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1606 }
1607 #else //__nvoc_mem_mgr_h_disabled
1608 #define memmgrChannelPushAddressMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushAddressMethodsBlock_f2d351(pMemoryManager, arg0, arg1, arg2, arg3)
1609 #endif //__nvoc_mem_mgr_h_disabled
1610
1611 #define memmgrChannelPushAddressMethodsBlock_HAL(pMemoryManager, arg0, arg1, arg2, arg3) memmgrChannelPushAddressMethodsBlock(pMemoryManager, arg0, arg1, arg2, arg3)
1612
1613 NV_STATUS memmgrScrubMapDoorbellRegion_GV100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0);
1614
1615
1616 #ifdef __nvoc_mem_mgr_h_disabled
memmgrScrubMapDoorbellRegion(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)1617 static inline NV_STATUS memmgrScrubMapDoorbellRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
1618 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1619 return NV_ERR_NOT_SUPPORTED;
1620 }
1621 #else //__nvoc_mem_mgr_h_disabled
1622 #define memmgrScrubMapDoorbellRegion(pGpu, pMemoryManager, arg0) memmgrScrubMapDoorbellRegion_GV100(pGpu, pMemoryManager, arg0)
1623 #endif //__nvoc_mem_mgr_h_disabled
1624
1625 #define memmgrScrubMapDoorbellRegion_HAL(pGpu, pMemoryManager, arg0) memmgrScrubMapDoorbellRegion(pGpu, pMemoryManager, arg0)
1626
1627 NV_STATUS memmgrSetAllocParameters_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo);
1628
1629
1630 #ifdef __nvoc_mem_mgr_h_disabled
memmgrSetAllocParameters(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_INFO * pFbAllocInfo)1631 static inline NV_STATUS memmgrSetAllocParameters(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *pFbAllocInfo) {
1632 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1633 return NV_ERR_NOT_SUPPORTED;
1634 }
1635 #else //__nvoc_mem_mgr_h_disabled
1636 #define memmgrSetAllocParameters(pGpu, pMemoryManager, pFbAllocInfo) memmgrSetAllocParameters_GM107(pGpu, pMemoryManager, pFbAllocInfo)
1637 #endif //__nvoc_mem_mgr_h_disabled
1638
1639 #define memmgrSetAllocParameters_HAL(pGpu, pMemoryManager, pFbAllocInfo) memmgrSetAllocParameters(pGpu, pMemoryManager, pFbAllocInfo)
1640
1641 void memmgrCalcReservedFbSpaceForUVM_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0);
1642
1643
1644 #ifdef __nvoc_mem_mgr_h_disabled
memmgrCalcReservedFbSpaceForUVM(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * arg0)1645 static inline void memmgrCalcReservedFbSpaceForUVM(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0) {
1646 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1647 }
1648 #else //__nvoc_mem_mgr_h_disabled
1649 #define memmgrCalcReservedFbSpaceForUVM(pGpu, pMemoryManager, arg0) memmgrCalcReservedFbSpaceForUVM_GM107(pGpu, pMemoryManager, arg0)
1650 #endif //__nvoc_mem_mgr_h_disabled
1651
1652 #define memmgrCalcReservedFbSpaceForUVM_HAL(pGpu, pMemoryManager, arg0) memmgrCalcReservedFbSpaceForUVM(pGpu, pMemoryManager, arg0)
1653
1654 void memmgrCalcReservedFbSpaceHal_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvU64 *arg2);
1655
1656
1657 #ifdef __nvoc_mem_mgr_h_disabled
memmgrCalcReservedFbSpaceHal(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * arg0,NvU64 * arg1,NvU64 * arg2)1658 static inline void memmgrCalcReservedFbSpaceHal(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0, NvU64 *arg1, NvU64 *arg2) {
1659 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1660 }
1661 #else //__nvoc_mem_mgr_h_disabled
1662 #define memmgrCalcReservedFbSpaceHal(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrCalcReservedFbSpaceHal_GM107(pGpu, pMemoryManager, arg0, arg1, arg2)
1663 #endif //__nvoc_mem_mgr_h_disabled
1664
1665 #define memmgrCalcReservedFbSpaceHal_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrCalcReservedFbSpaceHal(pGpu, pMemoryManager, arg0, arg1, arg2)
1666
1667 NV_STATUS memmgrInitReservedMemory_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0);
1668
1669
1670 #ifdef __nvoc_mem_mgr_h_disabled
memmgrInitReservedMemory(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 arg0)1671 static inline NV_STATUS memmgrInitReservedMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0) {
1672 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1673 return NV_ERR_NOT_SUPPORTED;
1674 }
1675 #else //__nvoc_mem_mgr_h_disabled
1676 #define memmgrInitReservedMemory(pGpu, pMemoryManager, arg0) memmgrInitReservedMemory_GM107(pGpu, pMemoryManager, arg0)
1677 #endif //__nvoc_mem_mgr_h_disabled
1678
1679 #define memmgrInitReservedMemory_HAL(pGpu, pMemoryManager, arg0) memmgrInitReservedMemory(pGpu, pMemoryManager, arg0)
1680
1681 NV_STATUS memmgrPreInitReservedMemory_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1682
1683
1684 #ifdef __nvoc_mem_mgr_h_disabled
memmgrPreInitReservedMemory(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1685 static inline NV_STATUS memmgrPreInitReservedMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1686 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1687 return NV_ERR_NOT_SUPPORTED;
1688 }
1689 #else //__nvoc_mem_mgr_h_disabled
1690 #define memmgrPreInitReservedMemory(pGpu, pMemoryManager) memmgrPreInitReservedMemory_GM107(pGpu, pMemoryManager)
1691 #endif //__nvoc_mem_mgr_h_disabled
1692
1693 #define memmgrPreInitReservedMemory_HAL(pGpu, pMemoryManager) memmgrPreInitReservedMemory(pGpu, pMemoryManager)
1694
1695 NV_STATUS memmgrSetMemDescPageSize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, RM_ATTR_PAGE_SIZE arg2);
1696
1697
1698 #ifdef __nvoc_mem_mgr_h_disabled
memmgrSetMemDescPageSize(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,PMEMORY_DESCRIPTOR arg0,ADDRESS_TRANSLATION arg1,RM_ATTR_PAGE_SIZE arg2)1699 static inline NV_STATUS memmgrSetMemDescPageSize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, RM_ATTR_PAGE_SIZE arg2) {
1700 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1701 return NV_ERR_NOT_SUPPORTED;
1702 }
1703 #else //__nvoc_mem_mgr_h_disabled
1704 #define memmgrSetMemDescPageSize(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrSetMemDescPageSize_GM107(pGpu, pMemoryManager, arg0, arg1, arg2)
1705 #endif //__nvoc_mem_mgr_h_disabled
1706
1707 #define memmgrSetMemDescPageSize_HAL(pGpu, pMemoryManager, arg0, arg1, arg2) memmgrSetMemDescPageSize(pGpu, pMemoryManager, arg0, arg1, arg2)
1708
1709 NV_STATUS memmgrGetBlackListPagesForHeap_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *pHeap);
1710
1711
1712 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetBlackListPagesForHeap(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,struct Heap * pHeap)1713 static inline NV_STATUS memmgrGetBlackListPagesForHeap(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *pHeap) {
1714 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1715 return NV_ERR_NOT_SUPPORTED;
1716 }
1717 #else //__nvoc_mem_mgr_h_disabled
1718 #define memmgrGetBlackListPagesForHeap(pGpu, pMemoryManager, pHeap) memmgrGetBlackListPagesForHeap_GM107(pGpu, pMemoryManager, pHeap)
1719 #endif //__nvoc_mem_mgr_h_disabled
1720
1721 #define memmgrGetBlackListPagesForHeap_HAL(pGpu, pMemoryManager, pHeap) memmgrGetBlackListPagesForHeap(pGpu, pMemoryManager, pHeap)
1722
1723 NvU32 memmgrGetFBEndReserveSizeEstimate_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1724
1725
1726 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetFBEndReserveSizeEstimate(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1727 static inline NvU32 memmgrGetFBEndReserveSizeEstimate(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1728 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1729 return 0;
1730 }
1731 #else //__nvoc_mem_mgr_h_disabled
1732 #define memmgrGetFBEndReserveSizeEstimate(pGpu, pMemoryManager) memmgrGetFBEndReserveSizeEstimate_GM107(pGpu, pMemoryManager)
1733 #endif //__nvoc_mem_mgr_h_disabled
1734
1735 #define memmgrGetFBEndReserveSizeEstimate_HAL(pGpu, pMemoryManager) memmgrGetFBEndReserveSizeEstimate(pGpu, pMemoryManager)
1736
memmgrReserveMemoryForPmu_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1737 static inline NV_STATUS memmgrReserveMemoryForPmu_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1738 return NV_OK;
1739 }
1740
1741
1742 #ifdef __nvoc_mem_mgr_h_disabled
memmgrReserveMemoryForPmu(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1743 static inline NV_STATUS memmgrReserveMemoryForPmu(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1744 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1745 return NV_ERR_NOT_SUPPORTED;
1746 }
1747 #else //__nvoc_mem_mgr_h_disabled
1748 #define memmgrReserveMemoryForPmu(pGpu, pMemoryManager) memmgrReserveMemoryForPmu_56cd7a(pGpu, pMemoryManager)
1749 #endif //__nvoc_mem_mgr_h_disabled
1750
1751 #define memmgrReserveMemoryForPmu_HAL(pGpu, pMemoryManager) memmgrReserveMemoryForPmu(pGpu, pMemoryManager)
1752
1753 void memmgrFreeFbsrMemory_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1754
1755
1756 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFreeFbsrMemory(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1757 static inline void memmgrFreeFbsrMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1758 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1759 }
1760 #else //__nvoc_mem_mgr_h_disabled
1761 #define memmgrFreeFbsrMemory(pGpu, pMemoryManager) memmgrFreeFbsrMemory_KERNEL(pGpu, pMemoryManager)
1762 #endif //__nvoc_mem_mgr_h_disabled
1763
1764 #define memmgrFreeFbsrMemory_HAL(pGpu, pMemoryManager) memmgrFreeFbsrMemory(pGpu, pMemoryManager)
1765
memmgrReserveVgaWorkspaceMemDescForFbsr_46f6a7(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1766 static inline NV_STATUS memmgrReserveVgaWorkspaceMemDescForFbsr_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1767 return NV_ERR_NOT_SUPPORTED;
1768 }
1769
1770 NV_STATUS memmgrReserveVgaWorkspaceMemDescForFbsr_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1771
1772
1773 #ifdef __nvoc_mem_mgr_h_disabled
memmgrReserveVgaWorkspaceMemDescForFbsr(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1774 static inline NV_STATUS memmgrReserveVgaWorkspaceMemDescForFbsr(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1775 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1776 return NV_ERR_NOT_SUPPORTED;
1777 }
1778 #else //__nvoc_mem_mgr_h_disabled
1779 #define memmgrReserveVgaWorkspaceMemDescForFbsr(pGpu, pMemoryManager) memmgrReserveVgaWorkspaceMemDescForFbsr_46f6a7(pGpu, pMemoryManager)
1780 #endif //__nvoc_mem_mgr_h_disabled
1781
1782 #define memmgrReserveVgaWorkspaceMemDescForFbsr_HAL(pGpu, pMemoryManager) memmgrReserveVgaWorkspaceMemDescForFbsr(pGpu, pMemoryManager)
1783
memmgrCalculateHeapOffsetWithGSP_46f6a7(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 * offset)1784 static inline NV_STATUS memmgrCalculateHeapOffsetWithGSP_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *offset) {
1785 return NV_ERR_NOT_SUPPORTED;
1786 }
1787
1788
1789 #ifdef __nvoc_mem_mgr_h_disabled
memmgrCalculateHeapOffsetWithGSP(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 * offset)1790 static inline NV_STATUS memmgrCalculateHeapOffsetWithGSP(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *offset) {
1791 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1792 return NV_ERR_NOT_SUPPORTED;
1793 }
1794 #else //__nvoc_mem_mgr_h_disabled
1795 #define memmgrCalculateHeapOffsetWithGSP(pGpu, pMemoryManager, offset) memmgrCalculateHeapOffsetWithGSP_46f6a7(pGpu, pMemoryManager, offset)
1796 #endif //__nvoc_mem_mgr_h_disabled
1797
1798 #define memmgrCalculateHeapOffsetWithGSP_HAL(pGpu, pMemoryManager, offset) memmgrCalculateHeapOffsetWithGSP(pGpu, pMemoryManager, offset)
1799
1800 NvBool memmgrIsGspOwnedMemory_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc);
1801
1802
1803 #ifdef __nvoc_mem_mgr_h_disabled
memmgrIsGspOwnedMemory(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * pMemDesc)1804 static inline NvBool memmgrIsGspOwnedMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc) {
1805 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
1806 return NV_FALSE;
1807 }
1808 #else //__nvoc_mem_mgr_h_disabled
1809 #define memmgrIsGspOwnedMemory(pGpu, pMemoryManager, pMemDesc) memmgrIsGspOwnedMemory_KERNEL(pGpu, pMemoryManager, pMemDesc)
1810 #endif //__nvoc_mem_mgr_h_disabled
1811
1812 #define memmgrIsGspOwnedMemory_HAL(pGpu, pMemoryManager, pMemDesc) memmgrIsGspOwnedMemory(pGpu, pMemoryManager, pMemDesc)
1813
1814 NV_STATUS memmgrConstructEngine_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, ENGDESCRIPTOR arg0);
1815
memmgrConstructEngine_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,ENGDESCRIPTOR arg0)1816 static inline NV_STATUS memmgrConstructEngine_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, ENGDESCRIPTOR arg0) {
1817 return pMemoryManager->__memmgrConstructEngine__(pGpu, pMemoryManager, arg0);
1818 }
1819
1820 NV_STATUS memmgrStatePreInitLocked_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1821
memmgrStatePreInitLocked_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1822 static inline NV_STATUS memmgrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1823 return pMemoryManager->__memmgrStatePreInitLocked__(pGpu, pMemoryManager);
1824 }
1825
1826 NV_STATUS memmgrStateInitLocked_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1827
memmgrStateInitLocked_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1828 static inline NV_STATUS memmgrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1829 return pMemoryManager->__memmgrStateInitLocked__(pGpu, pMemoryManager);
1830 }
1831
1832 NV_STATUS memmgrStateLoad_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0);
1833
memmgrStateLoad_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0)1834 static inline NV_STATUS memmgrStateLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) {
1835 return pMemoryManager->__memmgrStateLoad__(pGpu, pMemoryManager, arg0);
1836 }
1837
1838 NV_STATUS memmgrStatePostLoad_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0);
1839
memmgrStatePostLoad_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0)1840 static inline NV_STATUS memmgrStatePostLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) {
1841 return pMemoryManager->__memmgrStatePostLoad__(pGpu, pMemoryManager, arg0);
1842 }
1843
1844 NV_STATUS memmgrStatePreUnload_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0);
1845
memmgrStatePreUnload_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0)1846 static inline NV_STATUS memmgrStatePreUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) {
1847 return pMemoryManager->__memmgrStatePreUnload__(pGpu, pMemoryManager, arg0);
1848 }
1849
1850 NV_STATUS memmgrStateUnload_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0);
1851
memmgrStateUnload_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0)1852 static inline NV_STATUS memmgrStateUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0) {
1853 return pMemoryManager->__memmgrStateUnload__(pGpu, pMemoryManager, arg0);
1854 }
1855
1856 void memmgrStateDestroy_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1857
memmgrStateDestroy_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1858 static inline void memmgrStateDestroy_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1859 pMemoryManager->__memmgrStateDestroy__(pGpu, pMemoryManager);
1860 }
1861
memmgrAllocateConsoleRegion_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_REGION_DESCRIPTOR * arg0)1862 static inline NV_STATUS memmgrAllocateConsoleRegion_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) {
1863 return NV_OK;
1864 }
1865
1866 NV_STATUS memmgrAllocateConsoleRegion_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0);
1867
memmgrAllocateConsoleRegion_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_REGION_DESCRIPTOR * arg0)1868 static inline NV_STATUS memmgrAllocateConsoleRegion_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg0) {
1869 return pMemoryManager->__memmgrAllocateConsoleRegion__(pGpu, pMemoryManager, arg0);
1870 }
1871
1872 NV_STATUS memmgrMemUtilsSec2CtxInit_GH100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0);
1873
memmgrMemUtilsSec2CtxInit_46f6a7(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)1874 static inline NV_STATUS memmgrMemUtilsSec2CtxInit_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
1875 return NV_ERR_NOT_SUPPORTED;
1876 }
1877
memmgrMemUtilsSec2CtxInit_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)1878 static inline NV_STATUS memmgrMemUtilsSec2CtxInit_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
1879 return pMemoryManager->__memmgrMemUtilsSec2CtxInit__(pGpu, pMemoryManager, arg0);
1880 }
1881
1882 NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_GH100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvBool arg1, RmPhysAddr arg2, NvU32 arg3, NV_ADDRESS_SPACE arg4);
1883
memmgrMemUtilsCheckMemoryFastScrubEnable_491d52(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0,NvBool arg1,RmPhysAddr arg2,NvU32 arg3,NV_ADDRESS_SPACE arg4)1884 static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_491d52(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvBool arg1, RmPhysAddr arg2, NvU32 arg3, NV_ADDRESS_SPACE arg4) {
1885 return ((NvBool)(0 != 0));
1886 }
1887
memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 arg0,NvBool arg1,RmPhysAddr arg2,NvU32 arg3,NV_ADDRESS_SPACE arg4)1888 static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg0, NvBool arg1, RmPhysAddr arg2, NvU32 arg3, NV_ADDRESS_SPACE arg4) {
1889 return pMemoryManager->__memmgrMemUtilsCheckMemoryFastScrubEnable__(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4);
1890 }
1891
1892 NV_STATUS memmgrAllocDetermineAlignment_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment);
1893
1894 NV_STATUS memmgrAllocDetermineAlignment_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment);
1895
memmgrAllocDetermineAlignment_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * pMemSize,NvU64 * pAlign,NvU64 alignPad,NvU32 allocFlags,NvU32 retAttr,NvU32 retAttr2,NvU64 hwAlignment)1896 static inline NV_STATUS memmgrAllocDetermineAlignment_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment) {
1897 return pMemoryManager->__memmgrAllocDetermineAlignment__(pGpu, pMemoryManager, pMemSize, pAlign, alignPad, allocFlags, retAttr, retAttr2, hwAlignment);
1898 }
1899
1900 NvU64 memmgrGetMaxContextSize_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1901
1902 NvU64 memmgrGetMaxContextSize_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1903
1904 NvU64 memmgrGetMaxContextSize_AD102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1905
memmgrGetMaxContextSize_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1906 static inline NvU64 memmgrGetMaxContextSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1907 return pMemoryManager->__memmgrGetMaxContextSize__(pGpu, pMemoryManager);
1908 }
1909
1910 NvU64 memmgrGetFbTaxSize_VGPUSTUB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1911
memmgrGetFbTaxSize_4a4dee(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1912 static inline NvU64 memmgrGetFbTaxSize_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1913 return 0;
1914 }
1915
memmgrGetFbTaxSize_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1916 static inline NvU64 memmgrGetFbTaxSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1917 return pMemoryManager->__memmgrGetFbTaxSize__(pGpu, pMemoryManager);
1918 }
1919
1920 void memmgrScrubRegistryOverrides_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1921
1922 void memmgrScrubRegistryOverrides_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1923
memmgrScrubRegistryOverrides_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1924 static inline void memmgrScrubRegistryOverrides_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1925 pMemoryManager->__memmgrScrubRegistryOverrides__(pGpu, pMemoryManager);
1926 }
1927
1928 NvU32 memmgrGetPteKindBl_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1929
memmgrGetPteKindBl_474d46(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1930 static inline NvU32 memmgrGetPteKindBl_474d46(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1931 NV_ASSERT_OR_RETURN_PRECOMP(0, 0);
1932 }
1933
memmgrGetPteKindBl_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1934 static inline NvU32 memmgrGetPteKindBl_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1935 return pMemoryManager->__memmgrGetPteKindBl__(pGpu, pMemoryManager);
1936 }
1937
1938 NvU32 memmgrGetPteKindPitch_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1939
memmgrGetPteKindPitch_474d46(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1940 static inline NvU32 memmgrGetPteKindPitch_474d46(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1941 NV_ASSERT_OR_RETURN_PRECOMP(0, 0);
1942 }
1943
memmgrGetPteKindPitch_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1944 static inline NvU32 memmgrGetPteKindPitch_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1945 return pMemoryManager->__memmgrGetPteKindPitch__(pGpu, pMemoryManager);
1946 }
1947
1948 NvU32 memmgrChooseKindCompressC_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0);
1949
memmgrChooseKindCompressC_474d46(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_PAGE_FORMAT * arg0)1950 static inline NvU32 memmgrChooseKindCompressC_474d46(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) {
1951 NV_ASSERT_OR_RETURN_PRECOMP(0, 0);
1952 }
1953
memmgrChooseKindCompressC_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_PAGE_FORMAT * arg0)1954 static inline NvU32 memmgrChooseKindCompressC_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_PAGE_FORMAT *arg0) {
1955 return pMemoryManager->__memmgrChooseKindCompressC__(pGpu, pMemoryManager, arg0);
1956 }
1957
1958 NV_STATUS memmgrGetFlaKind_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg0);
1959
memmgrGetFlaKind_46f6a7(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 * arg0)1960 static inline NV_STATUS memmgrGetFlaKind_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg0) {
1961 return NV_ERR_NOT_SUPPORTED;
1962 }
1963
memmgrGetFlaKind_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 * arg0)1964 static inline NV_STATUS memmgrGetFlaKind_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 *arg0) {
1965 return pMemoryManager->__memmgrGetFlaKind__(pGpu, pMemoryManager, arg0);
1966 }
1967
1968 NvBool memmgrIsMemDescSupportedByFla_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc);
1969
memmgrIsMemDescSupportedByFla_46f6a7(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * pMemDesc)1970 static inline NvBool memmgrIsMemDescSupportedByFla_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc) {
1971 return NV_ERR_NOT_SUPPORTED;
1972 }
1973
memmgrIsMemDescSupportedByFla_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * pMemDesc)1974 static inline NvBool memmgrIsMemDescSupportedByFla_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc) {
1975 return pMemoryManager->__memmgrIsMemDescSupportedByFla__(pGpu, pMemoryManager, pMemDesc);
1976 }
1977
1978 NvU32 memmgrDetermineComptag_TU102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0);
1979
memmgrDetermineComptag_13cd8d(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,RmPhysAddr arg0)1980 static inline NvU32 memmgrDetermineComptag_13cd8d(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0) {
1981 NV_ASSERT_PRECOMP(0);
1982 return 0;
1983 }
1984
memmgrDetermineComptag_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,RmPhysAddr arg0)1985 static inline NvU32 memmgrDetermineComptag_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr arg0) {
1986 return pMemoryManager->__memmgrDetermineComptag__(pGpu, pMemoryManager, arg0);
1987 }
1988
1989 NvU32 memmgrGetGrHeapReservationSize_VGPUSTUB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1990
memmgrGetGrHeapReservationSize_4a4dee(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1991 static inline NvU32 memmgrGetGrHeapReservationSize_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1992 return 0;
1993 }
1994
1995 NvU32 memmgrGetGrHeapReservationSize_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
1996
memmgrGetGrHeapReservationSize_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)1997 static inline NvU32 memmgrGetGrHeapReservationSize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
1998 return pMemoryManager->__memmgrGetGrHeapReservationSize__(pGpu, pMemoryManager);
1999 }
2000
memmgrGetRunlistEntriesReservedFbSpace_4a4dee(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2001 static inline NvU32 memmgrGetRunlistEntriesReservedFbSpace_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2002 return 0;
2003 }
2004
2005 NvU32 memmgrGetRunlistEntriesReservedFbSpace_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2006
memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2007 static inline NvU32 memmgrGetRunlistEntriesReservedFbSpace_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2008 return pMemoryManager->__memmgrGetRunlistEntriesReservedFbSpace__(pGpu, pMemoryManager);
2009 }
2010
memmgrGetUserdReservedFbSpace_4a4dee(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2011 static inline NvU32 memmgrGetUserdReservedFbSpace_4a4dee(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2012 return 0;
2013 }
2014
2015 NvU32 memmgrGetUserdReservedFbSpace_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2016
memmgrGetUserdReservedFbSpace_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2017 static inline NvU32 memmgrGetUserdReservedFbSpace_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2018 return pMemoryManager->__memmgrGetUserdReservedFbSpace__(pGpu, pMemoryManager);
2019 }
2020
2021 NV_STATUS memmgrCheckReservedMemorySize_GK104(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2022
memmgrCheckReservedMemorySize_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2023 static inline NV_STATUS memmgrCheckReservedMemorySize_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2024 return NV_OK;
2025 }
2026
memmgrCheckReservedMemorySize_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2027 static inline NV_STATUS memmgrCheckReservedMemorySize_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2028 return pMemoryManager->__memmgrCheckReservedMemorySize__(pGpu, pMemoryManager);
2029 }
2030
2031 NV_STATUS memmgrReadMmuLock_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi);
2032
memmgrReadMmuLock_e133c0(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvBool * pbIsValid,NvU64 * pMmuLockLo,NvU64 * pMmuLockHi)2033 static inline NV_STATUS memmgrReadMmuLock_e133c0(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi) {
2034 *pbIsValid = ((NvBool)(0 != 0));
2035 return NV_OK;
2036 }
2037
memmgrReadMmuLock_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvBool * pbIsValid,NvU64 * pMmuLockLo,NvU64 * pMmuLockHi)2038 static inline NV_STATUS memmgrReadMmuLock_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi) {
2039 return pMemoryManager->__memmgrReadMmuLock__(pGpu, pMemoryManager, pbIsValid, pMmuLockLo, pMmuLockHi);
2040 }
2041
2042 NV_STATUS memmgrBlockMemLockedMemory_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2043
memmgrBlockMemLockedMemory_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2044 static inline NV_STATUS memmgrBlockMemLockedMemory_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2045 return NV_OK;
2046 }
2047
memmgrBlockMemLockedMemory_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2048 static inline NV_STATUS memmgrBlockMemLockedMemory_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2049 return pMemoryManager->__memmgrBlockMemLockedMemory__(pGpu, pMemoryManager);
2050 }
2051
2052 NV_STATUS memmgrInsertUnprotectedRegionAtBottomOfFb_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pSize);
2053
memmgrInsertUnprotectedRegionAtBottomOfFb_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * pSize)2054 static inline NV_STATUS memmgrInsertUnprotectedRegionAtBottomOfFb_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pSize) {
2055 return NV_OK;
2056 }
2057
memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * pSize)2058 static inline NV_STATUS memmgrInsertUnprotectedRegionAtBottomOfFb_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pSize) {
2059 return pMemoryManager->__memmgrInsertUnprotectedRegionAtBottomOfFb__(pGpu, pMemoryManager, pSize);
2060 }
2061
2062 NV_STATUS memmgrInitBaseFbRegions_FWCLIENT(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2063
2064 NV_STATUS memmgrInitBaseFbRegions_VGPUSTUB(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2065
2066 NV_STATUS memmgrInitBaseFbRegions_GP102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2067
memmgrInitBaseFbRegions_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2068 static inline NV_STATUS memmgrInitBaseFbRegions_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2069 return pMemoryManager->__memmgrInitBaseFbRegions__(pGpu, pMemoryManager);
2070 }
2071
2072 void memmgrGetDisablePlcKind_GA100(struct MemoryManager *pMemoryManager, NvU32 *pteKind);
2073
memmgrGetDisablePlcKind_b3696a(struct MemoryManager * pMemoryManager,NvU32 * pteKind)2074 static inline void memmgrGetDisablePlcKind_b3696a(struct MemoryManager *pMemoryManager, NvU32 *pteKind) {
2075 return;
2076 }
2077
memmgrGetDisablePlcKind_DISPATCH(struct MemoryManager * pMemoryManager,NvU32 * pteKind)2078 static inline void memmgrGetDisablePlcKind_DISPATCH(struct MemoryManager *pMemoryManager, NvU32 *pteKind) {
2079 pMemoryManager->__memmgrGetDisablePlcKind__(pMemoryManager, pteKind);
2080 }
2081
2082 void memmgrEnableDynamicPageOfflining_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2083
2084 void memmgrEnableDynamicPageOfflining_GA102(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2085
memmgrEnableDynamicPageOfflining_b3696a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2086 static inline void memmgrEnableDynamicPageOfflining_b3696a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2087 return;
2088 }
2089
memmgrEnableDynamicPageOfflining_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2090 static inline void memmgrEnableDynamicPageOfflining_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2091 pMemoryManager->__memmgrEnableDynamicPageOfflining__(pGpu, pMemoryManager);
2092 }
2093
memmgrSetPartitionableMem_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2094 static inline NV_STATUS memmgrSetPartitionableMem_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2095 return NV_OK;
2096 }
2097
2098 NV_STATUS memmgrSetPartitionableMem_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2099
memmgrSetPartitionableMem_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2100 static inline NV_STATUS memmgrSetPartitionableMem_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2101 return pMemoryManager->__memmgrSetPartitionableMem__(pGpu, pMemoryManager);
2102 }
2103
2104 NV_STATUS memmgrAllocMIGGPUInstanceMemory_VF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle *phMemory, struct NV_RANGE *pAddrRange, struct Heap **ppMemoryPartitionHeap);
2105
2106 NV_STATUS memmgrAllocMIGGPUInstanceMemory_PF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle *phMemory, struct NV_RANGE *pAddrRange, struct Heap **ppMemoryPartitionHeap);
2107
memmgrAllocMIGGPUInstanceMemory_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 swizzId,NvHandle * phMemory,struct NV_RANGE * pAddrRange,struct Heap ** ppMemoryPartitionHeap)2108 static inline NV_STATUS memmgrAllocMIGGPUInstanceMemory_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle *phMemory, struct NV_RANGE *pAddrRange, struct Heap **ppMemoryPartitionHeap) {
2109 return pMemoryManager->__memmgrAllocMIGGPUInstanceMemory__(pGpu, pMemoryManager, swizzId, phMemory, pAddrRange, ppMemoryPartitionHeap);
2110 }
2111
2112 NV_STATUS memmgrGetBlackListPages_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, BLACKLIST_ADDRESS *pBlAddrs, NvU32 *pCount);
2113
2114 NV_STATUS memmgrGetBlackListPages_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, BLACKLIST_ADDRESS *pBlAddrs, NvU32 *pCount);
2115
memmgrGetBlackListPages_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,BLACKLIST_ADDRESS * pBlAddrs,NvU32 * pCount)2116 static inline NV_STATUS memmgrGetBlackListPages_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, BLACKLIST_ADDRESS *pBlAddrs, NvU32 *pCount) {
2117 return pMemoryManager->__memmgrGetBlackListPages__(pGpu, pMemoryManager, pBlAddrs, pCount);
2118 }
2119
2120 NV_STATUS memmgrDiscoverMIGPartitionableMemoryRange_VF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct NV_RANGE *pMemoryRange);
2121
memmgrDiscoverMIGPartitionableMemoryRange_46f6a7(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,struct NV_RANGE * pMemoryRange)2122 static inline NV_STATUS memmgrDiscoverMIGPartitionableMemoryRange_46f6a7(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct NV_RANGE *pMemoryRange) {
2123 return NV_ERR_NOT_SUPPORTED;
2124 }
2125
memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,struct NV_RANGE * pMemoryRange)2126 static inline NV_STATUS memmgrDiscoverMIGPartitionableMemoryRange_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct NV_RANGE *pMemoryRange) {
2127 return pMemoryManager->__memmgrDiscoverMIGPartitionableMemoryRange__(pGpu, pMemoryManager, pMemoryRange);
2128 }
2129
2130 NV_STATUS memmgrValidateFBEndReservation_PF(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2131
memmgrValidateFBEndReservation_56cd7a(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2132 static inline NV_STATUS memmgrValidateFBEndReservation_56cd7a(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2133 return NV_OK;
2134 }
2135
memmgrValidateFBEndReservation_DISPATCH(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2136 static inline NV_STATUS memmgrValidateFBEndReservation_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2137 return pMemoryManager->__memmgrValidateFBEndReservation__(pGpu, pMemoryManager);
2138 }
2139
memmgrStatePreLoad_DISPATCH(POBJGPU pGpu,struct MemoryManager * pEngstate,NvU32 arg0)2140 static inline NV_STATUS memmgrStatePreLoad_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg0) {
2141 return pEngstate->__memmgrStatePreLoad__(pGpu, pEngstate, arg0);
2142 }
2143
memmgrStatePostUnload_DISPATCH(POBJGPU pGpu,struct MemoryManager * pEngstate,NvU32 arg0)2144 static inline NV_STATUS memmgrStatePostUnload_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate, NvU32 arg0) {
2145 return pEngstate->__memmgrStatePostUnload__(pGpu, pEngstate, arg0);
2146 }
2147
memmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu,struct MemoryManager * pEngstate)2148 static inline NV_STATUS memmgrStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) {
2149 return pEngstate->__memmgrStateInitUnlocked__(pGpu, pEngstate);
2150 }
2151
memmgrInitMissing_DISPATCH(POBJGPU pGpu,struct MemoryManager * pEngstate)2152 static inline void memmgrInitMissing_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) {
2153 pEngstate->__memmgrInitMissing__(pGpu, pEngstate);
2154 }
2155
memmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu,struct MemoryManager * pEngstate)2156 static inline NV_STATUS memmgrStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) {
2157 return pEngstate->__memmgrStatePreInitUnlocked__(pGpu, pEngstate);
2158 }
2159
memmgrIsPresent_DISPATCH(POBJGPU pGpu,struct MemoryManager * pEngstate)2160 static inline NvBool memmgrIsPresent_DISPATCH(POBJGPU pGpu, struct MemoryManager *pEngstate) {
2161 return pEngstate->__memmgrIsPresent__(pGpu, pEngstate);
2162 }
2163
memmgrIsLocalEgmSupported(struct MemoryManager * pMemoryManager)2164 static inline NvBool memmgrIsLocalEgmSupported(struct MemoryManager *pMemoryManager) {
2165 return pMemoryManager->bLocalEgmSupported;
2166 }
2167
memmgrIsLocalEgmEnabled(struct MemoryManager * pMemoryManager)2168 static inline NvBool memmgrIsLocalEgmEnabled(struct MemoryManager *pMemoryManager) {
2169 return pMemoryManager->bLocalEgmEnabled;
2170 }
2171
memmgrLocalEgmPeerId(struct MemoryManager * pMemoryManager)2172 static inline NvU32 memmgrLocalEgmPeerId(struct MemoryManager *pMemoryManager) {
2173 return pMemoryManager->localEgmPeerId;
2174 }
2175
memmgrLocalEgmBaseAddress(struct MemoryManager * pMemoryManager)2176 static inline NvU64 memmgrLocalEgmBaseAddress(struct MemoryManager *pMemoryManager) {
2177 return pMemoryManager->localEgmBasePhysAddr;
2178 }
2179
memmgrIsScrubOnFreeEnabled(struct MemoryManager * pMemoryManager)2180 static inline NvBool memmgrIsScrubOnFreeEnabled(struct MemoryManager *pMemoryManager) {
2181 return pMemoryManager->bScrubOnFreeEnabled;
2182 }
2183
memmgrIsFastScrubberEnabled(struct MemoryManager * pMemoryManager)2184 static inline NvBool memmgrIsFastScrubberEnabled(struct MemoryManager *pMemoryManager) {
2185 return pMemoryManager->bFastScrubberEnabled;
2186 }
2187
memmgrUseVasForCeMemoryOps(struct MemoryManager * pMemoryManager)2188 static inline NvBool memmgrUseVasForCeMemoryOps(struct MemoryManager *pMemoryManager) {
2189 return pMemoryManager->bUseVasForCeMemoryOps;
2190 }
2191
memmgrRmExecutingEccScrub(struct MemoryManager * pMemoryManager)2192 static inline NvBool memmgrRmExecutingEccScrub(struct MemoryManager *pMemoryManager) {
2193 return pMemoryManager->bRmExecutingEccScrub;
2194 }
2195
memmgrBug1441072EccScrubWar(struct MemoryManager * pMemoryManager)2196 static inline NvBool memmgrBug1441072EccScrubWar(struct MemoryManager *pMemoryManager) {
2197 return pMemoryManager->bBug1441072EccScrubWar;
2198 }
2199
memmgrIsPmaInitialized(struct MemoryManager * pMemoryManager)2200 static inline NvBool memmgrIsPmaInitialized(struct MemoryManager *pMemoryManager) {
2201 return pMemoryManager->bPmaInitialized;
2202 }
2203
memmgrSetPmaInitialized(struct MemoryManager * pMemoryManager,NvBool val)2204 static inline void memmgrSetPmaInitialized(struct MemoryManager *pMemoryManager, NvBool val) {
2205 pMemoryManager->bPmaInitialized = val;
2206 }
2207
memmgrAreFbRegionsSupported(struct MemoryManager * pMemoryManager)2208 static inline NvBool memmgrAreFbRegionsSupported(struct MemoryManager *pMemoryManager) {
2209 return pMemoryManager->bFbRegionsSupported;
2210 }
2211
memmgrIsPmaSupportedOnPlatform(struct MemoryManager * pMemoryManager)2212 static inline NvBool memmgrIsPmaSupportedOnPlatform(struct MemoryManager *pMemoryManager) {
2213 return pMemoryManager->bPmaSupportedOnPlatform;
2214 }
2215
memmgrIsPmaEnabled(struct MemoryManager * pMemoryManager)2216 static inline NvBool memmgrIsPmaEnabled(struct MemoryManager *pMemoryManager) {
2217 return pMemoryManager->bPmaEnabled;
2218 }
2219
memmgrIsPmaForcePersistence(struct MemoryManager * pMemoryManager)2220 static inline NvBool memmgrIsPmaForcePersistence(struct MemoryManager *pMemoryManager) {
2221 return pMemoryManager->bPmaForcePersistence;
2222 }
2223
memmgrSetPmaForcePersistence(struct MemoryManager * pMemoryManager,NvBool val)2224 static inline void memmgrSetPmaForcePersistence(struct MemoryManager *pMemoryManager, NvBool val) {
2225 pMemoryManager->bPmaForcePersistence = val;
2226 }
2227
memmgrAreClientPageTablesPmaManaged(struct MemoryManager * pMemoryManager)2228 static inline NvBool memmgrAreClientPageTablesPmaManaged(struct MemoryManager *pMemoryManager) {
2229 return pMemoryManager->bClientPageTablesPmaManaged;
2230 }
2231
memmgrSetClientPageTablesPmaManaged(struct MemoryManager * pMemoryManager,NvBool val)2232 static inline void memmgrSetClientPageTablesPmaManaged(struct MemoryManager *pMemoryManager, NvBool val) {
2233 pMemoryManager->bClientPageTablesPmaManaged = val;
2234 }
2235
memmgrGetRsvdMemoryBase(struct MemoryManager * pMemoryManager)2236 static inline NvU64 memmgrGetRsvdMemoryBase(struct MemoryManager *pMemoryManager) {
2237 return pMemoryManager->rsvdMemoryBase;
2238 }
2239
memmgrGetRsvdMemorySize(struct MemoryManager * pMemoryManager)2240 static inline NvU32 memmgrGetRsvdMemorySize(struct MemoryManager *pMemoryManager) {
2241 return pMemoryManager->rsvdMemorySize;
2242 }
2243
memmgrBug3922001DisableCtxBufOnSim(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2244 static inline NvBool memmgrBug3922001DisableCtxBufOnSim(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2245 return pMemoryManager->bBug3922001DisableCtxBufOnSim;
2246 }
2247
2248 void memmgrDestruct_IMPL(struct MemoryManager *pMemoryManager);
2249
2250 #define __nvoc_memmgrDestruct(pMemoryManager) memmgrDestruct_IMPL(pMemoryManager)
2251 NV_STATUS memmgrAllocResources_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_ALLOCATION_REQUEST *pAllocRequest, FB_ALLOC_INFO *pFbAllocInfo);
2252
2253 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAllocResources(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_ALLOCATION_REQUEST * pAllocRequest,FB_ALLOC_INFO * pFbAllocInfo)2254 static inline NV_STATUS memmgrAllocResources(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_ALLOCATION_REQUEST *pAllocRequest, FB_ALLOC_INFO *pFbAllocInfo) {
2255 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2256 return NV_ERR_NOT_SUPPORTED;
2257 }
2258 #else //__nvoc_mem_mgr_h_disabled
2259 #define memmgrAllocResources(pGpu, pMemoryManager, pAllocRequest, pFbAllocInfo) memmgrAllocResources_IMPL(pGpu, pMemoryManager, pAllocRequest, pFbAllocInfo)
2260 #endif //__nvoc_mem_mgr_h_disabled
2261
2262 NV_STATUS memmgrFree_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *arg0, NvHandle arg1, NvHandle arg2, NvHandle arg3, NvU32 arg4, MEMORY_DESCRIPTOR *arg5);
2263
2264 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFree(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,struct Heap * arg0,NvHandle arg1,NvHandle arg2,NvHandle arg3,NvU32 arg4,MEMORY_DESCRIPTOR * arg5)2265 static inline NV_STATUS memmgrFree(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *arg0, NvHandle arg1, NvHandle arg2, NvHandle arg3, NvU32 arg4, MEMORY_DESCRIPTOR *arg5) {
2266 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2267 return NV_ERR_NOT_SUPPORTED;
2268 }
2269 #else //__nvoc_mem_mgr_h_disabled
2270 #define memmgrFree(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5) memmgrFree_IMPL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5)
2271 #endif //__nvoc_mem_mgr_h_disabled
2272
2273 NV_STATUS memmgrAddMemNode_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvBool bFreeDescriptor);
2274
2275 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAddMemNode(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * pMemDesc,NvBool bFreeDescriptor)2276 static inline NV_STATUS memmgrAddMemNode(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvBool bFreeDescriptor) {
2277 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2278 return NV_ERR_NOT_SUPPORTED;
2279 }
2280 #else //__nvoc_mem_mgr_h_disabled
2281 #define memmgrAddMemNode(pGpu, pMemoryManager, pMemDesc, bFreeDescriptor) memmgrAddMemNode_IMPL(pGpu, pMemoryManager, pMemDesc, bFreeDescriptor)
2282 #endif //__nvoc_mem_mgr_h_disabled
2283
2284 NV_STATUS memmgrAddMemNodes_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool bSaveAllRmAllocations);
2285
2286 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAddMemNodes(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvBool bSaveAllRmAllocations)2287 static inline NV_STATUS memmgrAddMemNodes(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool bSaveAllRmAllocations) {
2288 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2289 return NV_ERR_NOT_SUPPORTED;
2290 }
2291 #else //__nvoc_mem_mgr_h_disabled
2292 #define memmgrAddMemNodes(pGpu, pMemoryManager, bSaveAllRmAllocations) memmgrAddMemNodes_IMPL(pGpu, pMemoryManager, bSaveAllRmAllocations)
2293 #endif //__nvoc_mem_mgr_h_disabled
2294
2295 void memmgrRemoveMemNodes_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2296
2297 #ifdef __nvoc_mem_mgr_h_disabled
memmgrRemoveMemNodes(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2298 static inline void memmgrRemoveMemNodes(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2299 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2300 }
2301 #else //__nvoc_mem_mgr_h_disabled
2302 #define memmgrRemoveMemNodes(pGpu, pMemoryManager) memmgrRemoveMemNodes_IMPL(pGpu, pMemoryManager)
2303 #endif //__nvoc_mem_mgr_h_disabled
2304
2305 struct Heap *memmgrGetDeviceSuballocator_IMPL(struct MemoryManager *pMemoryManager, NvBool bForceSubheap);
2306
2307 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetDeviceSuballocator(struct MemoryManager * pMemoryManager,NvBool bForceSubheap)2308 static inline struct Heap *memmgrGetDeviceSuballocator(struct MemoryManager *pMemoryManager, NvBool bForceSubheap) {
2309 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2310 return NULL;
2311 }
2312 #else //__nvoc_mem_mgr_h_disabled
2313 #define memmgrGetDeviceSuballocator(pMemoryManager, bForceSubheap) memmgrGetDeviceSuballocator_IMPL(pMemoryManager, bForceSubheap)
2314 #endif //__nvoc_mem_mgr_h_disabled
2315
2316 NV_STATUS memmgrMemCopy_IMPL(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pDst, TRANSFER_SURFACE *pSrc, NvU32 size, NvU32 flags);
2317
2318 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemCopy(struct MemoryManager * pMemoryManager,TRANSFER_SURFACE * pDst,TRANSFER_SURFACE * pSrc,NvU32 size,NvU32 flags)2319 static inline NV_STATUS memmgrMemCopy(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pDst, TRANSFER_SURFACE *pSrc, NvU32 size, NvU32 flags) {
2320 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2321 return NV_ERR_NOT_SUPPORTED;
2322 }
2323 #else //__nvoc_mem_mgr_h_disabled
2324 #define memmgrMemCopy(pMemoryManager, pDst, pSrc, size, flags) memmgrMemCopy_IMPL(pMemoryManager, pDst, pSrc, size, flags)
2325 #endif //__nvoc_mem_mgr_h_disabled
2326
2327 NV_STATUS memmgrMemSet_IMPL(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pDst, NvU32 value, NvU32 size, NvU32 flags);
2328
2329 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemSet(struct MemoryManager * pMemoryManager,TRANSFER_SURFACE * pDst,NvU32 value,NvU32 size,NvU32 flags)2330 static inline NV_STATUS memmgrMemSet(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pDst, NvU32 value, NvU32 size, NvU32 flags) {
2331 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2332 return NV_ERR_NOT_SUPPORTED;
2333 }
2334 #else //__nvoc_mem_mgr_h_disabled
2335 #define memmgrMemSet(pMemoryManager, pDst, value, size, flags) memmgrMemSet_IMPL(pMemoryManager, pDst, value, size, flags)
2336 #endif //__nvoc_mem_mgr_h_disabled
2337
2338 NV_STATUS memmgrMemWrite_IMPL(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pDst, void *pBuf, NvU64 size, NvU32 flags);
2339
2340 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemWrite(struct MemoryManager * pMemoryManager,TRANSFER_SURFACE * pDst,void * pBuf,NvU64 size,NvU32 flags)2341 static inline NV_STATUS memmgrMemWrite(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pDst, void *pBuf, NvU64 size, NvU32 flags) {
2342 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2343 return NV_ERR_NOT_SUPPORTED;
2344 }
2345 #else //__nvoc_mem_mgr_h_disabled
2346 #define memmgrMemWrite(pMemoryManager, pDst, pBuf, size, flags) memmgrMemWrite_IMPL(pMemoryManager, pDst, pBuf, size, flags)
2347 #endif //__nvoc_mem_mgr_h_disabled
2348
2349 NV_STATUS memmgrMemRead_IMPL(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pSrc, void *pBuf, NvU64 size, NvU32 flags);
2350
2351 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemRead(struct MemoryManager * pMemoryManager,TRANSFER_SURFACE * pSrc,void * pBuf,NvU64 size,NvU32 flags)2352 static inline NV_STATUS memmgrMemRead(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pSrc, void *pBuf, NvU64 size, NvU32 flags) {
2353 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2354 return NV_ERR_NOT_SUPPORTED;
2355 }
2356 #else //__nvoc_mem_mgr_h_disabled
2357 #define memmgrMemRead(pMemoryManager, pSrc, pBuf, size, flags) memmgrMemRead_IMPL(pMemoryManager, pSrc, pBuf, size, flags)
2358 #endif //__nvoc_mem_mgr_h_disabled
2359
2360 NvU8 *memmgrMemBeginTransfer_IMPL(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pTransferInfo, NvU64 shadowBufSize, NvU32 flags);
2361
2362 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemBeginTransfer(struct MemoryManager * pMemoryManager,TRANSFER_SURFACE * pTransferInfo,NvU64 shadowBufSize,NvU32 flags)2363 static inline NvU8 *memmgrMemBeginTransfer(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pTransferInfo, NvU64 shadowBufSize, NvU32 flags) {
2364 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2365 return NULL;
2366 }
2367 #else //__nvoc_mem_mgr_h_disabled
2368 #define memmgrMemBeginTransfer(pMemoryManager, pTransferInfo, shadowBufSize, flags) memmgrMemBeginTransfer_IMPL(pMemoryManager, pTransferInfo, shadowBufSize, flags)
2369 #endif //__nvoc_mem_mgr_h_disabled
2370
2371 void memmgrMemEndTransfer_IMPL(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pTransferInfo, NvU64 shadowBufSize, NvU32 flags);
2372
2373 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemEndTransfer(struct MemoryManager * pMemoryManager,TRANSFER_SURFACE * pTransferInfo,NvU64 shadowBufSize,NvU32 flags)2374 static inline void memmgrMemEndTransfer(struct MemoryManager *pMemoryManager, TRANSFER_SURFACE *pTransferInfo, NvU64 shadowBufSize, NvU32 flags) {
2375 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2376 }
2377 #else //__nvoc_mem_mgr_h_disabled
2378 #define memmgrMemEndTransfer(pMemoryManager, pTransferInfo, shadowBufSize, flags) memmgrMemEndTransfer_IMPL(pMemoryManager, pTransferInfo, shadowBufSize, flags)
2379 #endif //__nvoc_mem_mgr_h_disabled
2380
2381 NvU8 *memmgrMemDescBeginTransfer_IMPL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 flags);
2382
2383 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemDescBeginTransfer(struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * pMemDesc,NvU32 flags)2384 static inline NvU8 *memmgrMemDescBeginTransfer(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 flags) {
2385 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2386 return NULL;
2387 }
2388 #else //__nvoc_mem_mgr_h_disabled
2389 #define memmgrMemDescBeginTransfer(pMemoryManager, pMemDesc, flags) memmgrMemDescBeginTransfer_IMPL(pMemoryManager, pMemDesc, flags)
2390 #endif //__nvoc_mem_mgr_h_disabled
2391
2392 void memmgrMemDescEndTransfer_IMPL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 flags);
2393
2394 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemDescEndTransfer(struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * pMemDesc,NvU32 flags)2395 static inline void memmgrMemDescEndTransfer(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 flags) {
2396 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2397 }
2398 #else //__nvoc_mem_mgr_h_disabled
2399 #define memmgrMemDescEndTransfer(pMemoryManager, pMemDesc, flags) memmgrMemDescEndTransfer_IMPL(pMemoryManager, pMemDesc, flags)
2400 #endif //__nvoc_mem_mgr_h_disabled
2401
2402 NV_STATUS memmgrMemDescMemSet_IMPL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 value, NvU32 flags);
2403
2404 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemDescMemSet(struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * pMemDesc,NvU32 value,NvU32 flags)2405 static inline NV_STATUS memmgrMemDescMemSet(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *pMemDesc, NvU32 value, NvU32 flags) {
2406 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2407 return NV_ERR_NOT_SUPPORTED;
2408 }
2409 #else //__nvoc_mem_mgr_h_disabled
2410 #define memmgrMemDescMemSet(pMemoryManager, pMemDesc, value, flags) memmgrMemDescMemSet_IMPL(pMemoryManager, pMemDesc, value, flags)
2411 #endif //__nvoc_mem_mgr_h_disabled
2412
2413 NV_ADDRESS_SPACE memmgrAllocGetAddrSpace_IMPL(struct MemoryManager *pMemoryManager, NvU32 flags, NvU32 attr);
2414
2415 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAllocGetAddrSpace(struct MemoryManager * pMemoryManager,NvU32 flags,NvU32 attr)2416 static inline NV_ADDRESS_SPACE memmgrAllocGetAddrSpace(struct MemoryManager *pMemoryManager, NvU32 flags, NvU32 attr) {
2417 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2418 NV_ADDRESS_SPACE ret;
2419 portMemSet(&ret, 0, sizeof(NV_ADDRESS_SPACE));
2420 return ret;
2421 }
2422 #else //__nvoc_mem_mgr_h_disabled
2423 #define memmgrAllocGetAddrSpace(pMemoryManager, flags, attr) memmgrAllocGetAddrSpace_IMPL(pMemoryManager, flags, attr)
2424 #endif //__nvoc_mem_mgr_h_disabled
2425
2426 NV_STATUS memmgrCreateHeap_IMPL(struct MemoryManager *pMemoryManager);
2427
2428 #ifdef __nvoc_mem_mgr_h_disabled
memmgrCreateHeap(struct MemoryManager * pMemoryManager)2429 static inline NV_STATUS memmgrCreateHeap(struct MemoryManager *pMemoryManager) {
2430 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2431 return NV_ERR_NOT_SUPPORTED;
2432 }
2433 #else //__nvoc_mem_mgr_h_disabled
2434 #define memmgrCreateHeap(pMemoryManager) memmgrCreateHeap_IMPL(pMemoryManager)
2435 #endif //__nvoc_mem_mgr_h_disabled
2436
2437 NV_STATUS memmgrGetUsedRamSize_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0);
2438
2439 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetUsedRamSize(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * arg0)2440 static inline NV_STATUS memmgrGetUsedRamSize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0) {
2441 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2442 return NV_ERR_NOT_SUPPORTED;
2443 }
2444 #else //__nvoc_mem_mgr_h_disabled
2445 #define memmgrGetUsedRamSize(pGpu, pMemoryManager, arg0) memmgrGetUsedRamSize_IMPL(pGpu, pMemoryManager, arg0)
2446 #endif //__nvoc_mem_mgr_h_disabled
2447
2448 NV_STATUS memmgrAllocHwResources_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0);
2449
2450 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAllocHwResources(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_INFO * arg0)2451 static inline NV_STATUS memmgrAllocHwResources(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0) {
2452 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2453 return NV_ERR_NOT_SUPPORTED;
2454 }
2455 #else //__nvoc_mem_mgr_h_disabled
2456 #define memmgrAllocHwResources(pGpu, pMemoryManager, arg0) memmgrAllocHwResources_IMPL(pGpu, pMemoryManager, arg0)
2457 #endif //__nvoc_mem_mgr_h_disabled
2458
2459 NV_STATUS memmgrFreeHwResources_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0);
2460
2461 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFreeHwResources(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,FB_ALLOC_INFO * arg0)2462 static inline NV_STATUS memmgrFreeHwResources(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_ALLOC_INFO *arg0) {
2463 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2464 return NV_ERR_NOT_SUPPORTED;
2465 }
2466 #else //__nvoc_mem_mgr_h_disabled
2467 #define memmgrFreeHwResources(pGpu, pMemoryManager, arg0) memmgrFreeHwResources_IMPL(pGpu, pMemoryManager, arg0)
2468 #endif //__nvoc_mem_mgr_h_disabled
2469
2470 NvBool memmgrLargePageSupported_IMPL(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0);
2471
2472 #ifdef __nvoc_mem_mgr_h_disabled
memmgrLargePageSupported(struct MemoryManager * pMemoryManager,NV_ADDRESS_SPACE arg0)2473 static inline NvBool memmgrLargePageSupported(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0) {
2474 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2475 return NV_FALSE;
2476 }
2477 #else //__nvoc_mem_mgr_h_disabled
2478 #define memmgrLargePageSupported(pMemoryManager, arg0) memmgrLargePageSupported_IMPL(pMemoryManager, arg0)
2479 #endif //__nvoc_mem_mgr_h_disabled
2480
2481 NvBool memmgrComprSupported_IMPL(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0);
2482
2483 #ifdef __nvoc_mem_mgr_h_disabled
memmgrComprSupported(struct MemoryManager * pMemoryManager,NV_ADDRESS_SPACE arg0)2484 static inline NvBool memmgrComprSupported(struct MemoryManager *pMemoryManager, NV_ADDRESS_SPACE arg0) {
2485 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2486 return NV_FALSE;
2487 }
2488 #else //__nvoc_mem_mgr_h_disabled
2489 #define memmgrComprSupported(pMemoryManager, arg0) memmgrComprSupported_IMPL(pMemoryManager, arg0)
2490 #endif //__nvoc_mem_mgr_h_disabled
2491
2492 NvU32 memmgrGetMappableRamSizeMb_IMPL(struct MemoryManager *pMemoryManager);
2493
2494 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetMappableRamSizeMb(struct MemoryManager * pMemoryManager)2495 static inline NvU32 memmgrGetMappableRamSizeMb(struct MemoryManager *pMemoryManager) {
2496 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2497 return 0;
2498 }
2499 #else //__nvoc_mem_mgr_h_disabled
2500 #define memmgrGetMappableRamSizeMb(pMemoryManager) memmgrGetMappableRamSizeMb_IMPL(pMemoryManager)
2501 #endif //__nvoc_mem_mgr_h_disabled
2502
2503 PFB_REGION_DESCRIPTOR memmgrLookupFbRegionByOffset_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr fbOffset, RmPhysAddr fbLimit);
2504
2505 #ifdef __nvoc_mem_mgr_h_disabled
memmgrLookupFbRegionByOffset(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,RmPhysAddr fbOffset,RmPhysAddr fbLimit)2506 static inline PFB_REGION_DESCRIPTOR memmgrLookupFbRegionByOffset(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, RmPhysAddr fbOffset, RmPhysAddr fbLimit) {
2507 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2508 return NULL;
2509 }
2510 #else //__nvoc_mem_mgr_h_disabled
2511 #define memmgrLookupFbRegionByOffset(pGpu, pMemoryManager, fbOffset, fbLimit) memmgrLookupFbRegionByOffset_IMPL(pGpu, pMemoryManager, fbOffset, fbLimit)
2512 #endif //__nvoc_mem_mgr_h_disabled
2513
2514 NV_STATUS memmgrFillMemdescForPhysAttr_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, NvU64 *arg2, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 *arg7, NvU64 *arg8);
2515
2516 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFillMemdescForPhysAttr(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,PMEMORY_DESCRIPTOR arg0,ADDRESS_TRANSLATION arg1,NvU64 * arg2,NvU32 * arg3,NvU32 * arg4,NvU32 * arg5,NvU32 * arg6,NvU32 * arg7,NvU64 * arg8)2517 static inline NV_STATUS memmgrFillMemdescForPhysAttr(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMEMORY_DESCRIPTOR arg0, ADDRESS_TRANSLATION arg1, NvU64 *arg2, NvU32 *arg3, NvU32 *arg4, NvU32 *arg5, NvU32 *arg6, NvU32 *arg7, NvU64 *arg8) {
2518 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2519 return NV_ERR_NOT_SUPPORTED;
2520 }
2521 #else //__nvoc_mem_mgr_h_disabled
2522 #define memmgrFillMemdescForPhysAttr(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) memmgrFillMemdescForPhysAttr_IMPL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8)
2523 #endif //__nvoc_mem_mgr_h_disabled
2524
2525 NV_STATUS memmgrSetPlatformPmaSupport_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2526
2527 #ifdef __nvoc_mem_mgr_h_disabled
memmgrSetPlatformPmaSupport(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2528 static inline NV_STATUS memmgrSetPlatformPmaSupport(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2529 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2530 return NV_ERR_NOT_SUPPORTED;
2531 }
2532 #else //__nvoc_mem_mgr_h_disabled
2533 #define memmgrSetPlatformPmaSupport(pGpu, pMemoryManager) memmgrSetPlatformPmaSupport_IMPL(pGpu, pMemoryManager)
2534 #endif //__nvoc_mem_mgr_h_disabled
2535
2536 void memmgrRegionSetupForPma_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2537
2538 #ifdef __nvoc_mem_mgr_h_disabled
memmgrRegionSetupForPma(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2539 static inline void memmgrRegionSetupForPma(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2540 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2541 }
2542 #else //__nvoc_mem_mgr_h_disabled
2543 #define memmgrRegionSetupForPma(pGpu, pMemoryManager) memmgrRegionSetupForPma_IMPL(pGpu, pMemoryManager)
2544 #endif //__nvoc_mem_mgr_h_disabled
2545
2546 NV_STATUS memmgrInitFbRegions_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2547
2548 #ifdef __nvoc_mem_mgr_h_disabled
memmgrInitFbRegions(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2549 static inline NV_STATUS memmgrInitFbRegions(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2550 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2551 return NV_ERR_NOT_SUPPORTED;
2552 }
2553 #else //__nvoc_mem_mgr_h_disabled
2554 #define memmgrInitFbRegions(pGpu, pMemoryManager) memmgrInitFbRegions_IMPL(pGpu, pMemoryManager)
2555 #endif //__nvoc_mem_mgr_h_disabled
2556
2557 void memmgrRegionSetupCommon_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2558
2559 #ifdef __nvoc_mem_mgr_h_disabled
memmgrRegionSetupCommon(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2560 static inline void memmgrRegionSetupCommon(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2561 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2562 }
2563 #else //__nvoc_mem_mgr_h_disabled
2564 #define memmgrRegionSetupCommon(pGpu, pMemoryManager) memmgrRegionSetupCommon_IMPL(pGpu, pMemoryManager)
2565 #endif //__nvoc_mem_mgr_h_disabled
2566
2567 void memmgrRegenerateFbRegionPriority_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2568
2569 #ifdef __nvoc_mem_mgr_h_disabled
memmgrRegenerateFbRegionPriority(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2570 static inline void memmgrRegenerateFbRegionPriority(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2571 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2572 }
2573 #else //__nvoc_mem_mgr_h_disabled
2574 #define memmgrRegenerateFbRegionPriority(pGpu, pMemoryManager) memmgrRegenerateFbRegionPriority_IMPL(pGpu, pMemoryManager)
2575 #endif //__nvoc_mem_mgr_h_disabled
2576
2577 NvU32 memmgrInsertFbRegion_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PFB_REGION_DESCRIPTOR arg0);
2578
2579 #ifdef __nvoc_mem_mgr_h_disabled
memmgrInsertFbRegion(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,PFB_REGION_DESCRIPTOR arg0)2580 static inline NvU32 memmgrInsertFbRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PFB_REGION_DESCRIPTOR arg0) {
2581 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2582 return 0;
2583 }
2584 #else //__nvoc_mem_mgr_h_disabled
2585 #define memmgrInsertFbRegion(pGpu, pMemoryManager, arg0) memmgrInsertFbRegion_IMPL(pGpu, pMemoryManager, arg0)
2586 #endif //__nvoc_mem_mgr_h_disabled
2587
2588 void memmgrDumpFbRegions_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2589
2590 #ifdef __nvoc_mem_mgr_h_disabled
memmgrDumpFbRegions(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2591 static inline void memmgrDumpFbRegions(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2592 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2593 }
2594 #else //__nvoc_mem_mgr_h_disabled
2595 #define memmgrDumpFbRegions(pGpu, pMemoryManager) memmgrDumpFbRegions_IMPL(pGpu, pMemoryManager)
2596 #endif //__nvoc_mem_mgr_h_disabled
2597
2598 void memmgrClearFbRegions_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2599
2600 #ifdef __nvoc_mem_mgr_h_disabled
memmgrClearFbRegions(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2601 static inline void memmgrClearFbRegions(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2602 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2603 }
2604 #else //__nvoc_mem_mgr_h_disabled
2605 #define memmgrClearFbRegions(pGpu, pMemoryManager) memmgrClearFbRegions_IMPL(pGpu, pMemoryManager)
2606 #endif //__nvoc_mem_mgr_h_disabled
2607
2608 void memmgrReleaseConsoleRegion_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2609
2610 #ifdef __nvoc_mem_mgr_h_disabled
memmgrReleaseConsoleRegion(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2611 static inline void memmgrReleaseConsoleRegion(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2612 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2613 }
2614 #else //__nvoc_mem_mgr_h_disabled
2615 #define memmgrReleaseConsoleRegion(pGpu, pMemoryManager) memmgrReleaseConsoleRegion_IMPL(pGpu, pMemoryManager)
2616 #endif //__nvoc_mem_mgr_h_disabled
2617
2618 PMEMORY_DESCRIPTOR memmgrGetReservedConsoleMemDesc_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2619
2620 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetReservedConsoleMemDesc(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2621 static inline PMEMORY_DESCRIPTOR memmgrGetReservedConsoleMemDesc(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2622 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2623 return NULL;
2624 }
2625 #else //__nvoc_mem_mgr_h_disabled
2626 #define memmgrGetReservedConsoleMemDesc(pGpu, pMemoryManager) memmgrGetReservedConsoleMemDesc_IMPL(pGpu, pMemoryManager)
2627 #endif //__nvoc_mem_mgr_h_disabled
2628
2629 void memmgrReserveBar2BackingStore_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0);
2630
2631 #ifdef __nvoc_mem_mgr_h_disabled
memmgrReserveBar2BackingStore(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * arg0)2632 static inline void memmgrReserveBar2BackingStore(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *arg0) {
2633 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2634 }
2635 #else //__nvoc_mem_mgr_h_disabled
2636 #define memmgrReserveBar2BackingStore(pGpu, pMemoryManager, arg0) memmgrReserveBar2BackingStore_IMPL(pGpu, pMemoryManager, arg0)
2637 #endif //__nvoc_mem_mgr_h_disabled
2638
2639 void memmgrCalcReservedFbSpace_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2640
2641 #ifdef __nvoc_mem_mgr_h_disabled
memmgrCalcReservedFbSpace(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2642 static inline void memmgrCalcReservedFbSpace(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2643 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2644 }
2645 #else //__nvoc_mem_mgr_h_disabled
2646 #define memmgrCalcReservedFbSpace(pGpu, pMemoryManager) memmgrCalcReservedFbSpace_IMPL(pGpu, pMemoryManager)
2647 #endif //__nvoc_mem_mgr_h_disabled
2648
2649 void memmgrMemUtilsSetupChannelBufferSizes_IMPL(struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, NvU32 arg1);
2650
2651 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsSetupChannelBufferSizes(struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0,NvU32 arg1)2652 static inline void memmgrMemUtilsSetupChannelBufferSizes(struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0, NvU32 arg1) {
2653 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2654 }
2655 #else //__nvoc_mem_mgr_h_disabled
2656 #define memmgrMemUtilsSetupChannelBufferSizes(pMemoryManager, arg0, arg1) memmgrMemUtilsSetupChannelBufferSizes_IMPL(pMemoryManager, arg0, arg1)
2657 #endif //__nvoc_mem_mgr_h_disabled
2658
2659 NV_STATUS memmgrMemUtilsChannelSchedulingSetup_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0);
2660
2661 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsChannelSchedulingSetup(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,OBJCHANNEL * arg0)2662 static inline NV_STATUS memmgrMemUtilsChannelSchedulingSetup(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, OBJCHANNEL *arg0) {
2663 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2664 return NV_ERR_NOT_SUPPORTED;
2665 }
2666 #else //__nvoc_mem_mgr_h_disabled
2667 #define memmgrMemUtilsChannelSchedulingSetup(pGpu, pMemoryManager, arg0) memmgrMemUtilsChannelSchedulingSetup_IMPL(pGpu, pMemoryManager, arg0)
2668 #endif //__nvoc_mem_mgr_h_disabled
2669
2670 NV_STATUS memmgrGetKindComprFromMemDesc_IMPL(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo);
2671
2672 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetKindComprFromMemDesc(struct MemoryManager * pMemoryManager,MEMORY_DESCRIPTOR * arg0,NvU64 offset,NvU32 * kind,COMPR_INFO * pComprInfo)2673 static inline NV_STATUS memmgrGetKindComprFromMemDesc(struct MemoryManager *pMemoryManager, MEMORY_DESCRIPTOR *arg0, NvU64 offset, NvU32 *kind, COMPR_INFO *pComprInfo) {
2674 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2675 return NV_ERR_NOT_SUPPORTED;
2676 }
2677 #else //__nvoc_mem_mgr_h_disabled
2678 #define memmgrGetKindComprFromMemDesc(pMemoryManager, arg0, offset, kind, pComprInfo) memmgrGetKindComprFromMemDesc_IMPL(pMemoryManager, arg0, offset, kind, pComprInfo)
2679 #endif //__nvoc_mem_mgr_h_disabled
2680
2681 NV_STATUS memmgrFillComprInfo_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU32 arg1, NvU32 arg2, NvU64 arg3, NvU32 arg4, COMPR_INFO *arg5);
2682
2683 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFillComprInfo(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 arg0,NvU32 arg1,NvU32 arg2,NvU64 arg3,NvU32 arg4,COMPR_INFO * arg5)2684 static inline NV_STATUS memmgrFillComprInfo(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 arg0, NvU32 arg1, NvU32 arg2, NvU64 arg3, NvU32 arg4, COMPR_INFO *arg5) {
2685 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2686 return NV_ERR_NOT_SUPPORTED;
2687 }
2688 #else //__nvoc_mem_mgr_h_disabled
2689 #define memmgrFillComprInfo(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5) memmgrFillComprInfo_IMPL(pGpu, pMemoryManager, arg0, arg1, arg2, arg3, arg4, arg5)
2690 #endif //__nvoc_mem_mgr_h_disabled
2691
2692 void memmgrComprInfoDisableCompression_IMPL(struct MemoryManager *pMemoryManager, COMPR_INFO *pComprInfo);
2693
2694 #ifdef __nvoc_mem_mgr_h_disabled
memmgrComprInfoDisableCompression(struct MemoryManager * pMemoryManager,COMPR_INFO * pComprInfo)2695 static inline void memmgrComprInfoDisableCompression(struct MemoryManager *pMemoryManager, COMPR_INFO *pComprInfo) {
2696 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2697 }
2698 #else //__nvoc_mem_mgr_h_disabled
2699 #define memmgrComprInfoDisableCompression(pMemoryManager, pComprInfo) memmgrComprInfoDisableCompression_IMPL(pMemoryManager, pComprInfo)
2700 #endif //__nvoc_mem_mgr_h_disabled
2701
2702 void memmgrFillComprInfoUncompressed_IMPL(struct MemoryManager *pMemoryManager, NvU32 kind, COMPR_INFO *pComprInfo);
2703
2704 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFillComprInfoUncompressed(struct MemoryManager * pMemoryManager,NvU32 kind,COMPR_INFO * pComprInfo)2705 static inline void memmgrFillComprInfoUncompressed(struct MemoryManager *pMemoryManager, NvU32 kind, COMPR_INFO *pComprInfo) {
2706 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2707 }
2708 #else //__nvoc_mem_mgr_h_disabled
2709 #define memmgrFillComprInfoUncompressed(pMemoryManager, kind, pComprInfo) memmgrFillComprInfoUncompressed_IMPL(pMemoryManager, kind, pComprInfo)
2710 #endif //__nvoc_mem_mgr_h_disabled
2711
2712 NV_STATUS memmgrPmaInitialize_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMA *pPma);
2713
2714 #ifdef __nvoc_mem_mgr_h_disabled
memmgrPmaInitialize(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,PMA * pPma)2715 static inline NV_STATUS memmgrPmaInitialize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, PMA *pPma) {
2716 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2717 return NV_ERR_NOT_SUPPORTED;
2718 }
2719 #else //__nvoc_mem_mgr_h_disabled
2720 #define memmgrPmaInitialize(pGpu, pMemoryManager, pPma) memmgrPmaInitialize_IMPL(pGpu, pMemoryManager, pPma)
2721 #endif //__nvoc_mem_mgr_h_disabled
2722
2723 NV_STATUS memmgrPmaRegisterRegions_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *pHeap, PMA *pPma);
2724
2725 #ifdef __nvoc_mem_mgr_h_disabled
memmgrPmaRegisterRegions(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,struct Heap * pHeap,PMA * pPma)2726 static inline NV_STATUS memmgrPmaRegisterRegions(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Heap *pHeap, PMA *pPma) {
2727 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2728 return NV_ERR_NOT_SUPPORTED;
2729 }
2730 #else //__nvoc_mem_mgr_h_disabled
2731 #define memmgrPmaRegisterRegions(pGpu, pMemoryManager, pHeap, pPma) memmgrPmaRegisterRegions_IMPL(pGpu, pMemoryManager, pHeap, pPma)
2732 #endif //__nvoc_mem_mgr_h_disabled
2733
2734 NV_STATUS memmgrInitInternalChannels_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2735
2736 #ifdef __nvoc_mem_mgr_h_disabled
memmgrInitInternalChannels(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2737 static inline NV_STATUS memmgrInitInternalChannels(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2738 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2739 return NV_ERR_NOT_SUPPORTED;
2740 }
2741 #else //__nvoc_mem_mgr_h_disabled
2742 #define memmgrInitInternalChannels(pGpu, pMemoryManager) memmgrInitInternalChannels_IMPL(pGpu, pMemoryManager)
2743 #endif //__nvoc_mem_mgr_h_disabled
2744
2745 NV_STATUS memmgrDestroyInternalChannels_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2746
2747 #ifdef __nvoc_mem_mgr_h_disabled
memmgrDestroyInternalChannels(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2748 static inline NV_STATUS memmgrDestroyInternalChannels(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2749 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2750 return NV_ERR_NOT_SUPPORTED;
2751 }
2752 #else //__nvoc_mem_mgr_h_disabled
2753 #define memmgrDestroyInternalChannels(pGpu, pMemoryManager) memmgrDestroyInternalChannels_IMPL(pGpu, pMemoryManager)
2754 #endif //__nvoc_mem_mgr_h_disabled
2755
2756 NV_STATUS memmgrInitCeUtils_IMPL(struct MemoryManager *pMemoryManager, NvBool bFifoLite);
2757
2758 #ifdef __nvoc_mem_mgr_h_disabled
memmgrInitCeUtils(struct MemoryManager * pMemoryManager,NvBool bFifoLite)2759 static inline NV_STATUS memmgrInitCeUtils(struct MemoryManager *pMemoryManager, NvBool bFifoLite) {
2760 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2761 return NV_ERR_NOT_SUPPORTED;
2762 }
2763 #else //__nvoc_mem_mgr_h_disabled
2764 #define memmgrInitCeUtils(pMemoryManager, bFifoLite) memmgrInitCeUtils_IMPL(pMemoryManager, bFifoLite)
2765 #endif //__nvoc_mem_mgr_h_disabled
2766
2767 void memmgrDestroyCeUtils_IMPL(struct MemoryManager *pMemoryManager, NvBool bSuspendCeUtils);
2768
2769 #ifdef __nvoc_mem_mgr_h_disabled
memmgrDestroyCeUtils(struct MemoryManager * pMemoryManager,NvBool bSuspendCeUtils)2770 static inline void memmgrDestroyCeUtils(struct MemoryManager *pMemoryManager, NvBool bSuspendCeUtils) {
2771 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2772 }
2773 #else //__nvoc_mem_mgr_h_disabled
2774 #define memmgrDestroyCeUtils(pMemoryManager, bSuspendCeUtils) memmgrDestroyCeUtils_IMPL(pMemoryManager, bSuspendCeUtils)
2775 #endif //__nvoc_mem_mgr_h_disabled
2776
2777 NV_STATUS memmgrSetMIGPartitionableBAR1Range_IMPL(OBJGPU *arg0, struct MemoryManager *arg1);
2778
2779 #ifdef __nvoc_mem_mgr_h_disabled
memmgrSetMIGPartitionableBAR1Range(OBJGPU * arg0,struct MemoryManager * arg1)2780 static inline NV_STATUS memmgrSetMIGPartitionableBAR1Range(OBJGPU *arg0, struct MemoryManager *arg1) {
2781 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2782 return NV_ERR_NOT_SUPPORTED;
2783 }
2784 #else //__nvoc_mem_mgr_h_disabled
2785 #define memmgrSetMIGPartitionableBAR1Range(arg0, arg1) memmgrSetMIGPartitionableBAR1Range_IMPL(arg0, arg1)
2786 #endif //__nvoc_mem_mgr_h_disabled
2787
2788 struct NV_RANGE memmgrGetMIGPartitionableBAR1Range_IMPL(OBJGPU *arg0, struct MemoryManager *arg1);
2789
2790 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetMIGPartitionableBAR1Range(OBJGPU * arg0,struct MemoryManager * arg1)2791 static inline struct NV_RANGE memmgrGetMIGPartitionableBAR1Range(OBJGPU *arg0, struct MemoryManager *arg1) {
2792 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2793 struct NV_RANGE ret;
2794 portMemSet(&ret, 0, sizeof(struct NV_RANGE));
2795 return ret;
2796 }
2797 #else //__nvoc_mem_mgr_h_disabled
2798 #define memmgrGetMIGPartitionableBAR1Range(arg0, arg1) memmgrGetMIGPartitionableBAR1Range_IMPL(arg0, arg1)
2799 #endif //__nvoc_mem_mgr_h_disabled
2800
2801 void memmgrSetMIGPartitionableMemoryRange_IMPL(OBJGPU *arg0, struct MemoryManager *arg1, struct NV_RANGE arg2);
2802
2803 #ifdef __nvoc_mem_mgr_h_disabled
memmgrSetMIGPartitionableMemoryRange(OBJGPU * arg0,struct MemoryManager * arg1,struct NV_RANGE arg2)2804 static inline void memmgrSetMIGPartitionableMemoryRange(OBJGPU *arg0, struct MemoryManager *arg1, struct NV_RANGE arg2) {
2805 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2806 }
2807 #else //__nvoc_mem_mgr_h_disabled
2808 #define memmgrSetMIGPartitionableMemoryRange(arg0, arg1, arg2) memmgrSetMIGPartitionableMemoryRange_IMPL(arg0, arg1, arg2)
2809 #endif //__nvoc_mem_mgr_h_disabled
2810
2811 struct NV_RANGE memmgrGetMIGPartitionableMemoryRange_IMPL(OBJGPU *arg0, struct MemoryManager *arg1);
2812
2813 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetMIGPartitionableMemoryRange(OBJGPU * arg0,struct MemoryManager * arg1)2814 static inline struct NV_RANGE memmgrGetMIGPartitionableMemoryRange(OBJGPU *arg0, struct MemoryManager *arg1) {
2815 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2816 struct NV_RANGE ret;
2817 portMemSet(&ret, 0, sizeof(struct NV_RANGE));
2818 return ret;
2819 }
2820 #else //__nvoc_mem_mgr_h_disabled
2821 #define memmgrGetMIGPartitionableMemoryRange(arg0, arg1) memmgrGetMIGPartitionableMemoryRange_IMPL(arg0, arg1)
2822 #endif //__nvoc_mem_mgr_h_disabled
2823
2824 NV_STATUS memmgrFreeMIGGPUInstanceMemory_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle hMemory, struct Heap **ppMemoryPartitionHeap);
2825
2826 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFreeMIGGPUInstanceMemory(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU32 swizzId,NvHandle hMemory,struct Heap ** ppMemoryPartitionHeap)2827 static inline NV_STATUS memmgrFreeMIGGPUInstanceMemory(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 swizzId, NvHandle hMemory, struct Heap **ppMemoryPartitionHeap) {
2828 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2829 return NV_ERR_NOT_SUPPORTED;
2830 }
2831 #else //__nvoc_mem_mgr_h_disabled
2832 #define memmgrFreeMIGGPUInstanceMemory(pGpu, pMemoryManager, swizzId, hMemory, ppMemoryPartitionHeap) memmgrFreeMIGGPUInstanceMemory_IMPL(pGpu, pMemoryManager, swizzId, hMemory, ppMemoryPartitionHeap)
2833 #endif //__nvoc_mem_mgr_h_disabled
2834
2835 NV_STATUS memmgrPageLevelPoolsCreate_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2836
2837 #ifdef __nvoc_mem_mgr_h_disabled
memmgrPageLevelPoolsCreate(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2838 static inline NV_STATUS memmgrPageLevelPoolsCreate(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2839 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2840 return NV_ERR_NOT_SUPPORTED;
2841 }
2842 #else //__nvoc_mem_mgr_h_disabled
2843 #define memmgrPageLevelPoolsCreate(pGpu, pMemoryManager) memmgrPageLevelPoolsCreate_IMPL(pGpu, pMemoryManager)
2844 #endif //__nvoc_mem_mgr_h_disabled
2845
2846 void memmgrPageLevelPoolsDestroy_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2847
2848 #ifdef __nvoc_mem_mgr_h_disabled
memmgrPageLevelPoolsDestroy(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2849 static inline void memmgrPageLevelPoolsDestroy(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2850 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2851 }
2852 #else //__nvoc_mem_mgr_h_disabled
2853 #define memmgrPageLevelPoolsDestroy(pGpu, pMemoryManager) memmgrPageLevelPoolsDestroy_IMPL(pGpu, pMemoryManager)
2854 #endif //__nvoc_mem_mgr_h_disabled
2855
2856 NV_STATUS memmgrPageLevelPoolsGetInfo_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, struct RM_POOL_ALLOC_MEM_RESERVE_INFO **arg0);
2857
2858 #ifdef __nvoc_mem_mgr_h_disabled
memmgrPageLevelPoolsGetInfo(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,struct Device * pDevice,struct RM_POOL_ALLOC_MEM_RESERVE_INFO ** arg0)2859 static inline NV_STATUS memmgrPageLevelPoolsGetInfo(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, struct Device *pDevice, struct RM_POOL_ALLOC_MEM_RESERVE_INFO **arg0) {
2860 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2861 return NV_ERR_NOT_SUPPORTED;
2862 }
2863 #else //__nvoc_mem_mgr_h_disabled
2864 #define memmgrPageLevelPoolsGetInfo(pGpu, pMemoryManager, pDevice, arg0) memmgrPageLevelPoolsGetInfo_IMPL(pGpu, pMemoryManager, pDevice, arg0)
2865 #endif //__nvoc_mem_mgr_h_disabled
2866
2867 NV_STATUS memmgrAllocMIGMemoryAllocationInternalHandles_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2868
2869 #ifdef __nvoc_mem_mgr_h_disabled
memmgrAllocMIGMemoryAllocationInternalHandles(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2870 static inline NV_STATUS memmgrAllocMIGMemoryAllocationInternalHandles(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2871 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2872 return NV_ERR_NOT_SUPPORTED;
2873 }
2874 #else //__nvoc_mem_mgr_h_disabled
2875 #define memmgrAllocMIGMemoryAllocationInternalHandles(pGpu, pMemoryManager) memmgrAllocMIGMemoryAllocationInternalHandles_IMPL(pGpu, pMemoryManager)
2876 #endif //__nvoc_mem_mgr_h_disabled
2877
2878 void memmgrFreeMIGMemoryAllocationInternalHandles_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2879
2880 #ifdef __nvoc_mem_mgr_h_disabled
memmgrFreeMIGMemoryAllocationInternalHandles(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2881 static inline void memmgrFreeMIGMemoryAllocationInternalHandles(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2882 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2883 }
2884 #else //__nvoc_mem_mgr_h_disabled
2885 #define memmgrFreeMIGMemoryAllocationInternalHandles(pGpu, pMemoryManager) memmgrFreeMIGMemoryAllocationInternalHandles_IMPL(pGpu, pMemoryManager)
2886 #endif //__nvoc_mem_mgr_h_disabled
2887
2888 void memmgrGetFreeMemoryForAllMIGGPUInstances_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pBytes);
2889
2890 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetFreeMemoryForAllMIGGPUInstances(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * pBytes)2891 static inline void memmgrGetFreeMemoryForAllMIGGPUInstances(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pBytes) {
2892 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2893 }
2894 #else //__nvoc_mem_mgr_h_disabled
2895 #define memmgrGetFreeMemoryForAllMIGGPUInstances(pGpu, pMemoryManager, pBytes) memmgrGetFreeMemoryForAllMIGGPUInstances_IMPL(pGpu, pMemoryManager, pBytes)
2896 #endif //__nvoc_mem_mgr_h_disabled
2897
2898 void memmgrGetTotalMemoryForAllMIGGPUInstances_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pBytes);
2899
2900 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetTotalMemoryForAllMIGGPUInstances(OBJGPU * pGpu,struct MemoryManager * pMemoryManager,NvU64 * pBytes)2901 static inline void memmgrGetTotalMemoryForAllMIGGPUInstances(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pBytes) {
2902 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2903 }
2904 #else //__nvoc_mem_mgr_h_disabled
2905 #define memmgrGetTotalMemoryForAllMIGGPUInstances(pGpu, pMemoryManager, pBytes) memmgrGetTotalMemoryForAllMIGGPUInstances_IMPL(pGpu, pMemoryManager, pBytes)
2906 #endif //__nvoc_mem_mgr_h_disabled
2907
2908 void memmgrGetTopLevelScrubberStatus_IMPL(OBJGPU *arg0, struct MemoryManager *arg1, NvBool *pbTopLevelScrubberEnabled, NvBool *pbTopLevelScrubberConstructed);
2909
2910 #ifdef __nvoc_mem_mgr_h_disabled
memmgrGetTopLevelScrubberStatus(OBJGPU * arg0,struct MemoryManager * arg1,NvBool * pbTopLevelScrubberEnabled,NvBool * pbTopLevelScrubberConstructed)2911 static inline void memmgrGetTopLevelScrubberStatus(OBJGPU *arg0, struct MemoryManager *arg1, NvBool *pbTopLevelScrubberEnabled, NvBool *pbTopLevelScrubberConstructed) {
2912 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2913 }
2914 #else //__nvoc_mem_mgr_h_disabled
2915 #define memmgrGetTopLevelScrubberStatus(arg0, arg1, pbTopLevelScrubberEnabled, pbTopLevelScrubberConstructed) memmgrGetTopLevelScrubberStatus_IMPL(arg0, arg1, pbTopLevelScrubberEnabled, pbTopLevelScrubberConstructed)
2916 #endif //__nvoc_mem_mgr_h_disabled
2917
2918 MEMORY_DESCRIPTOR *memmgrMemUtilsGetMemDescFromHandle_IMPL(struct MemoryManager *pMemoryManager, NvHandle hClient, NvHandle hMemory);
2919
2920 #ifdef __nvoc_mem_mgr_h_disabled
memmgrMemUtilsGetMemDescFromHandle(struct MemoryManager * pMemoryManager,NvHandle hClient,NvHandle hMemory)2921 static inline MEMORY_DESCRIPTOR *memmgrMemUtilsGetMemDescFromHandle(struct MemoryManager *pMemoryManager, NvHandle hClient, NvHandle hMemory) {
2922 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2923 return NULL;
2924 }
2925 #else //__nvoc_mem_mgr_h_disabled
2926 #define memmgrMemUtilsGetMemDescFromHandle(pMemoryManager, hClient, hMemory) memmgrMemUtilsGetMemDescFromHandle_IMPL(pMemoryManager, hClient, hMemory)
2927 #endif //__nvoc_mem_mgr_h_disabled
2928
2929 NV_STATUS memmgrVerifyGspDmaOps_IMPL(OBJGPU *arg0, struct MemoryManager *arg1);
2930
2931 #ifdef __nvoc_mem_mgr_h_disabled
memmgrVerifyGspDmaOps(OBJGPU * arg0,struct MemoryManager * arg1)2932 static inline NV_STATUS memmgrVerifyGspDmaOps(OBJGPU *arg0, struct MemoryManager *arg1) {
2933 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2934 return NV_ERR_NOT_SUPPORTED;
2935 }
2936 #else //__nvoc_mem_mgr_h_disabled
2937 #define memmgrVerifyGspDmaOps(arg0, arg1) memmgrVerifyGspDmaOps_IMPL(arg0, arg1)
2938 #endif //__nvoc_mem_mgr_h_disabled
2939
2940 NV_STATUS memmgrReserveMemoryForFsp_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager);
2941
2942 #ifdef __nvoc_mem_mgr_h_disabled
memmgrReserveMemoryForFsp(OBJGPU * pGpu,struct MemoryManager * pMemoryManager)2943 static inline NV_STATUS memmgrReserveMemoryForFsp(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) {
2944 NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!");
2945 return NV_ERR_NOT_SUPPORTED;
2946 }
2947 #else //__nvoc_mem_mgr_h_disabled
2948 #define memmgrReserveMemoryForFsp(pGpu, pMemoryManager) memmgrReserveMemoryForFsp_IMPL(pGpu, pMemoryManager)
2949 #endif //__nvoc_mem_mgr_h_disabled
2950
2951 #undef PRIVATE_FIELD
2952
2953
2954 #endif // MEM_MGR_H
2955
2956 #ifdef __cplusplus
2957 } // extern "C"
2958 #endif
2959
2960 #endif // _G_MEM_MGR_NVOC_H_
2961