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Searched defs:misc_regs (Results 1 – 25 of 76) sorted by relevance

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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h27 struct misc_regs { struct
28 u32 auto_cfg_reg; /* 0x0 */
30 u32 pll1_cntl; /* 0x8 */
31 u32 pll1_frq; /* 0xc */
32 u32 pll1_mod; /* 0x10 */
33 u32 pll2_cntl; /* 0x14 */
34 u32 pll2_frq; /* 0x18 */
35 u32 pll2_mod; /* 0x1C */
41 u32 ras_clken; /* 0x34 */
44 u32 ras_rst; /* 0x40 */
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h27 struct misc_regs { struct
28 u32 auto_cfg_reg; /* 0x0 */
30 u32 pll1_cntl; /* 0x8 */
31 u32 pll1_frq; /* 0xc */
32 u32 pll1_mod; /* 0x10 */
33 u32 pll2_cntl; /* 0x14 */
34 u32 pll2_frq; /* 0x18 */
35 u32 pll2_mod; /* 0x1C */
41 u32 ras_clken; /* 0x34 */
44 u32 ras_rst; /* 0x40 */
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h27 struct misc_regs { struct
28 u32 auto_cfg_reg; /* 0x0 */
30 u32 pll1_cntl; /* 0x8 */
31 u32 pll1_frq; /* 0xc */
32 u32 pll1_mod; /* 0x10 */
33 u32 pll2_cntl; /* 0x14 */
34 u32 pll2_frq; /* 0x18 */
35 u32 pll2_mod; /* 0x1C */
41 u32 ras_clken; /* 0x34 */
44 u32 ras_rst; /* 0x40 */
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h27 struct misc_regs { struct
28 u32 auto_cfg_reg; /* 0x0 */
30 u32 pll1_cntl; /* 0x8 */
31 u32 pll1_frq; /* 0xc */
32 u32 pll1_mod; /* 0x10 */
33 u32 pll2_cntl; /* 0x14 */
34 u32 pll2_frq; /* 0x18 */
35 u32 pll2_mod; /* 0x1C */
41 u32 ras_clken; /* 0x34 */
44 u32 ras_rst; /* 0x40 */
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h27 struct misc_regs { struct
28 u32 auto_cfg_reg; /* 0x0 */
30 u32 pll1_cntl; /* 0x8 */
31 u32 pll1_frq; /* 0xc */
32 u32 pll1_mod; /* 0x10 */
33 u32 pll2_cntl; /* 0x14 */
34 u32 pll2_frq; /* 0x18 */
35 u32 pll2_mod; /* 0x1C */
41 u32 ras_clken; /* 0x34 */
44 u32 ras_rst; /* 0x40 */
[all …]
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h27 struct misc_regs { struct
28 u32 auto_cfg_reg; /* 0x0 */
30 u32 pll1_cntl; /* 0x8 */
31 u32 pll1_frq; /* 0xc */
32 u32 pll1_mod; /* 0x10 */
33 u32 pll2_cntl; /* 0x14 */
34 u32 pll2_frq; /* 0x18 */
35 u32 pll2_mod; /* 0x1C */
41 u32 ras_clken; /* 0x34 */
44 u32 ras_rst; /* 0x40 */
[all …]
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h27 struct misc_regs { struct
28 u32 auto_cfg_reg; /* 0x0 */
30 u32 pll1_cntl; /* 0x8 */
31 u32 pll1_frq; /* 0xc */
32 u32 pll1_mod; /* 0x10 */
33 u32 pll2_cntl; /* 0x14 */
34 u32 pll2_frq; /* 0x18 */
35 u32 pll2_mod; /* 0x1C */
41 u32 ras_clken; /* 0x34 */
44 u32 ras_rst; /* 0x40 */
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-spear/
H A Dspr_misc.h10 struct misc_regs { struct
11 u32 auto_cfg_reg; /* 0x0 */
13 u32 pll1_cntl; /* 0x8 */
14 u32 pll1_frq; /* 0xc */
15 u32 pll1_mod; /* 0x10 */
16 u32 pll2_cntl; /* 0x14 */
17 u32 pll2_frq; /* 0x18 */
18 u32 pll2_mod; /* 0x1C */
19 u32 pll_ctr_reg; /* 0x20 */
24 u32 ras_clken; /* 0x34 */
[all …]

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