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Searched defs:mmCGTS_CU0_LDS_SQ_CTRL_REG (Results 1 – 7 of 7) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6253 #define mmCGTS_CU0_LDS_SQ_CTRL_REG … macro
H A Dgc_9_1_offset.h6532 #define mmCGTS_CU0_LDS_SQ_CTRL_REG … macro
H A Dgc_9_2_1_offset.h6544 #define mmCGTS_CU0_LDS_SQ_CTRL_REG … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1486 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro
H A Dgfx_7_2_d.h1507 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro
H A Dgfx_8_0_d.h1700 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro
H A Dgfx_8_1_d.h1668 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro