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Searched defs:mmRLC_SPM_SEGMENT_THRESHOLD_BASE_IDX (Results 1 – 3 of 3) sorted by last modified time

/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h6069 #define mmRLC_SPM_SEGMENT_THRESHOLD_BASE_IDX … macro
H A Dgc_9_1_offset.h6109 #define mmRLC_SPM_SEGMENT_THRESHOLD_BASE_IDX … macro
H A Dgc_9_0_offset.h5822 #define mmRLC_SPM_SEGMENT_THRESHOLD_BASE_IDX … macro