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Searched defs:mmSDMA0_RLC0_WATERMARK_BASE_IDX (Results 1 – 2 of 2) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_0_offset.h421 #define mmSDMA0_RLC0_WATERMARK_BASE_IDX 0 macro
H A Dsdma0_4_1_offset.h333 #define mmSDMA0_RLC0_WATERMARK_BASE_IDX macro