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Searched defs:mmSPI_PS_INPUT_CNTL_25 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1238 #define mmSPI_PS_INPUT_CNTL_25 0xA1AA macro
H A Dgfx_7_0_d.h1386 #define mmSPI_PS_INPUT_CNTL_25 0xa1aa macro
H A Dgfx_7_2_d.h1403 #define mmSPI_PS_INPUT_CNTL_25 0xa1aa macro
H A Dgfx_8_0_d.h1582 #define mmSPI_PS_INPUT_CNTL_25 0xa1aa macro
H A Dgfx_8_1_d.h1550 #define mmSPI_PS_INPUT_CNTL_25 0xa1aa macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3849 #define mmSPI_PS_INPUT_CNTL_25 … macro
H A Dgc_9_1_offset.h4136 #define mmSPI_PS_INPUT_CNTL_25 … macro
H A Dgc_9_2_1_offset.h4088 #define mmSPI_PS_INPUT_CNTL_25 … macro