1 /*
2  * Simulator of microcontrollers (z80cl.h)
3  *
4  * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
5  *
6  * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
7  *
8  */
9 
10 /* This file is part of microcontroller simulator: ucsim.
11 
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16 
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20 GNU General Public License for more details.
21 
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING.  If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 02111-1307, USA. */
26 /*@1@*/
27 
28 #ifndef R2KCL_HEADER
29 #define R2KCL_HEADER
30 
31 #include "z80cl.h"
32 
33   /* TODO: maybe this should become an enum */
34 #define IOI  1  // next instruction uses internal I/O space
35 #define IOE  2  // next instruction uses external I/O space
36 
37 #define MMIDR 0x10   /* MMU Instruction/Data Register */
38 #define SADR  0xC0   /* Serial A Data Register in IOI (internal I/O space) */
39 
40 
41 class cl_r2k;
42 
43 class rabbit_mmu {
44 public:
45   cl_r2k     *parent_p;
46 
47   /* Note: DEF_REGPAIR is defined in regsz80.h */
48 
49   u8_t  xpc;
50   u8_t  dataseg;
51   u8_t  stackseg;
52   u8_t  segsize;
53 
54   u8_t  io_flag; /* pseudo register for ioi/ioe prefixes */
55 
56   u8_t  mmidr;  /* MMU Instruction/Data Register __at 0x10 */
57 
rabbit_mmu(cl_r2k * parent_ip)58   rabbit_mmu( cl_r2k *parent_ip ):parent_p(parent_ip),
59     xpc(0), dataseg(0), stackseg(0), segsize(0xFF)
60     { }
61 
62   u32_t/*TYPE_UDWORD*/  logical_addr_to_phys( u16_t logical_addr );
63 };
64 
65 
66 class cl_r2k: public cl_z80
67 {
68 public:
69   // from cl_z80:
70   //class cl_memory *ram;
71   //class cl_memory *rom;
72   //struct t_regs regs;
73 
74   rabbit_mmu   mmu;
75 
76   u16_t ins_start;  /* PC value for start of the current instruction */
77   u8_t ip;  /* interrupt priority register */
78 
79   /* iir, eir registers are not full supported */
80   u8_t iir;
81   u8_t eir;
82 
83   /* see Rabbit Family of Microprocessors: Instruction Reference Manual */
84   /*   019-0098 * 090409-L */
85 
86 
87 public:
88   cl_r2k(struct cpu_entry *Itype, class cl_sim *asim);
89   virtual int init(void);
90   virtual char *id_string(void);
91 
92   //virtual t_addr get_mem_size(enum mem_class type);
93   virtual void mk_hw_elements(void);
94   virtual void make_memories(void);
95 
96   virtual struct dis_entry *dis_tbl(void);
97   virtual int inst_length(t_addr addr);
98   virtual int inst_branch(t_addr addr);
99   virtual int longest_inst(void);
100   virtual char *disass(t_addr addr, const char *sep);
101   virtual void print_regs(class cl_console_base *con);
102 
103   virtual int exec_inst(void);
104   virtual int exec_code(t_mem code);
105 
106   virtual const char *get_disasm_info(t_addr addr,
107                         int *ret_len,
108                         int *ret_branch,
109                         int *immed_offset);
110 
111 
112   virtual void store1( u16_t addr, t_mem val );
113   virtual void store2( u16_t addr, u16_t val );
114 
115   virtual u8_t  get1( u16_t addr );
116   virtual u16_t  get2( u16_t addr );
117 
118   virtual t_mem       fetch1( void );
119   virtual u16_t  fetch2( void );
120 
121   virtual t_mem fetch(void);
fetch(t_mem * code)122   virtual bool fetch(t_mem *code) {
123     return cl_uc::fetch(code);
124   }
125 
126   // see #include "instcl.h" for Z80 versions
127   /* instruction function that are add / modified from the Z80 versions */
128   virtual int inst_rst(t_mem code);
129 
130   virtual int inst_add_sp_d(t_mem code);
131   virtual int inst_altd(t_mem code);
132 
133   virtual int inst_bool   (t_mem code);
134   virtual int inst_r2k_ld (t_mem code);
135   virtual int inst_r2k_and(t_mem code);
136   virtual int inst_r2k_or (t_mem code);
137   virtual int inst_r2k_ex (t_mem code);
138 
139   virtual int inst_ljp(t_mem code);
140   virtual int inst_lcall(t_mem code);
141   virtual int inst_mul(t_mem code);
142 
143   virtual int inst_rl_de(t_mem code);
144   virtual int inst_rr_de(t_mem code);
145   virtual int inst_rr_hl(t_mem code);
146 
147   virtual int inst_xd(t_mem prefix);
148 
149   //virtual int inst_ed(void);
150   virtual int inst_ed_(t_mem code);
151 
152 };
153 
154 class cl_r3ka: public cl_r2k {
155  public:
156 
157   u8_t  SU;
158 
159   cl_r3ka(struct cpu_entry *Itype, class cl_sim *asim);
160   virtual char *id_string(void);
161 
162   virtual int exec_code(t_mem code);
163 
164   virtual int inst_ed_(t_mem code);
165 };
166 
167 #endif /* R2KCL_HEADER */
168