1 /* $NetBSD: amdgpu_info_packet.c,v 1.2 2021/12/18 23:45:07 riastradh Exp $ */
2
3 /*
4 * Copyright 2018 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: amdgpu_info_packet.c,v 1.2 2021/12/18 23:45:07 riastradh Exp $");
30
31 #include "mod_info_packet.h"
32 #include "core_types.h"
33 #include "dc_types.h"
34 #include "mod_shared.h"
35 #include "mod_freesync.h"
36 #include "dc.h"
37
38 enum vsc_packet_revision {
39 vsc_packet_undefined = 0,
40 //01h = VSC SDP supports only 3D stereo.
41 vsc_packet_rev1 = 1,
42 //02h = 3D stereo + PSR.
43 vsc_packet_rev2 = 2,
44 //03h = 3D stereo + PSR2.
45 vsc_packet_rev3 = 3,
46 //04h = 3D stereo + PSR/PSR2 + Y-coordinate.
47 vsc_packet_rev4 = 4,
48 //05h = 3D stereo + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format
49 vsc_packet_rev5 = 5,
50 };
51
52 #define HDMI_INFOFRAME_TYPE_VENDOR 0x81
53 #define HF_VSIF_VERSION 1
54
55 // VTEM Byte Offset
56 #define VTEM_PB0 0
57 #define VTEM_PB1 1
58 #define VTEM_PB2 2
59 #define VTEM_PB3 3
60 #define VTEM_PB4 4
61 #define VTEM_PB5 5
62 #define VTEM_PB6 6
63
64 #define VTEM_MD0 7
65 #define VTEM_MD1 8
66 #define VTEM_MD2 9
67 #define VTEM_MD3 10
68
69
70 // VTEM Byte Masks
71 //PB0
72 #define MASK_VTEM_PB0__RESERVED0 0x01
73 #define MASK_VTEM_PB0__SYNC 0x02
74 #define MASK_VTEM_PB0__VFR 0x04
75 #define MASK_VTEM_PB0__AFR 0x08
76 #define MASK_VTEM_PB0__DS_TYPE 0x30
77 //0: Periodic pseudo-static EM Data Set
78 //1: Periodic dynamic EM Data Set
79 //2: Unique EM Data Set
80 //3: Reserved
81 #define MASK_VTEM_PB0__END 0x40
82 #define MASK_VTEM_PB0__NEW 0x80
83
84 //PB1
85 #define MASK_VTEM_PB1__RESERVED1 0xFF
86
87 //PB2
88 #define MASK_VTEM_PB2__ORGANIZATION_ID 0xFF
89 //0: This is a Vendor Specific EM Data Set
90 //1: This EM Data Set is defined by This Specification (HDMI 2.1 r102.clean)
91 //2: This EM Data Set is defined by CTA-861-G
92 //3: This EM Data Set is defined by VESA
93 //PB3
94 #define MASK_VTEM_PB3__DATA_SET_TAG_MSB 0xFF
95 //PB4
96 #define MASK_VTEM_PB4__DATA_SET_TAG_LSB 0xFF
97 //PB5
98 #define MASK_VTEM_PB5__DATA_SET_LENGTH_MSB 0xFF
99 //PB6
100 #define MASK_VTEM_PB6__DATA_SET_LENGTH_LSB 0xFF
101
102
103
104 //PB7-27 (20 bytes):
105 //PB7 = MD0
106 #define MASK_VTEM_MD0__VRR_EN 0x01
107 #define MASK_VTEM_MD0__M_CONST 0x02
108 #define MASK_VTEM_MD0__RESERVED2 0x0C
109 #define MASK_VTEM_MD0__FVA_FACTOR_M1 0xF0
110
111 //MD1
112 #define MASK_VTEM_MD1__BASE_VFRONT 0xFF
113
114 //MD2
115 #define MASK_VTEM_MD2__BASE_REFRESH_RATE_98 0x03
116 #define MASK_VTEM_MD2__RB 0x04
117 #define MASK_VTEM_MD2__RESERVED3 0xF8
118
119 //MD3
120 #define MASK_VTEM_MD3__BASE_REFRESH_RATE_07 0xFF
121
122 enum ColorimetryRGBDP {
123 ColorimetryRGB_DP_sRGB = 0,
124 ColorimetryRGB_DP_AdobeRGB = 3,
125 ColorimetryRGB_DP_P3 = 4,
126 ColorimetryRGB_DP_CustomColorProfile = 5,
127 ColorimetryRGB_DP_ITU_R_BT2020RGB = 6,
128 };
129 enum ColorimetryYCCDP {
130 ColorimetryYCC_DP_ITU601 = 0,
131 ColorimetryYCC_DP_ITU709 = 1,
132 ColorimetryYCC_DP_AdobeYCC = 5,
133 ColorimetryYCC_DP_ITU2020YCC = 6,
134 ColorimetryYCC_DP_ITU2020YCbCr = 7,
135 };
136
mod_build_vsc_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet,bool * use_vsc_sdp_for_colorimetry)137 void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
138 struct dc_info_packet *info_packet,
139 bool *use_vsc_sdp_for_colorimetry)
140 {
141 unsigned int vsc_packet_revision = vsc_packet_undefined;
142 unsigned int i;
143 unsigned int pixelEncoding = 0;
144 unsigned int colorimetryFormat = 0;
145 bool stereo3dSupport = false;
146
147 /* Initialize first, later if infopacket is valid determine if VSC SDP
148 * should be used to signal colorimetry format and pixel encoding.
149 */
150 *use_vsc_sdp_for_colorimetry = false;
151
152 if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) {
153 vsc_packet_revision = vsc_packet_rev1;
154 stereo3dSupport = true;
155 }
156
157 /*VSC packet set to 2 when DP revision >= 1.2*/
158 if (stream->psr_version != 0)
159 vsc_packet_revision = vsc_packet_rev2;
160
161 /* Update to revision 5 for extended colorimetry support for DPCD 1.4+ */
162 if (stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&
163 stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED)
164 vsc_packet_revision = vsc_packet_rev5;
165
166 /* VSC packet not needed based on the features
167 * supported by this DP display
168 */
169 if (vsc_packet_revision == vsc_packet_undefined)
170 return;
171
172 if (vsc_packet_revision == vsc_packet_rev2) {
173 /* Secondary-data Packet ID = 0*/
174 info_packet->hb0 = 0x00;
175 /* 07h - Packet Type Value indicating Video
176 * Stream Configuration packet
177 */
178 info_packet->hb1 = 0x07;
179 /* 02h = VSC SDP supporting 3D stereo and PSR
180 * (applies to eDP v1.3 or higher).
181 */
182 info_packet->hb2 = 0x02;
183 /* 08h = VSC packet supporting 3D stereo + PSR
184 * (HB2 = 02h).
185 */
186 info_packet->hb3 = 0x08;
187
188 for (i = 0; i < 28; i++)
189 info_packet->sb[i] = 0;
190
191 info_packet->valid = true;
192 }
193
194 if (vsc_packet_revision == vsc_packet_rev1) {
195
196 info_packet->hb0 = 0x00; // Secondary-data Packet ID = 0
197 info_packet->hb1 = 0x07; // 07h = Packet Type Value indicating Video Stream Configuration packet
198 info_packet->hb2 = 0x01; // 01h = Revision number. VSC SDP supporting 3D stereo only
199 info_packet->hb3 = 0x01; // 01h = VSC SDP supporting 3D stereo only (HB2 = 01h).
200
201 info_packet->valid = true;
202 }
203
204 if (stereo3dSupport) {
205 /* ==============================================================================================================|
206 * A. STEREO 3D
207 * ==============================================================================================================|
208 * VSC Payload (1 byte) From DP1.2 spec
209 *
210 * Bits 3:0 (Stereo Interface Method Code) | Bits 7:4 (Stereo Interface Method Specific Parameter)
211 * -----------------------------------------------------------------------------------------------------
212 * 0 = Non Stereo Video | Must be set to 0x0
213 * -----------------------------------------------------------------------------------------------------
214 * 1 = Frame/Field Sequential | 0x0: L + R view indication based on MISC1 bit 2:1
215 * | 0x1: Right when Stereo Signal = 1
216 * | 0x2: Left when Stereo Signal = 1
217 * | (others reserved)
218 * -----------------------------------------------------------------------------------------------------
219 * 2 = Stacked Frame | 0x0: Left view is on top and right view on bottom
220 * | (others reserved)
221 * -----------------------------------------------------------------------------------------------------
222 * 3 = Pixel Interleaved | 0x0: horiz interleaved, right view pixels on even lines
223 * | 0x1: horiz interleaved, right view pixels on odd lines
224 * | 0x2: checker board, start with left view pixel
225 * | 0x3: vertical interleaved, start with left view pixels
226 * | 0x4: vertical interleaved, start with right view pixels
227 * | (others reserved)
228 * -----------------------------------------------------------------------------------------------------
229 * 4 = Side-by-side | 0x0: left half represents left eye view
230 * | 0x1: left half represents right eye view
231 */
232 switch (stream->timing.timing_3d_format) {
233 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
234 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
235 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
236 case TIMING_3D_FORMAT_TB_SW_PACKED:
237 info_packet->sb[0] = 0x02; // Stacked Frame, Left view is on top and right view on bottom.
238 break;
239 case TIMING_3D_FORMAT_DP_HDMI_INBAND_FA:
240 case TIMING_3D_FORMAT_INBAND_FA:
241 info_packet->sb[0] = 0x01; // Frame/Field Sequential, L + R view indication based on MISC1 bit 2:1
242 break;
243 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
244 case TIMING_3D_FORMAT_SBS_SW_PACKED:
245 info_packet->sb[0] = 0x04; // Side-by-side
246 break;
247 default:
248 info_packet->sb[0] = 0x00; // No Stereo Video, Shall be cleared to 0x0.
249 break;
250 }
251
252 }
253
254 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication.
255 * Added in DP1.3, a DP Source device is allowed to indicate the pixel encoding/colorimetry
256 * format to the DP Sink device with VSC SDP only when the DP Sink device supports it
257 * (i.e., VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST
258 * register (DPCD Address 02210h, bit 3) is set to 1).
259 * (Requires VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit set to 1 in DPCD 02210h. This
260 * DPCD register is exposed in the new Extended Receiver Capability field for DPCD Rev. 1.4
261 * (and higher). When MISC1. bit 6. is Set to 1, a Source device uses a VSC SDP to indicate
262 * the Pixel Encoding/Colorimetry Format and that a Sink device must ignore MISC1, bit 7, and
263 * MISC0, bits 7:1 (MISC1, bit 7. and MISC0, bits 7:1 become "don't care").)
264 */
265 if (vsc_packet_revision == vsc_packet_rev5) {
266 /* Secondary-data Packet ID = 0 */
267 info_packet->hb0 = 0x00;
268 /* 07h - Packet Type Value indicating Video Stream Configuration packet */
269 info_packet->hb1 = 0x07;
270 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication. */
271 info_packet->hb2 = 0x05;
272 /* 13h = VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/Colorimetry Format indication (HB2 = 05h). */
273 info_packet->hb3 = 0x13;
274
275 info_packet->valid = true;
276
277 /* If we are using VSC SDP revision 05h, use this to signal for
278 * colorimetry format and pixel encoding. HW should later be
279 * programmed to set MSA MISC1 bit 6 to indicate ignore
280 * colorimetry format and pixel encoding in the MSA.
281 */
282 *use_vsc_sdp_for_colorimetry = true;
283
284 /* Set VSC SDP fields for pixel encoding and colorimetry format from DP 1.3 specs
285 * Data Bytes DB 18~16
286 * Bits 3:0 (Colorimetry Format) | Bits 7:4 (Pixel Encoding)
287 * ----------------------------------------------------------------------------------------------------
288 * 0x0 = sRGB | 0 = RGB
289 * 0x1 = RGB Wide Gamut Fixed Point
290 * 0x2 = RGB Wide Gamut Floating Point
291 * 0x3 = AdobeRGB
292 * 0x4 = DCI-P3
293 * 0x5 = CustomColorProfile
294 * (others reserved)
295 * ----------------------------------------------------------------------------------------------------
296 * 0x0 = ITU-R BT.601 | 1 = YCbCr444
297 * 0x1 = ITU-R BT.709
298 * 0x2 = xvYCC601
299 * 0x3 = xvYCC709
300 * 0x4 = sYCC601
301 * 0x5 = AdobeYCC601
302 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
303 * 0x7 = ITU-R BT.2020 Y'C'bC'r
304 * (others reserved)
305 * ----------------------------------------------------------------------------------------------------
306 * 0x0 = ITU-R BT.601 | 2 = YCbCr422
307 * 0x1 = ITU-R BT.709
308 * 0x2 = xvYCC601
309 * 0x3 = xvYCC709
310 * 0x4 = sYCC601
311 * 0x5 = AdobeYCC601
312 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
313 * 0x7 = ITU-R BT.2020 Y'C'bC'r
314 * (others reserved)
315 * ----------------------------------------------------------------------------------------------------
316 * 0x0 = ITU-R BT.601 | 3 = YCbCr420
317 * 0x1 = ITU-R BT.709
318 * 0x2 = xvYCC601
319 * 0x3 = xvYCC709
320 * 0x4 = sYCC601
321 * 0x5 = AdobeYCC601
322 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
323 * 0x7 = ITU-R BT.2020 Y'C'bC'r
324 * (others reserved)
325 * ----------------------------------------------------------------------------------------------------
326 * 0x0 =DICOM Part14 Grayscale | 4 = Yonly
327 * Display Function
328 * (others reserved)
329 */
330
331 /* Set Pixel Encoding */
332 switch (stream->timing.pixel_encoding) {
333 case PIXEL_ENCODING_RGB:
334 pixelEncoding = 0x0; /* RGB = 0h */
335 break;
336 case PIXEL_ENCODING_YCBCR444:
337 pixelEncoding = 0x1; /* YCbCr444 = 1h */
338 break;
339 case PIXEL_ENCODING_YCBCR422:
340 pixelEncoding = 0x2; /* YCbCr422 = 2h */
341 break;
342 case PIXEL_ENCODING_YCBCR420:
343 pixelEncoding = 0x3; /* YCbCr420 = 3h */
344 break;
345 default:
346 pixelEncoding = 0x0; /* default RGB = 0h */
347 break;
348 }
349
350 /* Set Colorimetry format based on pixel encoding */
351 switch (stream->timing.pixel_encoding) {
352 case PIXEL_ENCODING_RGB:
353 if ((stream->output_color_space == COLOR_SPACE_SRGB) ||
354 (stream->output_color_space == COLOR_SPACE_SRGB_LIMITED))
355 colorimetryFormat = ColorimetryRGB_DP_sRGB;
356 else if (stream->output_color_space == COLOR_SPACE_ADOBERGB)
357 colorimetryFormat = ColorimetryRGB_DP_AdobeRGB;
358 else if ((stream->output_color_space == COLOR_SPACE_2020_RGB_FULLRANGE) ||
359 (stream->output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE))
360 colorimetryFormat = ColorimetryRGB_DP_ITU_R_BT2020RGB;
361 break;
362
363 case PIXEL_ENCODING_YCBCR444:
364 case PIXEL_ENCODING_YCBCR422:
365 case PIXEL_ENCODING_YCBCR420:
366 /* Note: xvYCC probably not supported correctly here on DP since colorspace translation
367 * loses distinction between BT601 vs xvYCC601 in translation
368 */
369 if (stream->output_color_space == COLOR_SPACE_YCBCR601)
370 colorimetryFormat = ColorimetryYCC_DP_ITU601;
371 else if (stream->output_color_space == COLOR_SPACE_YCBCR709)
372 colorimetryFormat = ColorimetryYCC_DP_ITU709;
373 else if (stream->output_color_space == COLOR_SPACE_ADOBERGB)
374 colorimetryFormat = ColorimetryYCC_DP_AdobeYCC;
375 else if (stream->output_color_space == COLOR_SPACE_2020_YCBCR)
376 colorimetryFormat = ColorimetryYCC_DP_ITU2020YCbCr;
377 break;
378
379 default:
380 colorimetryFormat = ColorimetryRGB_DP_sRGB;
381 break;
382 }
383
384 info_packet->sb[16] = (pixelEncoding << 4) | colorimetryFormat;
385
386 /* Set color depth */
387 switch (stream->timing.display_color_depth) {
388 case COLOR_DEPTH_666:
389 /* NOTE: This is actually not valid for YCbCr pixel encoding to have 6 bpc
390 * as of DP1.4 spec, but value of 0 probably reserved here for potential future use.
391 */
392 info_packet->sb[17] = 0;
393 break;
394 case COLOR_DEPTH_888:
395 info_packet->sb[17] = 1;
396 break;
397 case COLOR_DEPTH_101010:
398 info_packet->sb[17] = 2;
399 break;
400 case COLOR_DEPTH_121212:
401 info_packet->sb[17] = 3;
402 break;
403 /*case COLOR_DEPTH_141414: -- NO SUCH FORMAT IN DP SPEC */
404 case COLOR_DEPTH_161616:
405 info_packet->sb[17] = 4;
406 break;
407 default:
408 info_packet->sb[17] = 0;
409 break;
410 }
411
412 /* all YCbCr are always limited range */
413 if ((stream->output_color_space == COLOR_SPACE_SRGB_LIMITED) ||
414 (stream->output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE) ||
415 (pixelEncoding != 0x0)) {
416 info_packet->sb[17] |= 0x80; /* DB17 bit 7 set to 1 for CEA timing. */
417 }
418
419 /* Content Type (Bits 2:0)
420 * 0 = Not defined.
421 * 1 = Graphics.
422 * 2 = Photo.
423 * 3 = Video.
424 * 4 = Game.
425 */
426 info_packet->sb[18] = 0;
427 }
428 }
429
430 /**
431 *****************************************************************************
432 * Function: mod_build_hf_vsif_infopacket
433 *
434 * @brief
435 * Prepare HDMI Vendor Specific info frame.
436 * Follows HDMI Spec to build up Vendor Specific info frame
437 *
438 * @param [in] stream: contains data we may need to construct VSIF (i.e. timing_3d_format, etc.)
439 * @param [out] info_packet: output structure where to store VSIF
440 *****************************************************************************
441 */
mod_build_hf_vsif_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet,int ALLMEnabled,int ALLMValue)442 void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,
443 struct dc_info_packet *info_packet, int ALLMEnabled, int ALLMValue)
444 {
445 unsigned int length = 5;
446 bool hdmi_vic_mode = false;
447 uint8_t checksum = 0;
448 uint32_t i = 0;
449 enum dc_timing_3d_format format;
450 bool bALLM = (bool)ALLMEnabled;
451 bool bALLMVal = (bool)ALLMValue;
452
453 info_packet->valid = false;
454 format = stream->timing.timing_3d_format;
455 if (stream->view_format == VIEW_3D_FORMAT_NONE)
456 format = TIMING_3D_FORMAT_NONE;
457
458 if (stream->timing.hdmi_vic != 0
459 && stream->timing.h_total >= 3840
460 && stream->timing.v_total >= 2160
461 && format == TIMING_3D_FORMAT_NONE)
462 hdmi_vic_mode = true;
463
464 if ((format == TIMING_3D_FORMAT_NONE) && !hdmi_vic_mode && !bALLM)
465 return;
466
467 info_packet->sb[1] = 0x03;
468 info_packet->sb[2] = 0x0C;
469 info_packet->sb[3] = 0x00;
470
471 if (bALLM) {
472 info_packet->sb[1] = 0xD8;
473 info_packet->sb[2] = 0x5D;
474 info_packet->sb[3] = 0xC4;
475 info_packet->sb[4] = HF_VSIF_VERSION;
476 }
477
478 if (format != TIMING_3D_FORMAT_NONE)
479 info_packet->sb[4] = (2 << 5);
480
481 else if (hdmi_vic_mode)
482 info_packet->sb[4] = (1 << 5);
483
484 switch (format) {
485 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
486 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
487 info_packet->sb[5] = (0x0 << 4);
488 break;
489
490 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
491 case TIMING_3D_FORMAT_SBS_SW_PACKED:
492 info_packet->sb[5] = (0x8 << 4);
493 length = 6;
494 break;
495
496 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
497 case TIMING_3D_FORMAT_TB_SW_PACKED:
498 info_packet->sb[5] = (0x6 << 4);
499 break;
500
501 default:
502 break;
503 }
504
505 if (hdmi_vic_mode)
506 info_packet->sb[5] = stream->timing.hdmi_vic;
507
508 info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR;
509 info_packet->hb1 = 0x01;
510 info_packet->hb2 = (uint8_t) (length);
511
512 if (bALLM)
513 info_packet->sb[5] = (info_packet->sb[5] & ~0x02) | (bALLMVal << 1);
514
515 checksum += info_packet->hb0;
516 checksum += info_packet->hb1;
517 checksum += info_packet->hb2;
518
519 for (i = 1; i <= length; i++)
520 checksum += info_packet->sb[i];
521
522 info_packet->sb[0] = (uint8_t) (0x100 - checksum);
523
524 info_packet->valid = true;
525 }
526
527