1 /* $OpenBSD: ncr53c9x.c,v 1.82 2024/04/13 23:44:11 jsg Exp $ */
2 /* $NetBSD: ncr53c9x.c,v 1.56 2000/11/30 14:41:46 thorpej Exp $ */
3
4 /*
5 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1994 Peter Galbavy
35 * Copyright (c) 1995 Paul Kranenburg
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
49 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
50 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
53 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
56 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
57 * POSSIBILITY OF SUCH DAMAGE.
58 */
59
60 /*
61 * Based on aic6360 by Jarle Greipsland
62 *
63 * Acknowledgements: Many of the algorithms used in this driver are
64 * inspired by the work of Julian Elischer (julian@tfs.com) and
65 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
66 */
67
68 #include <sys/param.h>
69 #include <sys/systm.h>
70 #include <sys/kernel.h>
71 #include <sys/errno.h>
72 #include <sys/ioctl.h>
73 #include <sys/device.h>
74 #include <sys/malloc.h>
75 #include <sys/queue.h>
76 #include <sys/pool.h>
77
78 #include <scsi/scsi_all.h>
79 #include <scsi/scsiconf.h>
80 #include <scsi/scsi_message.h>
81
82 #include <machine/cpu.h>
83
84 #include <dev/ic/ncr53c9xreg.h>
85 #include <dev/ic/ncr53c9xvar.h>
86
87 #ifdef NCR53C9X_DEBUG
88 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
89 #endif
90 #ifdef DEBUG
91 int ncr53c9x_notag = 0;
92 #endif
93
94 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *);
95 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *,
96 struct ncr53c9x_ecb *);
97 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int);
98 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *);
99 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *,
100 struct scsi_xfer *, int);
101 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *);
102 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *,
103 struct ncr53c9x_ecb *);
104 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *);
105 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *);
106 /*static*/ void ncr53c9x_timeout(void *arg);
107 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *,
108 struct ncr53c9x_ecb *);
109 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *,
110 struct ncr53c9x_ecb *);
111
112 void ncr53c9x_sense(struct ncr53c9x_softc *,
113 struct ncr53c9x_ecb *);
114 void ncr53c9x_free_ecb(void *, void *);
115 void *ncr53c9x_get_ecb(void *);
116
117 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int);
118 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *,
119 struct ncr53c9x_tinfo *);
120 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *,
121 int64_t lun);
122
123 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int);
124 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int);
125 #define NCR_RDFIFO_START 0
126 #define NCR_RDFIFO_CONTINUE 1
127
128 #define NCR_SET_COUNT(sc, size) do { \
129 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
130 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
131 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
132 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
133 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
134 } \
135 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
136 NCR_WRITE_REG(sc, NCR_RCH, 0); \
137 } \
138 } while (0)
139
140 static int ecb_pool_initialized = 0;
141 static struct scsi_iopool ecb_iopool;
142 static struct pool ecb_pool;
143
144 struct cfdriver esp_cd = {
145 NULL, "esp", DV_DULL
146 };
147
148 void ncr53c9x_scsi_cmd(struct scsi_xfer *);
149 int ncr53c9x_scsi_probe(struct scsi_link *);
150 void ncr53c9x_scsi_free(struct scsi_link *);
151
152 const struct scsi_adapter ncr53c9x_switch = {
153 ncr53c9x_scsi_cmd, NULL, ncr53c9x_scsi_probe,
154 ncr53c9x_scsi_free, NULL
155 };
156
157 /*
158 * Names for the NCR53c9x variants, corresponding to the variant tags
159 * in ncr53c9xvar.h.
160 */
161 const char *ncr53c9x_variant_names[] = {
162 "ESP100",
163 "ESP100A",
164 "ESP200",
165 "NCR53C94",
166 "NCR53C96",
167 "ESP406",
168 "FAS408",
169 "FAS216",
170 "AM53C974",
171 "FAS366/HME",
172 };
173
174 /*
175 * Search linked list for LUN info by LUN id.
176 */
177 static struct ncr53c9x_linfo *
ncr53c9x_lunsearch(struct ncr53c9x_tinfo * ti,int64_t lun)178 ncr53c9x_lunsearch(struct ncr53c9x_tinfo *ti, int64_t lun)
179 {
180 struct ncr53c9x_linfo *li;
181 LIST_FOREACH(li, &ti->luns, link)
182 if (li->lun == lun)
183 return (li);
184 return (NULL);
185 }
186
187 /*
188 * Attach this instance, and then all the sub-devices
189 */
190 void
ncr53c9x_attach(struct ncr53c9x_softc * sc)191 ncr53c9x_attach(struct ncr53c9x_softc *sc)
192 {
193 struct scsibus_attach_args saa;
194
195 /*
196 * Allocate SCSI message buffers.
197 * Front-ends can override allocation to avoid alignment
198 * handling in the DMA engines. Note that ncr53c9x_msgout()
199 * can request a 1 byte DMA transfer.
200 */
201 if (sc->sc_omess == NULL)
202 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
203
204 if (sc->sc_imess == NULL)
205 sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT);
206
207 if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
208 printf("out of memory\n");
209 return;
210 }
211
212 /*
213 * Note, the front-end has set us up to print the chip variation.
214 */
215 if (sc->sc_rev >= NCR_VARIANT_MAX) {
216 printf("\n%s: unknown variant %d, devices not attached\n",
217 sc->sc_dev.dv_xname, sc->sc_rev);
218 return;
219 }
220
221 printf(": %s, %dMHz\n", ncr53c9x_variant_names[sc->sc_rev],
222 sc->sc_freq);
223
224 sc->sc_ccf = FREQTOCCF(sc->sc_freq);
225
226 /* The value *must not* be == 1. Make it 2 */
227 if (sc->sc_ccf == 1)
228 sc->sc_ccf = 2;
229
230 /*
231 * The recommended timeout is 250ms. This register is loaded
232 * with a value calculated as follows, from the docs:
233 *
234 * (timeout period) x (CLK frequency)
235 * reg = -------------------------------------
236 * 8192 x (Clock Conversion Factor)
237 *
238 * Since CCF has a linear relation to CLK, this generally computes
239 * to the constant of 153.
240 */
241 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
242
243 /* CCF register only has 3 bits; 0 is actually 8 */
244 sc->sc_ccf &= 7;
245
246 /* Find how many targets we need to support */
247 switch (sc->sc_rev) {
248 case NCR_VARIANT_FAS366:
249 sc->sc_ntarg = 16;
250 break;
251 default:
252 sc->sc_ntarg = 8;
253 break;
254 }
255
256 /* Reset state & bus */
257 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
258 sc->sc_state = 0;
259 ncr53c9x_init(sc, 1);
260
261 saa.saa_adapter_softc = sc;
262 saa.saa_adapter_target = sc->sc_id;
263 saa.saa_adapter = &ncr53c9x_switch;
264 saa.saa_adapter_buswidth = sc->sc_ntarg;
265 saa.saa_luns = 8;
266 saa.saa_openings = 2;
267 saa.saa_pool = &ecb_iopool;
268 saa.saa_quirks = saa.saa_flags = 0;
269 saa.saa_wwpn = saa.saa_wwnn = 0;
270
271 config_found(&sc->sc_dev, &saa, scsiprint);
272 }
273
274 /*
275 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus,
276 * only this controller, but kills any on-going commands, and also stops
277 * and resets the DMA.
278 *
279 * After reset, registers are loaded with the defaults from the attach
280 * routine above.
281 */
282 void
ncr53c9x_reset(struct ncr53c9x_softc * sc)283 ncr53c9x_reset(struct ncr53c9x_softc *sc)
284 {
285
286 /* reset DMA first */
287 NCRDMA_RESET(sc);
288
289 /* reset SCSI chip */
290 NCRCMD(sc, NCRCMD_RSTCHIP);
291 NCRCMD(sc, NCRCMD_NOP);
292 DELAY(500);
293
294 /* do these backwards, and fall through */
295 switch (sc->sc_rev) {
296 case NCR_VARIANT_ESP406:
297 case NCR_VARIANT_FAS408:
298 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
299 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
300 case NCR_VARIANT_AM53C974:
301 case NCR_VARIANT_FAS216:
302 case NCR_VARIANT_NCR53C94:
303 case NCR_VARIANT_NCR53C96:
304 case NCR_VARIANT_ESP200:
305 sc->sc_features |= NCR_F_HASCFG3;
306 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
307 case NCR_VARIANT_ESP100A:
308 sc->sc_features |= NCR_F_SELATN3;
309 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
310 case NCR_VARIANT_ESP100:
311 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
312 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
313 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
314 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
315 break;
316 case NCR_VARIANT_FAS366:
317 sc->sc_features |=
318 NCR_F_SELATN3 | NCR_F_HASCFG3 | NCR_F_FASTSCSI;
319 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
320 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
321 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
322 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE | NCRCFG2_HME32 */
323 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
324 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
325 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
326 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
327 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
328 break;
329 default:
330 printf("%s: unknown revision code, assuming ESP100\n",
331 sc->sc_dev.dv_xname);
332 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
333 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
334 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
335 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
336 }
337
338 if (sc->sc_rev == NCR_VARIANT_AM53C974)
339 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
340
341 #if 0
342 printf("%s: ncr53c9x_reset: revision %d\n",
343 sc->sc_dev.dv_xname, sc->sc_rev);
344 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, ccf 0x%x, timeout 0x%x\n",
345 sc->sc_dev.dv_xname,
346 sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
347 sc->sc_ccf, sc->sc_timeout);
348 #endif
349 }
350
351 /*
352 * Reset the SCSI bus, but not the chip
353 */
354 void
ncr53c9x_scsi_reset(struct ncr53c9x_softc * sc)355 ncr53c9x_scsi_reset(struct ncr53c9x_softc *sc)
356 {
357
358 (*sc->sc_glue->gl_dma_stop)(sc);
359
360 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
361 NCRCMD(sc, NCRCMD_RSTSCSI);
362 }
363
364 /*
365 * Initialize ncr53c9x state machine
366 */
367 void
ncr53c9x_init(struct ncr53c9x_softc * sc,int doreset)368 ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset)
369 {
370 struct ncr53c9x_ecb *ecb;
371 struct ncr53c9x_linfo *li;
372 int r, i;
373
374 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
375
376 if (!ecb_pool_initialized) {
377 /* All instances share this pool */
378 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, IPL_BIO,
379 0, "ncr53c9x_ecb", NULL);
380 scsi_iopool_init(&ecb_iopool, NULL,
381 ncr53c9x_get_ecb, ncr53c9x_free_ecb);
382 ecb_pool_initialized = 1;
383 }
384
385 if (sc->sc_state == 0) {
386 /* First time through; initialize. */
387
388 TAILQ_INIT(&sc->ready_list);
389 sc->sc_nexus = NULL;
390 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
391 for (r = 0; r < sc->sc_ntarg; r++) {
392 LIST_INIT(&sc->sc_tinfo[r].luns);
393 }
394 } else {
395 /* Cancel any active commands. */
396 sc->sc_state = NCR_CLEANING;
397 sc->sc_msgify = 0;
398 if ((ecb = sc->sc_nexus) != NULL) {
399 ecb->xs->error = XS_TIMEOUT;
400 ncr53c9x_done(sc, ecb);
401 }
402 for (r = 0; r < sc->sc_ntarg; r++) {
403 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
404 if ((ecb = li->untagged)) {
405 li->untagged = NULL;
406 /*
407 * XXXXXXX
408 * Should we terminate a command
409 * that never reached the disk?
410 */
411 li->busy = 0;
412 ecb->xs->error = XS_TIMEOUT;
413 ncr53c9x_done(sc, ecb);
414 }
415 for (i = 0; i < 256; i++)
416 if ((ecb = li->queued[i])) {
417 li->queued[i] = NULL;
418 ecb->xs->error = XS_TIMEOUT;
419 ncr53c9x_done(sc, ecb);
420 }
421 li->used = 0;
422 }
423 }
424 }
425
426 /*
427 * reset the chip to a known state
428 */
429 ncr53c9x_reset(sc);
430
431 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
432 for (r = 0; r < sc->sc_ntarg; r++) {
433 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
434 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
435
436 ti->flags = ((!(sc->sc_cfflags & (1 << (r + 16))) &&
437 sc->sc_minsync) ? 0 : T_SYNCHOFF) |
438 ((sc->sc_cfflags & (1 << r)) ? T_RSELECTOFF : 0) |
439 T_NEED_TO_RESET;
440 #ifdef DEBUG
441 if (ncr53c9x_notag)
442 ti->flags &= ~T_TAG;
443 #endif
444 ti->period = sc->sc_minsync;
445 ti->offset = 0;
446 ti->cfg3 = 0;
447 }
448
449 if (doreset) {
450 sc->sc_state = NCR_SBR;
451 NCRCMD(sc, NCRCMD_RSTSCSI);
452 /*
453 * XXX gross...
454 * On some systems, commands issued too close to a reset
455 * do not work correctly. We'll force a short delay on
456 * known-to-be-sensitive chips.
457 */
458 switch (sc->sc_rev) {
459 case NCR_VARIANT_NCR53C94:
460 DELAY(600000); /* 600ms */
461 break;
462 case NCR_VARIANT_NCR53C96:
463 DELAY(100000); /* 100ms */
464 break;
465 }
466 } else {
467 sc->sc_state = NCR_IDLE;
468 ncr53c9x_sched(sc);
469 }
470 }
471
472 /*
473 * Read the NCR registers, and save their contents for later use.
474 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
475 * NCR_INTR - so make sure it is the last read.
476 *
477 * I think that (from reading the docs) most bits in these registers
478 * only make sense when he DMA CSR has an interrupt showing. Call only
479 * if an interrupt is pending.
480 */
481 __inline__ void
ncr53c9x_readregs(struct ncr53c9x_softc * sc)482 ncr53c9x_readregs(struct ncr53c9x_softc *sc)
483 {
484
485 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
486 /* Only the stepo bits are of interest */
487 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
488
489 if (sc->sc_rev == NCR_VARIANT_FAS366)
490 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
491
492 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
493
494 if (sc->sc_glue->gl_clear_latched_intr != NULL)
495 (*sc->sc_glue->gl_clear_latched_intr)(sc);
496
497 /*
498 * Determine the SCSI bus phase, return either a real SCSI bus phase
499 * or some pseudo phase we use to detect certain exceptions.
500 */
501
502 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS)
503 ? /* Disconnected */ BUSFREE_PHASE
504 : sc->sc_espstat & NCRSTAT_PHASE;
505
506 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
507 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
508 }
509
510 /*
511 * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
512 */
513 static inline int
ncr53c9x_stp2cpb(struct ncr53c9x_softc * sc,int period)514 ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc, int period)
515 {
516 int v;
517 v = (sc->sc_freq * period) / 250;
518 if (ncr53c9x_cpb2stp(sc, v) < period)
519 /* Correct round-down error */
520 v++;
521 return (v);
522 }
523
524 static inline void
ncr53c9x_setsync(struct ncr53c9x_softc * sc,struct ncr53c9x_tinfo * ti)525 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti)
526 {
527 u_char syncoff, synctp;
528 u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
529
530 if (ti->flags & T_SYNCMODE) {
531 syncoff = ti->offset;
532 synctp = ncr53c9x_stp2cpb(sc, ti->period);
533 if (sc->sc_features & NCR_F_FASTSCSI) {
534 /*
535 * If the period is 200ns or less (ti->period <= 50),
536 * put the chip in Fast SCSI mode.
537 */
538 if (ti->period <= 50)
539 /*
540 * There are (at least) 4 variations of the
541 * configuration 3 register. The drive attach
542 * routine sets the appropriate bit to put the
543 * chip into Fast SCSI mode so that it doesn't
544 * have to be figured out here each time.
545 */
546 cfg3 |= (sc->sc_rev == NCR_VARIANT_AM53C974) ?
547 NCRAMDCFG3_FSCSI : NCRCFG3_FSCSI;
548 }
549
550 /*
551 * Am53c974 requires different SYNCTP values when the
552 * FSCSI bit is off.
553 */
554 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
555 (cfg3 & NCRAMDCFG3_FSCSI) == 0)
556 synctp--;
557 } else {
558 syncoff = 0;
559 synctp = 0;
560 }
561
562 if (sc->sc_features & NCR_F_HASCFG3)
563 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
564
565 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
566 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
567 }
568
569 /*
570 * Send a command to a target, set the driver state to NCR_SELECTING
571 * and let the caller take care of the rest.
572 *
573 * Keeping this as a function allows me to say that this may be done
574 * by DMA instead of programmed I/O soon.
575 */
576 void
ncr53c9x_select(struct ncr53c9x_softc * sc,struct ncr53c9x_ecb * ecb)577 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
578 {
579 struct scsi_link *sc_link = ecb->xs->sc_link;
580 int target = sc_link->target;
581 int lun = sc_link->lun;
582 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
583 int tiflags = ti->flags;
584 u_char *cmd;
585 int clen;
586 int selatn3, selatns;
587 size_t dmasize;
588
589 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag%x,%x)] ",
590 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
591
592 sc->sc_state = NCR_SELECTING;
593 /*
594 * Schedule the timeout now, the first time we will go away
595 * expecting to come back due to an interrupt, because it is
596 * always possible that the interrupt may never happen.
597 */
598 if ((ecb->xs->flags & SCSI_POLL) == 0) {
599 int timeout = ecb->xs->timeout;
600
601 if (timeout > 1000000)
602 timeout = (timeout / 1000) * hz;
603 else
604 timeout = (timeout * hz) / 1000;
605 timeout_add(&ecb->xs->stimeout, timeout);
606 }
607
608 /*
609 * The docs say the target register is never reset, and I
610 * can't think of a better place to set it
611 */
612 if (sc->sc_rev == NCR_VARIANT_FAS366) {
613 NCRCMD(sc, NCRCMD_FLUSH);
614 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
615 } else {
616 NCR_WRITE_REG(sc, NCR_SELID, target);
617 }
618 ncr53c9x_setsync(sc, ti);
619
620 if ((ecb->flags & ECB_SENSE) != 0) {
621 /*
622 * For REQUEST SENSE, we should not send an IDENTIFY or
623 * otherwise mangle the target. There should be no MESSAGE IN
624 * phase.
625 */
626 if (sc->sc_features & NCR_F_DMASELECT) {
627 /* setup DMA transfer for command */
628 dmasize = clen = ecb->clen;
629 sc->sc_cmdlen = clen;
630 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
631
632 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
633 &dmasize);
634 /* Program the SCSI counter */
635 NCR_SET_COUNT(sc, dmasize);
636
637 if (sc->sc_rev != NCR_VARIANT_FAS366)
638 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
639
640 /* And get the targets attention */
641 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
642 NCRDMA_GO(sc);
643 } else {
644 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
645 sc->sc_cmdlen = 0;
646 NCRCMD(sc, NCRCMD_SELNATN);
647 }
648 return;
649 }
650
651 selatn3 = selatns = 0;
652 if (ecb->tag[0] != 0) {
653 if (sc->sc_features & NCR_F_SELATN3)
654 /* use SELATN3 to send tag messages */
655 selatn3 = 1;
656 else
657 /* We don't have SELATN3; use SELATNS to send tags */
658 selatns = 1;
659 }
660
661 if (ti->flags & T_NEGOTIATE) {
662 /* We have to use SELATNS to send sync/wide messages */
663 selatn3 = 0;
664 selatns = 1;
665 }
666
667 cmd = (u_char *)&ecb->cmd.cmd;
668
669 if (selatn3) {
670 /* We'll use tags with SELATN3 */
671 clen = ecb->clen + 3;
672 cmd -= 3;
673 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
674 cmd[1] = ecb->tag[0]; /* msg[1] */
675 cmd[2] = ecb->tag[1]; /* msg[2] */
676 } else {
677 /* We don't have tags, or will send messages with SELATNS */
678 clen = ecb->clen + 1;
679 cmd -= 1;
680 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0);
681 }
682
683 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
684
685 /* setup DMA transfer for command */
686 dmasize = clen;
687 sc->sc_cmdlen = clen;
688 sc->sc_cmdp = cmd;
689
690 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
691 /* Program the SCSI counter */
692 NCR_SET_COUNT(sc, dmasize);
693
694 /* load the count in */
695 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
696 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
697
698 /* And get the targets attention */
699 if (selatn3) {
700 sc->sc_msgout = SEND_TAG;
701 sc->sc_flags |= NCR_ATN;
702 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
703 } else
704 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
705 NCRDMA_GO(sc);
706 return;
707 }
708
709 /*
710 * Who am I. This is where we tell the target that we are
711 * happy for it to disconnect etc.
712 */
713
714 /* Now get the command into the FIFO */
715 sc->sc_cmdlen = 0;
716 ncr53c9x_wrfifo(sc, cmd, clen);
717
718 /* And get the targets attention */
719 if (selatns) {
720 NCR_MISC(("SELATNS \n"));
721 /* Arbitrate, select and stop after IDENTIFY message */
722 NCRCMD(sc, NCRCMD_SELATNS);
723 } else if (selatn3) {
724 sc->sc_msgout = SEND_TAG;
725 sc->sc_flags |= NCR_ATN;
726 NCRCMD(sc, NCRCMD_SELATN3);
727 } else
728 NCRCMD(sc, NCRCMD_SELATN);
729 }
730
731 /*
732 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
733 */
734
735 void *
ncr53c9x_get_ecb(void * null)736 ncr53c9x_get_ecb(void *null)
737 {
738 struct ncr53c9x_ecb *ecb;
739
740 ecb = pool_get(&ecb_pool, M_NOWAIT|M_ZERO);
741 if (ecb == NULL)
742 return (NULL);
743
744 ecb->flags |= ECB_ALLOC;
745
746 return (ecb);
747 }
748
749 void
ncr53c9x_free_ecb(void * null,void * ecb)750 ncr53c9x_free_ecb(void *null, void *ecb)
751 {
752 pool_put(&ecb_pool, ecb);
753 }
754
755 int
ncr53c9x_scsi_probe(struct scsi_link * sc_link)756 ncr53c9x_scsi_probe(struct scsi_link *sc_link)
757 {
758 struct ncr53c9x_softc *sc = sc_link->bus->sb_adapter_softc;
759 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
760 struct ncr53c9x_linfo *li;
761 int64_t lun = sc_link->lun;
762 int s;
763
764 /* Initialize LUN info and add to list. */
765 li = malloc(sizeof(*li), M_DEVBUF, M_WAITOK | M_ZERO);
766 if (li == NULL)
767 return (ENOMEM);
768
769 li->last_used = getuptime();
770 li->lun = lun;
771
772 s = splbio();
773 LIST_INSERT_HEAD(&ti->luns, li, link);
774 if (lun < NCR_NLUN)
775 ti->lun[lun] = li;
776 splx(s);
777
778 return (0);
779
780 }
781
782 void
ncr53c9x_scsi_free(struct scsi_link * sc_link)783 ncr53c9x_scsi_free(struct scsi_link *sc_link)
784 {
785 struct ncr53c9x_softc *sc = sc_link->bus->sb_adapter_softc;
786 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
787 struct ncr53c9x_linfo *li;
788 int64_t lun = sc_link->lun;
789 int s;
790
791 s = splbio();
792 li = TINFO_LUN(ti, lun);
793
794 LIST_REMOVE(li, link);
795 if (lun < NCR_NLUN)
796 ti->lun[lun] = NULL;
797 splx(s);
798
799 free(li, M_DEVBUF, 0);
800 }
801
802 /*
803 * Start a SCSI-command
804 * This function is called by the higher level SCSI-driver to queue/run
805 * SCSI-commands.
806 */
807 void
ncr53c9x_scsi_cmd(struct scsi_xfer * xs)808 ncr53c9x_scsi_cmd(struct scsi_xfer *xs)
809 {
810 struct scsi_link *sc_link = xs->sc_link;
811 struct ncr53c9x_softc *sc = sc_link->bus->sb_adapter_softc;
812 struct ncr53c9x_ecb *ecb;
813 struct ncr53c9x_tinfo *ti;
814 struct ncr53c9x_linfo *li;
815 int64_t lun = sc_link->lun;
816 int s, flags;
817
818 NCR_TRACE(("[ncr53c9x_scsi_cmd] "));
819 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd.opcode, xs->cmdlen,
820 sc_link->target));
821
822 /*
823 * Commands larger than 12 bytes seem to confuse the chip
824 * (at least on FAS366 flavours).
825 */
826 if (xs->cmdlen > 12) {
827 memset(&xs->sense, 0, sizeof(xs->sense));
828 /* sense data borrowed from gdt(4) */
829 xs->sense.error_code = SSD_ERRCODE_VALID | SSD_ERRCODE_CURRENT;
830 xs->sense.flags = SKEY_ILLEGAL_REQUEST;
831 xs->sense.add_sense_code = 0x20; /* illcmd */
832 xs->error = XS_SENSE;
833 scsi_done(xs);
834 return;
835 }
836
837 flags = xs->flags;
838 ti = &sc->sc_tinfo[sc_link->target];
839 li = TINFO_LUN(ti, lun);
840
841 /* Initialize ecb */
842 ecb = xs->io;
843 ecb->xs = xs;
844 timeout_set(&xs->stimeout, ncr53c9x_timeout, ecb);
845
846 if (flags & SCSI_RESET) {
847 ecb->flags |= ECB_RESET;
848 ecb->clen = 0;
849 ecb->dleft = 0;
850 } else {
851 bcopy(&xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
852 ecb->clen = xs->cmdlen;
853 ecb->daddr = xs->data;
854 ecb->dleft = xs->datalen;
855 }
856 ecb->stat = 0;
857
858 s = splbio();
859
860 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
861 ecb->flags |= ECB_READY;
862 if (sc->sc_state == NCR_IDLE)
863 ncr53c9x_sched(sc);
864
865 splx(s);
866
867 if ((flags & SCSI_POLL) == 0)
868 return;
869
870 /* Not allowed to use interrupts, use polling instead */
871 if (ncr53c9x_poll(sc, xs, xs->timeout)) {
872 ncr53c9x_timeout(ecb);
873 if (ncr53c9x_poll(sc, xs, xs->timeout))
874 ncr53c9x_timeout(ecb);
875 }
876 }
877
878 /*
879 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
880 */
881 int
ncr53c9x_poll(struct ncr53c9x_softc * sc,struct scsi_xfer * xs,int count)882 ncr53c9x_poll(struct ncr53c9x_softc *sc, struct scsi_xfer *xs, int count)
883 {
884 int s;
885
886 NCR_TRACE(("[ncr53c9x_poll] "));
887 while (count) {
888 if (NCRDMA_ISINTR(sc)) {
889 s = splbio();
890 ncr53c9x_intr(sc);
891 splx(s);
892 }
893 #if alternatively
894 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) {
895 s = splbio();
896 ncr53c9x_intr(sc);
897 splx(s);
898 }
899 #endif
900 if ((xs->flags & ITSDONE) != 0)
901 return (0);
902 s = splbio();
903 if (sc->sc_state == NCR_IDLE) {
904 NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
905 ncr53c9x_sched(sc);
906 }
907 splx(s);
908 DELAY(1000);
909 count--;
910 }
911 return (1);
912 }
913
914
915 /*
916 * LOW LEVEL SCSI UTILITIES
917 */
918
919 /*
920 * Schedule a scsi operation. This has now been pulled out of the interrupt
921 * handler so that we may call it from ncr53c9x_scsi_cmd and ncr53c9x_done.
922 * This may save us an unnecessary interrupt just to get things going.
923 * Should only be called when state == NCR_IDLE and at bio pl.
924 */
925 void
ncr53c9x_sched(struct ncr53c9x_softc * sc)926 ncr53c9x_sched(struct ncr53c9x_softc *sc)
927 {
928 struct ncr53c9x_ecb *ecb;
929 struct scsi_link *sc_link;
930 struct ncr53c9x_tinfo *ti;
931 int lun;
932 struct ncr53c9x_linfo *li;
933 int s, tag;
934
935 NCR_TRACE(("[ncr53c9x_sched] "));
936 if (sc->sc_state != NCR_IDLE)
937 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
938
939 /*
940 * Find first ecb in ready queue that is for a target/lunit
941 * combinations that is not busy.
942 */
943 TAILQ_FOREACH(ecb, &sc->ready_list, chain) {
944 sc_link = ecb->xs->sc_link;
945 ti = &sc->sc_tinfo[sc_link->target];
946 lun = sc_link->lun;
947
948 /* Select type of tag for this command */
949 if ((ti->flags & (T_RSELECTOFF)) != 0)
950 tag = 0;
951 else if ((ti->flags & T_TAG) == 0)
952 tag = 0;
953 else if ((ecb->flags & ECB_SENSE) != 0)
954 tag = 0;
955 else
956 tag = MSG_SIMPLE_Q_TAG;
957 #if 0
958 /* XXXX Use tags for polled commands? */
959 if (ecb->xs->flags & SCSI_POLL)
960 tag = 0;
961 #endif
962 s = splbio();
963 li = TINFO_LUN(ti, lun);
964 if (!li) {
965 /* Initialize LUN info and add to list. */
966 if ((li = malloc(sizeof(*li), M_DEVBUF,
967 M_NOWAIT | M_ZERO)) == NULL) {
968 splx(s);
969 continue;
970 }
971 li->lun = lun;
972
973 LIST_INSERT_HEAD(&ti->luns, li, link);
974 if (lun < NCR_NLUN)
975 ti->lun[lun] = li;
976 }
977 li->last_used = getuptime();
978 if (!tag) {
979 /* Try to issue this as an un-tagged command */
980 if (!li->untagged)
981 li->untagged = ecb;
982 }
983 if (li->untagged) {
984 tag = 0;
985 if ((li->busy != 1) && !li->used) {
986 /* We need to issue this untagged command now */
987 ecb = li->untagged;
988 sc_link = ecb->xs->sc_link;
989 }
990 else {
991 /* Not ready yet */
992 splx(s);
993 continue;
994 }
995 }
996 ecb->tag[0] = tag;
997 if (tag) {
998 int i;
999
1000 /* Allocate a tag */
1001 if (li->used == 255) {
1002 /* no free tags */
1003 splx(s);
1004 continue;
1005 }
1006 /* Start from the last used location */
1007 for (i=li->avail; i<256; i++) {
1008 if (li->queued[i] == NULL)
1009 break;
1010 }
1011 /* Couldn't find one, start again from the beginning */
1012 if (i == 256) {
1013 for (i = 0; i<256; i++) {
1014 if (li->queued[i] == NULL)
1015 break;
1016 }
1017 }
1018 #ifdef DIAGNOSTIC
1019 if (i == 256)
1020 panic("ncr53c9x_sched: tag alloc failure");
1021 #endif
1022
1023 /* Save where to start next time. */
1024 li->avail = i+1;
1025 li->used++;
1026
1027 li->queued[i] = ecb;
1028 ecb->tag[1] = i;
1029 }
1030 splx(s);
1031 if (li->untagged && (li->busy != 1)) {
1032 li->busy = 1;
1033 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1034 ecb->flags &= ~ECB_READY;
1035 sc->sc_nexus = ecb;
1036 ncr53c9x_select(sc, ecb);
1037 break;
1038 }
1039 if (!li->untagged && tag) {
1040 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1041 ecb->flags &= ~ECB_READY;
1042 sc->sc_nexus = ecb;
1043 ncr53c9x_select(sc, ecb);
1044 break;
1045 } else
1046 NCR_MISC(("%d:%d busy\n",
1047 sc_link->target,
1048 sc_link->lun));
1049 }
1050 }
1051
1052 void
ncr53c9x_sense(struct ncr53c9x_softc * sc,struct ncr53c9x_ecb * ecb)1053 ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1054 {
1055 struct scsi_xfer *xs = ecb->xs;
1056 struct scsi_link *sc_link = xs->sc_link;
1057 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
1058 struct scsi_sense *ss = (void *)&ecb->cmd.cmd;
1059 struct ncr53c9x_linfo *li;
1060 int lun = sc_link->lun;
1061
1062 NCR_MISC(("requesting sense "));
1063 /* Next, setup a request sense command block */
1064 bzero(ss, sizeof(*ss));
1065 ss->opcode = REQUEST_SENSE;
1066 ss->byte2 = sc_link->lun << 5;
1067 ss->length = sizeof(struct scsi_sense_data);
1068 ecb->clen = sizeof(*ss);
1069 ecb->daddr = (char *)&xs->sense;
1070 ecb->dleft = sizeof(struct scsi_sense_data);
1071 ecb->flags |= ECB_SENSE;
1072 xs->timeout = NCR_SENSE_TIMEOUT;
1073 ti->senses++;
1074 li = TINFO_LUN(ti, lun);
1075 if (li->busy) li->busy = 0;
1076 ncr53c9x_dequeue(sc, ecb);
1077 li->untagged = ecb;
1078 li->busy = 2;
1079 if (ecb == sc->sc_nexus) {
1080 ncr53c9x_select(sc, ecb);
1081 } else {
1082 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1083 ecb->flags |= ECB_READY;
1084 if (sc->sc_state == NCR_IDLE)
1085 ncr53c9x_sched(sc);
1086 }
1087 }
1088
1089 /*
1090 * POST PROCESSING OF SCSI_CMD (usually current)
1091 */
1092 void
ncr53c9x_done(struct ncr53c9x_softc * sc,struct ncr53c9x_ecb * ecb)1093 ncr53c9x_done(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1094 {
1095 struct scsi_xfer *xs = ecb->xs;
1096 struct scsi_link *sc_link = xs->sc_link;
1097 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
1098 int lun = sc_link->lun;
1099 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun);
1100
1101 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
1102
1103 timeout_del(&ecb->xs->stimeout);
1104
1105 if (ecb->stat == SCSI_QUEUE_FULL) {
1106 /*
1107 * Set current throttle -- we should reset
1108 * this periodically
1109 */
1110 sc_link->openings = li->used - 1;
1111 printf("\n%s: QFULL -- throttling to %d commands\n",
1112 sc->sc_dev.dv_xname, sc_link->openings);
1113 }
1114
1115 /*
1116 * Now, if we've come here with no error code, i.e. we've kept the
1117 * initial XS_NOERROR, and the status code signals that we should
1118 * check sense, we'll need to set up a request sense cmd block and
1119 * push the command back into the ready queue *before* any other
1120 * commands for this target/lunit, else we lose the sense info.
1121 * We don't support chk sense conditions for the request sense cmd.
1122 */
1123 if (xs->error == XS_NOERROR) {
1124 xs->status = ecb->stat;
1125 if ((ecb->flags & ECB_ABORT) != 0) {
1126 xs->error = XS_TIMEOUT;
1127 } else if ((ecb->flags & ECB_SENSE) != 0) {
1128 xs->error = XS_SENSE;
1129 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
1130 /* First, save the return values */
1131 xs->resid = ecb->dleft;
1132 ncr53c9x_sense(sc, ecb);
1133 return;
1134 } else {
1135 xs->resid = ecb->dleft;
1136 }
1137 }
1138
1139 #ifdef NCR53C9X_DEBUG
1140 if (ncr53c9x_debug & NCR_SHOWMISC) {
1141 if (xs->resid != 0)
1142 printf("resid=%lu ", (unsigned long)xs->resid);
1143 if (xs->error == XS_SENSE)
1144 printf("sense=0x%02x\n", xs->sense.error_code);
1145 else
1146 printf("error=%d\n", xs->error);
1147 }
1148 #endif
1149
1150 /*
1151 * Remove the ECB from whatever queue it's on.
1152 */
1153 ncr53c9x_dequeue(sc, ecb);
1154 if (ecb == sc->sc_nexus) {
1155 sc->sc_nexus = NULL;
1156 if (sc->sc_state != NCR_CLEANING) {
1157 sc->sc_state = NCR_IDLE;
1158 ncr53c9x_sched(sc);
1159 }
1160 }
1161
1162 ti->cmds++;
1163 scsi_done(xs);
1164 }
1165
1166 void
ncr53c9x_dequeue(struct ncr53c9x_softc * sc,struct ncr53c9x_ecb * ecb)1167 ncr53c9x_dequeue(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1168 {
1169 struct ncr53c9x_tinfo *ti =
1170 &sc->sc_tinfo[ecb->xs->sc_link->target];
1171 struct ncr53c9x_linfo *li;
1172 int64_t lun = ecb->xs->sc_link->lun;
1173
1174 li = TINFO_LUN(ti, lun);
1175 #ifdef DIAGNOSTIC
1176 if ((!li) || (li->lun != lun))
1177 panic("ncr53c9x_dequeue: lun %llx for ecb %p does not exist",
1178 (long long)lun, ecb);
1179 #endif
1180 if (li->untagged == ecb) {
1181 li->busy = 0;
1182 li->untagged = NULL;
1183 }
1184 if (ecb->tag[0] && li->queued[ecb->tag[1]]) {
1185 #ifdef DIAGNOSTIC
1186 if (li->queued[ecb->tag[1]] && (li->queued[ecb->tag[1]] != ecb))
1187 panic("ncr53c9x_dequeue: slot %d for lun %llx has %p "
1188 "instead of ecb %p", ecb->tag[1],
1189 (long long)lun,
1190 li->queued[ecb->tag[1]], ecb);
1191 #endif
1192 li->queued[ecb->tag[1]] = NULL;
1193 li->used --;
1194
1195 }
1196 if (ecb->flags & ECB_READY) {
1197 ecb->flags &= ~ECB_READY;
1198 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1199 }
1200 }
1201
1202 /*
1203 * INTERRUPT/PROTOCOL ENGINE
1204 */
1205
1206 /*
1207 * Schedule an outgoing message by prioritizing it, and asserting
1208 * attention on the bus. We can only do this when we are the initiator
1209 * else there will be an illegal command interrupt.
1210 */
1211 #define ncr53c9x_sched_msgout(m) \
1212 do { \
1213 NCR_MISC(("ncr53c9x_sched_msgout %x %d ", m, __LINE__)); \
1214 NCRCMD(sc, NCRCMD_SETATN); \
1215 sc->sc_flags |= NCR_ATN; \
1216 sc->sc_msgpriq |= (m); \
1217 } while (0)
1218
1219 static void
ncr53c9x_flushfifo(struct ncr53c9x_softc * sc)1220 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1221 {
1222 NCR_MISC(("[flushfifo] "));
1223
1224 NCRCMD(sc, NCRCMD_FLUSH);
1225
1226 if (sc->sc_phase == COMMAND_PHASE ||
1227 sc->sc_phase == MESSAGE_OUT_PHASE)
1228 DELAY(2);
1229 }
1230
1231 static int
ncr53c9x_rdfifo(struct ncr53c9x_softc * sc,int how)1232 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1233 {
1234 int i, n;
1235 u_char *buf;
1236
1237 switch(how) {
1238 case NCR_RDFIFO_START:
1239 buf = sc->sc_imess;
1240 sc->sc_imlen = 0;
1241 break;
1242 case NCR_RDFIFO_CONTINUE:
1243 buf = sc->sc_imess + sc->sc_imlen;
1244 break;
1245 default:
1246 panic("ncr53c9x_rdfifo: bad flag");
1247 break;
1248 }
1249
1250 /*
1251 * XXX buffer (sc_imess) size for message
1252 */
1253
1254 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
1255
1256 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1257 n *= 2;
1258
1259 for (i = 0; i < n; i++)
1260 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1261
1262 if (sc->sc_espstat2 & FAS_STAT2_ISHUTTLE) {
1263
1264 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1265 buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1266
1267 NCR_READ_REG(sc, NCR_FIFO);
1268
1269 ncr53c9x_flushfifo(sc);
1270 }
1271 } else {
1272 for (i = 0; i < n; i++)
1273 buf[i] = NCR_READ_REG(sc, NCR_FIFO);
1274 }
1275
1276 sc->sc_imlen += i;
1277
1278 #ifdef NCR53C9X_DEBUG
1279 {
1280 int j;
1281
1282 NCR_TRACE(("\n[rdfifo %s (%d):",
1283 (how == NCR_RDFIFO_START) ? "start" : "cont",
1284 (int)sc->sc_imlen));
1285 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1286 for (j = 0; j < sc->sc_imlen; j++)
1287 printf(" %02x", sc->sc_imess[j]);
1288 printf("]\n");
1289 }
1290 }
1291 #endif
1292 return sc->sc_imlen;
1293 }
1294
1295 static void
ncr53c9x_wrfifo(struct ncr53c9x_softc * sc,u_char * p,int len)1296 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1297 {
1298 int i;
1299
1300 #ifdef NCR53C9X_DEBUG
1301 NCR_MISC(("[wrfifo(%d):", len));
1302 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1303 for (i = 0; i < len; i++)
1304 printf(" %02x", p[i]);
1305 printf("]\n");
1306 }
1307 #endif
1308
1309 for (i = 0; i < len; i++) {
1310 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
1311
1312 if (sc->sc_rev == NCR_VARIANT_FAS366)
1313 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1314 }
1315 }
1316
1317 int
ncr53c9x_reselect(struct ncr53c9x_softc * sc,int message,int tagtype,int tagid)1318 ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype,
1319 int tagid)
1320 {
1321 u_char selid, target, lun;
1322 struct ncr53c9x_ecb *ecb = NULL;
1323 struct ncr53c9x_tinfo *ti;
1324 struct ncr53c9x_linfo *li;
1325
1326 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1327 target = sc->sc_selid;
1328 } else {
1329 /*
1330 * The SCSI chip made a snapshot of the data bus while the reselection
1331 * was being negotiated. This enables us to determine which target did
1332 * the reselect.
1333 */
1334 selid = sc->sc_selid & ~(1 << sc->sc_id);
1335 if (selid & (selid - 1)) {
1336 printf("%s: reselect with invalid selid %02x;"
1337 " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
1338 goto reset;
1339
1340 }
1341 target = ffs(selid) - 1;
1342 }
1343 lun = message & 0x07;
1344
1345 /*
1346 * Search wait queue for disconnected cmd
1347 * The list should be short, so I haven't bothered with
1348 * any more sophisticated structures than a simple
1349 * singly linked list.
1350 */
1351 ti = &sc->sc_tinfo[target];
1352 li = TINFO_LUN(ti, lun);
1353
1354 /*
1355 * We can get as far as the LUN with the IDENTIFY
1356 * message. Check to see if we're running an
1357 * un-tagged command. Otherwise ack the IDENTIFY
1358 * and wait for a tag message.
1359 */
1360 if (li != NULL) {
1361 if (li->untagged != NULL && li->busy)
1362 ecb = li->untagged;
1363 else if (tagtype != MSG_SIMPLE_Q_TAG) {
1364 /* Wait for tag to come by */
1365 sc->sc_state = NCR_IDENTIFIED;
1366 return (0);
1367 } else if (tagtype) ecb = li->queued[tagid];
1368 }
1369 if (ecb == NULL) {
1370 printf("%s: reselect from target %d lun %d tag %x:%x with no nexus;"
1371 " sending ABORT\n", sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
1372 goto abort;
1373 }
1374
1375 /* Make this nexus active again. */
1376 sc->sc_state = NCR_CONNECTED;
1377 sc->sc_nexus = ecb;
1378 ncr53c9x_setsync(sc, ti);
1379
1380 if (ecb->flags & ECB_RESET)
1381 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1382 else if (ecb->flags & ECB_ABORT)
1383 ncr53c9x_sched_msgout(SEND_ABORT);
1384
1385 /* Do an implicit RESTORE POINTERS. */
1386 sc->sc_dp = ecb->daddr;
1387 sc->sc_dleft = ecb->dleft;
1388
1389 return (0);
1390
1391 reset:
1392 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1393 return (1);
1394
1395 abort:
1396 ncr53c9x_sched_msgout(SEND_ABORT);
1397 return (1);
1398 }
1399
1400 static inline int
__verify_msg_format(u_char * p,int len)1401 __verify_msg_format(u_char *p, int len)
1402 {
1403
1404 if (len == 1 && IS1BYTEMSG(p[0]))
1405 return 1;
1406 if (len == 2 && IS2BYTEMSG(p[0]))
1407 return 1;
1408 if (len >= 3 && ISEXTMSG(p[0]) &&
1409 len == p[1] + 2)
1410 return 1;
1411
1412 return 0;
1413 }
1414
1415 /*
1416 * Get an incoming message as initiator.
1417 *
1418 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
1419 * byte in the FIFO
1420 */
1421 void
ncr53c9x_msgin(struct ncr53c9x_softc * sc)1422 ncr53c9x_msgin(struct ncr53c9x_softc *sc)
1423 {
1424
1425 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1426
1427 if (sc->sc_imlen == 0) {
1428 printf("%s: msgin: no msg byte available\n", sc->sc_dev.dv_xname);
1429 return;
1430 }
1431
1432 /*
1433 * Prepare for a new message. A message should (according
1434 * to the SCSI standard) be transmitted in one single
1435 * MESSAGE_IN_PHASE. If we have been in some other phase,
1436 * then this is a new message.
1437 */
1438 if (sc->sc_prevphase != MESSAGE_IN_PHASE && sc->sc_state != NCR_RESELECTED) {
1439 printf("%s: phase change, dropping message, prev %d, state %d\n",
1440 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
1441 sc->sc_flags &= ~NCR_DROP_MSGI;
1442 sc->sc_imlen = 0;
1443 }
1444
1445 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
1446
1447 /*
1448 * If we're going to reject the message, don't bother storing
1449 * the incoming bytes. But still, we need to ACK them.
1450 */
1451 if ((sc->sc_flags & NCR_DROP_MSGI)) {
1452 NCRCMD(sc, NCRCMD_MSGOK);
1453 printf("<dropping msg byte %x>",
1454 sc->sc_imess[sc->sc_imlen]);
1455 return;
1456 }
1457
1458 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1459 ncr53c9x_sched_msgout(SEND_REJECT);
1460 sc->sc_flags |= NCR_DROP_MSGI;
1461 } else {
1462 u_char *pb;
1463 int plen;
1464
1465 switch (sc->sc_state) {
1466 /*
1467 * if received message is the first of reselection
1468 * then first byte is selid, and then message
1469 */
1470 case NCR_RESELECTED:
1471 pb = sc->sc_imess + 1;
1472 plen = sc->sc_imlen - 1;
1473 break;
1474 default:
1475 pb = sc->sc_imess;
1476 plen = sc->sc_imlen;
1477 break;
1478 }
1479
1480 if (__verify_msg_format(pb, plen))
1481 goto gotit;
1482 }
1483
1484 /* Ack what we have so far */
1485 NCRCMD(sc, NCRCMD_MSGOK);
1486 return;
1487
1488 gotit:
1489 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
1490 /* we got complete message, flush the imess, XXX nobody uses imlen below */
1491 sc->sc_imlen = 0;
1492
1493 /*
1494 * Now we should have a complete message (1 byte, 2 byte
1495 * and moderately long extended messages). We only handle
1496 * extended messages which total length is shorter than
1497 * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1498 */
1499 switch (sc->sc_state) {
1500 struct ncr53c9x_ecb *ecb;
1501 struct ncr53c9x_tinfo *ti;
1502 struct ncr53c9x_linfo *li;
1503 int lun;
1504
1505 case NCR_CONNECTED:
1506 ecb = sc->sc_nexus;
1507 ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
1508
1509 switch (sc->sc_imess[0]) {
1510 case MSG_CMDCOMPLETE:
1511 NCR_MSGS(("cmdcomplete "));
1512 if (sc->sc_dleft < 0) {
1513 sc_print_addr(ecb->xs->sc_link);
1514 printf("got %ld extra bytes\n",
1515 -(long)sc->sc_dleft);
1516 sc->sc_dleft = 0;
1517 }
1518 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
1519 ? 0
1520 : sc->sc_dleft;
1521 if ((ecb->flags & ECB_SENSE) == 0)
1522 ecb->xs->resid = ecb->dleft;
1523 sc->sc_state = NCR_CMDCOMPLETE;
1524 break;
1525
1526 case MSG_MESSAGE_REJECT:
1527 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1528 switch (sc->sc_msgout) {
1529 case SEND_TAG:
1530 /* Target does not like tagged queuing.
1531 * - Flush the command queue
1532 * - Disable tagged queuing for the target
1533 * - Dequeue ecb from the queued array.
1534 */
1535 printf("%s: tagged queuing rejected: target %d\n",
1536 sc->sc_dev.dv_xname, ecb->xs->sc_link->target);
1537
1538 NCR_MSGS(("(rejected sent tag)"));
1539 NCRCMD(sc, NCRCMD_FLUSH);
1540 DELAY(1);
1541 ti->flags &= ~T_TAG;
1542 lun = ecb->xs->sc_link->lun;
1543 li = TINFO_LUN(ti, lun);
1544 if (ecb->tag[0] &&
1545 li->queued[ecb->tag[1]] != NULL) {
1546 li->queued[ecb->tag[1]] = NULL;
1547 li->used--;
1548 }
1549 ecb->tag[0] = ecb->tag[1] = 0;
1550 li->untagged = ecb;
1551 li->busy = 1;
1552 break;
1553
1554 case SEND_SDTR:
1555 printf("%s: sync transfer rejected: target %d\n",
1556 sc->sc_dev.dv_xname, ecb->xs->sc_link->target);
1557 sc->sc_flags &= ~NCR_SYNCHNEGO;
1558 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1559 ncr53c9x_setsync(sc, ti);
1560 break;
1561
1562 case SEND_WDTR:
1563 printf("%s: wide transfer rejected: target %d\n",
1564 sc->sc_dev.dv_xname, ecb->xs->sc_link->target);
1565 ti->flags &= ~T_WIDE;
1566 ti->width = 0;
1567 break;
1568
1569 case SEND_INIT_DET_ERR:
1570 goto abort;
1571 }
1572 break;
1573
1574 case MSG_NOOP:
1575 NCR_MSGS(("noop "));
1576 break;
1577
1578 case MSG_HEAD_OF_Q_TAG:
1579 case MSG_SIMPLE_Q_TAG:
1580 case MSG_ORDERED_Q_TAG:
1581 NCR_MSGS(("TAG %x:%x", sc->sc_imess[0], sc->sc_imess[1]));
1582 break;
1583
1584 case MSG_DISCONNECT:
1585 NCR_MSGS(("disconnect "));
1586 ti->dconns++;
1587 sc->sc_state = NCR_DISCONNECT;
1588
1589 /*
1590 * Mark the fact that all bytes have moved. The
1591 * target may not bother to do a SAVE POINTERS
1592 * at this stage. This flag will set the residual
1593 * count to zero on MSG COMPLETE.
1594 */
1595 if (sc->sc_dleft == 0)
1596 ecb->flags |= ECB_TENTATIVE_DONE;
1597
1598 break;
1599
1600 case MSG_SAVEDATAPOINTER:
1601 NCR_MSGS(("save datapointer "));
1602 ecb->daddr = sc->sc_dp;
1603 ecb->dleft = sc->sc_dleft;
1604 break;
1605
1606 case MSG_RESTOREPOINTERS:
1607 NCR_MSGS(("restore datapointer "));
1608 sc->sc_dp = ecb->daddr;
1609 sc->sc_dleft = ecb->dleft;
1610 break;
1611
1612 case MSG_EXTENDED:
1613 NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1614 switch (sc->sc_imess[2]) {
1615 case MSG_EXT_SDTR:
1616 NCR_MSGS(("SDTR period %d, offset %d ",
1617 sc->sc_imess[3], sc->sc_imess[4]));
1618 if (sc->sc_imess[1] != 3)
1619 goto reject;
1620 ti->period = sc->sc_imess[3];
1621 ti->offset = sc->sc_imess[4];
1622 ti->flags &= ~T_NEGOTIATE;
1623 if (sc->sc_minsync == 0 ||
1624 ti->offset == 0 ||
1625 ti->period > 124) {
1626 #ifdef NCR53C9X_DEBUG
1627 sc_print_addr(ecb->xs->sc_link);
1628 printf("async mode\n");
1629 #endif
1630 if ((sc->sc_flags&NCR_SYNCHNEGO)
1631 == 0) {
1632 /*
1633 * target initiated negotiation
1634 */
1635 ti->offset = 0;
1636 ti->flags &= ~T_SYNCMODE;
1637 ncr53c9x_sched_msgout(
1638 SEND_SDTR);
1639 } else {
1640 /* we are async */
1641 ti->flags &= ~T_SYNCMODE;
1642 }
1643 } else {
1644 #ifdef NCR53C9X_DEBUG
1645 int r, s;
1646 #endif
1647 int p;
1648
1649 p = ncr53c9x_stp2cpb(sc, ti->period);
1650 ti->period = ncr53c9x_cpb2stp(sc, p);
1651 #ifdef NCR53C9X_DEBUG
1652 sc_print_addr(ecb->xs->sc_link);
1653 r = 250/ti->period;
1654 s = (100*250)/ti->period - 100*r;
1655 printf("max sync rate %d.%02dMB/s\n",
1656 r, s);
1657 #endif
1658 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1659 /*
1660 * target initiated negotiation
1661 */
1662 if (ti->period <
1663 sc->sc_minsync)
1664 ti->period =
1665 sc->sc_minsync;
1666 if (ti->offset > 15)
1667 ti->offset = 15;
1668 ti->flags &= ~T_SYNCMODE;
1669 ncr53c9x_sched_msgout(
1670 SEND_SDTR);
1671 } else {
1672 /* we are sync */
1673 ti->flags |= T_SYNCMODE;
1674 }
1675 }
1676 sc->sc_flags &= ~NCR_SYNCHNEGO;
1677 ncr53c9x_setsync(sc, ti);
1678 break;
1679
1680 case MSG_EXT_WDTR:
1681 printf("%s: wide mode %d\n",
1682 sc->sc_dev.dv_xname, sc->sc_imess[3]);
1683 if (sc->sc_imess[3] == 1) {
1684 ti->cfg3 |= NCRFASCFG3_EWIDE;
1685 ncr53c9x_setsync(sc, ti);
1686 } else
1687 ti->width = 0;
1688 ti->flags &= ~T_WIDE;
1689 break;
1690 default:
1691 sc_print_addr(ecb->xs->sc_link);
1692 printf("unrecognized MESSAGE EXTENDED;"
1693 " sending REJECT\n");
1694 goto reject;
1695 }
1696 break;
1697
1698 default:
1699 NCR_MSGS(("ident "));
1700 sc_print_addr(ecb->xs->sc_link);
1701 printf("unrecognized MESSAGE; sending REJECT\n");
1702 reject:
1703 ncr53c9x_sched_msgout(SEND_REJECT);
1704 break;
1705 }
1706 break;
1707
1708 case NCR_IDENTIFIED:
1709 /*
1710 * IDENTIFY message was received and queue tag is expected now
1711 */
1712 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
1713 (sc->sc_msgify == 0)) {
1714 printf("%s: TAG reselect without IDENTIFY;"
1715 " MSG %x;"
1716 " sending DEVICE RESET\n",
1717 sc->sc_dev.dv_xname,
1718 sc->sc_imess[0]);
1719 goto reset;
1720 }
1721 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
1722 sc->sc_imess[0], sc->sc_imess[1]);
1723 break;
1724
1725 case NCR_RESELECTED:
1726 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
1727 sc->sc_msgify = sc->sc_imess[1];
1728 } else {
1729 printf("%s: reselect without IDENTIFY;"
1730 " MSG %x;"
1731 " sending DEVICE RESET\n",
1732 sc->sc_dev.dv_xname,
1733 sc->sc_imess[1]);
1734 goto reset;
1735 }
1736 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
1737 break;
1738
1739 default:
1740 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1741 sc->sc_dev.dv_xname);
1742 reset:
1743 ncr53c9x_sched_msgout(SEND_DEV_RESET);
1744 break;
1745
1746 abort:
1747 ncr53c9x_sched_msgout(SEND_ABORT);
1748 break;
1749 }
1750
1751 /* if we have more messages to send set ATN */
1752 if (sc->sc_msgpriq)
1753 NCRCMD(sc, NCRCMD_SETATN);
1754
1755 /* Ack last message byte */
1756 NCRCMD(sc, NCRCMD_MSGOK);
1757
1758 /* Done, reset message pointer. */
1759 sc->sc_flags &= ~NCR_DROP_MSGI;
1760 sc->sc_imlen = 0;
1761 }
1762
1763
1764 /*
1765 * Send the highest priority, scheduled message
1766 */
1767 void
ncr53c9x_msgout(struct ncr53c9x_softc * sc)1768 ncr53c9x_msgout(struct ncr53c9x_softc *sc)
1769 {
1770 struct ncr53c9x_tinfo *ti;
1771 struct ncr53c9x_ecb *ecb;
1772 size_t size;
1773
1774 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1775 sc->sc_msgpriq, sc->sc_prevphase));
1776
1777 /*
1778 * XXX - the NCR_ATN flag is not in sync with the actual ATN
1779 * condition on the SCSI bus. The 53c9x chip
1780 * automatically turns off ATN before sending the
1781 * message byte. (see also the comment below in the
1782 * default case when picking out a message to send)
1783 */
1784 if (sc->sc_flags & NCR_ATN) {
1785 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1786 new:
1787 NCRCMD(sc, NCRCMD_FLUSH);
1788 /* DELAY(1); */
1789 sc->sc_msgoutq = 0;
1790 sc->sc_omlen = 0;
1791 }
1792 } else {
1793 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1794 ncr53c9x_sched_msgout(sc->sc_msgoutq);
1795 goto new;
1796 } else {
1797 printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1798 sc->sc_dev.dv_xname, __LINE__);
1799 }
1800 }
1801
1802 if (sc->sc_omlen == 0) {
1803 /* Pick up highest priority message */
1804 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1805 sc->sc_msgoutq |= sc->sc_msgout;
1806 sc->sc_msgpriq &= ~sc->sc_msgout;
1807 sc->sc_omlen = 1; /* "Default" message len */
1808 switch (sc->sc_msgout) {
1809 case SEND_SDTR:
1810 ecb = sc->sc_nexus;
1811 ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
1812 sc->sc_omess[0] = MSG_EXTENDED;
1813 sc->sc_omess[1] = 3;
1814 sc->sc_omess[2] = MSG_EXT_SDTR;
1815 sc->sc_omess[3] = ti->period;
1816 sc->sc_omess[4] = ti->offset;
1817 sc->sc_omlen = 5;
1818 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1819 ti->flags |= T_SYNCMODE;
1820 ncr53c9x_setsync(sc, ti);
1821 }
1822 break;
1823 case SEND_WDTR:
1824 ecb = sc->sc_nexus;
1825 ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
1826 sc->sc_omess[0] = MSG_EXTENDED;
1827 sc->sc_omess[1] = 2;
1828 sc->sc_omess[2] = MSG_EXT_WDTR;
1829 sc->sc_omess[3] = ti->width;
1830 sc->sc_omlen = 4;
1831 break;
1832 case SEND_IDENTIFY:
1833 if (sc->sc_state != NCR_CONNECTED) {
1834 printf("%s at line %d: no nexus\n",
1835 sc->sc_dev.dv_xname, __LINE__);
1836 }
1837 ecb = sc->sc_nexus;
1838 sc->sc_omess[0] =
1839 MSG_IDENTIFY(ecb->xs->sc_link->lun, 0);
1840 break;
1841 case SEND_TAG:
1842 if (sc->sc_state != NCR_CONNECTED) {
1843 printf("%s at line %d: no nexus\n",
1844 sc->sc_dev.dv_xname, __LINE__);
1845 }
1846 ecb = sc->sc_nexus;
1847 sc->sc_omess[0] = ecb->tag[0];
1848 sc->sc_omess[1] = ecb->tag[1];
1849 sc->sc_omlen = 2;
1850 break;
1851 case SEND_DEV_RESET:
1852 sc->sc_flags |= NCR_ABORTING;
1853 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1854 ecb = sc->sc_nexus;
1855 ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
1856 ti->flags &= ~T_SYNCMODE;
1857 if ((ti->flags & T_SYNCHOFF) == 0)
1858 /* We can re-start sync negotiation */
1859 ti->flags |= T_NEGOTIATE;
1860 break;
1861 case SEND_PARITY_ERROR:
1862 sc->sc_omess[0] = MSG_PARITY_ERROR;
1863 break;
1864 case SEND_ABORT:
1865 sc->sc_flags |= NCR_ABORTING;
1866 sc->sc_omess[0] = MSG_ABORT;
1867 break;
1868 case SEND_INIT_DET_ERR:
1869 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1870 break;
1871 case SEND_REJECT:
1872 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1873 break;
1874 default:
1875 /*
1876 * We normally do not get here, since the chip
1877 * automatically turns off ATN before the last
1878 * byte of a message is sent to the target.
1879 * However, if the target rejects our (multi-byte)
1880 * message early by switching to MSG IN phase
1881 * ATN remains on, so the target may return to
1882 * MSG OUT phase. If there are no scheduled messages
1883 * left we send a NO-OP.
1884 *
1885 * XXX - Note that this leaves no useful purpose for
1886 * the NCR_ATN flag.
1887 */
1888 sc->sc_flags &= ~NCR_ATN;
1889 sc->sc_omess[0] = MSG_NOOP;
1890 break;
1891 }
1892 sc->sc_omp = sc->sc_omess;
1893 }
1894
1895 #ifdef DEBUG
1896 {
1897 int i;
1898
1899 for (i = 0; i<sc->sc_omlen; i++)
1900 NCR_MISC(("<msgbyte:0x%02x>", sc->sc_omess[i]));
1901 }
1902 #endif
1903 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1904 /*
1905 * XXX fifo size
1906 */
1907 ncr53c9x_flushfifo(sc);
1908 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
1909 sc->sc_cmdlen = 0;
1910 NCRCMD(sc, NCRCMD_TRANS);
1911 } else {
1912 /* (re)send the message */
1913 size = min(sc->sc_omlen, sc->sc_maxxfer);
1914 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
1915 /* Program the SCSI counter */
1916 NCR_SET_COUNT(sc, size);
1917
1918 /* Load the count in and start the message-out transfer */
1919 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
1920 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
1921 NCRDMA_GO(sc);
1922 }
1923 }
1924
1925 /*
1926 * This is the most critical part of the driver, and has to know
1927 * how to deal with *all* error conditions and phases from the SCSI
1928 * bus. If there are no errors and the DMA was active, then call the
1929 * DMA pseudo-interrupt handler. If this returns 1, then that was it
1930 * and we can return from here without further processing.
1931 *
1932 * Most of this needs verifying.
1933 */
1934 int sdebug = 0;
1935 int
ncr53c9x_intr(void * arg)1936 ncr53c9x_intr(void *arg)
1937 {
1938 struct ncr53c9x_softc *sc = arg;
1939 struct ncr53c9x_ecb *ecb;
1940 struct scsi_link *sc_link;
1941 struct ncr53c9x_tinfo *ti;
1942 size_t size;
1943 int nfifo;
1944
1945 NCR_TRACE(("[ncr53c9x_intr: state %d] ", sc->sc_state));
1946
1947 if (!NCRDMA_ISINTR(sc))
1948 return (0);
1949
1950 again:
1951 /* and what do the registers say... */
1952 ncr53c9x_readregs(sc);
1953
1954 /*
1955 * At the moment, only a SCSI Bus Reset or Illegal
1956 * Command are classed as errors. A disconnect is a
1957 * valid condition, and we let the code check is the
1958 * "NCR_BUSFREE_OK" flag was set before declaring it
1959 * and error.
1960 *
1961 * Also, the status register tells us about "Gross
1962 * Errors" and "Parity errors". Only the Gross Error
1963 * is really bad, and the parity errors are dealt
1964 * with later
1965 *
1966 * TODO
1967 * If there are too many parity error, go to slow
1968 * cable mode ?
1969 */
1970
1971 /* SCSI Reset */
1972 if (sc->sc_espintr & NCRINTR_SBR) {
1973 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1974 NCRCMD(sc, NCRCMD_FLUSH);
1975 DELAY(1);
1976 }
1977 if (sc->sc_state != NCR_SBR) {
1978 printf("%s: SCSI bus reset\n",
1979 sc->sc_dev.dv_xname);
1980 ncr53c9x_init(sc, 0); /* Restart everything */
1981 return (1);
1982 }
1983 #if 0
1984 /*XXX*/ printf("<expected bus reset: "
1985 "[intr %x, stat %x, step %d]>\n",
1986 sc->sc_espintr, sc->sc_espstat,
1987 sc->sc_espstep);
1988 #endif
1989 if (sc->sc_nexus)
1990 panic("%s: nexus in reset state",
1991 sc->sc_dev.dv_xname);
1992 goto sched;
1993 }
1994
1995 ecb = sc->sc_nexus;
1996
1997 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
1998 if (sc->sc_espintr & NCRINTR_ERR ||
1999 sc->sc_espstat & NCRSTAT_GE) {
2000
2001 if (sc->sc_espstat & NCRSTAT_GE) {
2002 /* Gross Error; no target ? */
2003 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2004 NCRCMD(sc, NCRCMD_FLUSH);
2005 DELAY(1);
2006 }
2007 if (sc->sc_state == NCR_CONNECTED ||
2008 sc->sc_state == NCR_SELECTING) {
2009 ecb->xs->error = XS_TIMEOUT;
2010 ncr53c9x_done(sc, ecb);
2011 }
2012 return (1);
2013 }
2014
2015 if (sc->sc_espintr & NCRINTR_ILL) {
2016 if (sc->sc_flags & NCR_EXPECT_ILLCMD) {
2017 /*
2018 * Eat away "Illegal command" interrupt
2019 * on a ESP100 caused by a re-selection
2020 * while we were trying to select
2021 * another target.
2022 */
2023 #ifdef DEBUG
2024 printf("%s: ESP100 work-around activated\n",
2025 sc->sc_dev.dv_xname);
2026 #endif
2027 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2028 return (1);
2029 }
2030 /* illegal command, out of sync ? */
2031 printf("%s: illegal command: 0x%x "
2032 "(state %d, phase %x, prevphase %x)\n",
2033 sc->sc_dev.dv_xname, sc->sc_lastcmd,
2034 sc->sc_state, sc->sc_phase,
2035 sc->sc_prevphase);
2036 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2037 NCRCMD(sc, NCRCMD_FLUSH);
2038 DELAY(1);
2039 }
2040 ncr53c9x_init(sc, 1); /* Restart everything */
2041 return (1);
2042 }
2043 }
2044 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2045
2046 /*
2047 * Call if DMA is active.
2048 *
2049 * If DMA_INTR returns true, then maybe go 'round the loop
2050 * again in case there is no more DMA queued, but a phase
2051 * change is expected.
2052 */
2053 if (NCRDMA_ISACTIVE(sc)) {
2054 int r = NCRDMA_INTR(sc);
2055 if (r == -1) {
2056 printf("%s: DMA error; resetting\n",
2057 sc->sc_dev.dv_xname);
2058 ncr53c9x_init(sc, 1);
2059 return (1);
2060 }
2061 /* If DMA active here, then go back to work... */
2062 if (NCRDMA_ISACTIVE(sc))
2063 return (1);
2064
2065 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
2066 /*
2067 * DMA not completed. If we can not find a
2068 * acceptable explanation, print a diagnostic.
2069 */
2070 if (sc->sc_state == NCR_SELECTING)
2071 /*
2072 * This can happen if we are reselected
2073 * while using DMA to select a target.
2074 */
2075 /*void*/;
2076 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE){
2077 /*
2078 * Our (multi-byte) message (eg SDTR)
2079 * was interrupted by the target to
2080 * send a MSG REJECT.
2081 * Print diagnostic if current phase
2082 * is not MESSAGE IN.
2083 */
2084 if (sc->sc_phase != MESSAGE_IN_PHASE)
2085 printf("%s: !TC on MSG OUT"
2086 " [intr %x, stat %x, step %d]"
2087 " prevphase %x, resid %lx\n",
2088 sc->sc_dev.dv_xname,
2089 sc->sc_espintr,
2090 sc->sc_espstat,
2091 sc->sc_espstep,
2092 sc->sc_prevphase,
2093 (u_long)sc->sc_omlen);
2094 } else if (sc->sc_dleft == 0) {
2095 /*
2096 * The DMA operation was started for
2097 * a DATA transfer. Print a diagnostic
2098 * if the DMA counter and TC bit
2099 * appear to be out of sync.
2100 */
2101 printf("%s: !TC on DATA XFER"
2102 " [intr %x, stat %x, step %d]"
2103 " prevphase %x, resid %x\n",
2104 sc->sc_dev.dv_xname,
2105 sc->sc_espintr,
2106 sc->sc_espstat,
2107 sc->sc_espstep,
2108 sc->sc_prevphase,
2109 ecb?ecb->dleft:-1);
2110 }
2111 }
2112 }
2113
2114 /*
2115 * check for less serious errors
2116 */
2117 if (sc->sc_espstat & NCRSTAT_PE) {
2118 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
2119 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
2120 ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
2121 else
2122 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
2123 }
2124
2125 if (sc->sc_espintr & NCRINTR_DIS) {
2126 sc->sc_msgify = 0;
2127 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
2128 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2129 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2130 NCRCMD(sc, NCRCMD_FLUSH);
2131 /* DELAY(1); */
2132 }
2133 /*
2134 * This command must (apparently) be issued within
2135 * 250mS of a disconnect. So here you are...
2136 */
2137 NCRCMD(sc, NCRCMD_ENSEL);
2138
2139 switch (sc->sc_state) {
2140 case NCR_RESELECTED:
2141 goto sched;
2142
2143 case NCR_SELECTING:
2144 ecb->xs->error = XS_SELTIMEOUT;
2145 goto finish;
2146
2147 case NCR_CONNECTED:
2148 if ((sc->sc_flags & NCR_SYNCHNEGO)) {
2149 #ifdef NCR53C9X_DEBUG
2150 if (ecb)
2151 sc_print_addr(ecb->xs->sc_link);
2152 printf("sync nego not completed!\n");
2153 #endif
2154 ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
2155 sc->sc_flags &= ~NCR_SYNCHNEGO;
2156 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
2157 }
2158
2159 /* it may be OK to disconnect */
2160 if ((sc->sc_flags & NCR_ABORTING) == 0) {
2161 /*
2162 * Section 5.1.1 of the SCSI 2 spec
2163 * suggests issuing a REQUEST SENSE
2164 * following an unexpected disconnect.
2165 * Some devices go into a contingent
2166 * allegiance condition when
2167 * disconnecting, and this is necessary
2168 * to clean up their state.
2169 */
2170 printf("%s: unexpected disconnect; ",
2171 sc->sc_dev.dv_xname);
2172 if (ecb->flags & ECB_SENSE) {
2173 printf("resetting\n");
2174 goto reset;
2175 }
2176 printf("sending REQUEST SENSE\n");
2177 timeout_del(&ecb->xs->stimeout);
2178 ncr53c9x_sense(sc, ecb);
2179 goto out;
2180 }
2181
2182 ecb->xs->error = XS_TIMEOUT;
2183 goto finish;
2184
2185 case NCR_DISCONNECT:
2186 sc->sc_nexus = NULL;
2187 goto sched;
2188
2189 case NCR_CMDCOMPLETE:
2190 goto finish;
2191 }
2192 }
2193
2194 switch (sc->sc_state) {
2195
2196 case NCR_SBR:
2197 printf("%s: waiting for SCSI Bus Reset to happen\n",
2198 sc->sc_dev.dv_xname);
2199 return (1);
2200
2201 case NCR_RESELECTED:
2202 /*
2203 * we must be continuing a message ?
2204 */
2205 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2206 printf("%s: target didn't identify\n",
2207 sc->sc_dev.dv_xname);
2208 ncr53c9x_init(sc, 1);
2209 return (1);
2210 }
2211 printf("<<RESELECT CONT'd>>");
2212 #if XXXX
2213 ncr53c9x_msgin(sc);
2214 if (sc->sc_state != NCR_CONNECTED) {
2215 /* IDENTIFY fail?! */
2216 printf("%s: identify failed\n",
2217 sc->sc_dev.dv_xname);
2218 ncr53c9x_init(sc, 1);
2219 return (1);
2220 }
2221 #endif
2222 break;
2223
2224 case NCR_IDENTIFIED:
2225 ecb = sc->sc_nexus;
2226 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2227 int i = (NCR_READ_REG(sc, NCR_FFLAG)
2228 & NCRFIFO_FF);
2229 /*
2230 * Things are seriously fucked up.
2231 * Pull the brakes, i.e. reset
2232 */
2233 printf("%s: target didn't send tag: %d bytes in fifo\n",
2234 sc->sc_dev.dv_xname, i);
2235 /* Drain and display fifo */
2236 while (i-- > 0)
2237 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
2238 ncr53c9x_init(sc, 1);
2239 return (1);
2240 } else
2241 goto msgin;
2242
2243 break;
2244 case NCR_IDLE:
2245 case NCR_SELECTING:
2246 ecb = sc->sc_nexus;
2247 if (sc->sc_espintr & NCRINTR_RESEL) {
2248 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
2249 sc->sc_flags = 0;
2250 /*
2251 * If we're trying to select a
2252 * target ourselves, push our command
2253 * back into the ready list.
2254 */
2255 if (sc->sc_state == NCR_SELECTING) {
2256 NCR_MISC(("backoff selector "));
2257 timeout_del(&ecb->xs->stimeout);
2258 ncr53c9x_dequeue(sc, ecb);
2259 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
2260 ecb->flags |= ECB_READY;
2261 ecb = sc->sc_nexus = NULL;
2262 }
2263 sc->sc_state = NCR_RESELECTED;
2264 if (sc->sc_phase != MESSAGE_IN_PHASE) {
2265 /*
2266 * Things are seriously fucked up.
2267 * Pull the brakes, i.e. reset
2268 */
2269 printf("%s: target didn't identify\n",
2270 sc->sc_dev.dv_xname);
2271 ncr53c9x_init(sc, 1);
2272 return (1);
2273 }
2274 /*
2275 * The C90 only inhibits FIFO writes until
2276 * reselection is complete, instead of
2277 * waiting until the interrupt status register
2278 * has been read. So, if the reselect happens
2279 * while we were entering a command bytes (for
2280 * another target) some of those bytes can
2281 * appear in the FIFO here, after the
2282 * interrupt is taken.
2283 */
2284 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2285
2286 if (nfifo < 2 ||
2287 (nfifo > 2 &&
2288 sc->sc_rev != NCR_VARIANT_ESP100)) {
2289 printf("%s: RESELECT: "
2290 "%d bytes in FIFO! "
2291 "[intr %x, stat %x, step %d, prevphase %x]\n",
2292 sc->sc_dev.dv_xname,
2293 nfifo,
2294 sc->sc_espintr,
2295 sc->sc_espstat,
2296 sc->sc_espstep,
2297 sc->sc_prevphase);
2298 ncr53c9x_init(sc, 1);
2299 return (1);
2300 }
2301 sc->sc_selid = sc->sc_imess[0];
2302 NCR_MISC(("selid=%2x ", sc->sc_selid));
2303
2304 /* Handle identify message */
2305 ncr53c9x_msgin(sc);
2306 if (nfifo != 2) {
2307 /*
2308 * Note: this should not happen
2309 * with `dmaselect' on.
2310 */
2311 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2312 NCRCMD(sc, NCRCMD_FLUSH);
2313 } else if (sc->sc_features & NCR_F_DMASELECT &&
2314 sc->sc_rev == NCR_VARIANT_ESP100) {
2315 sc->sc_flags |= NCR_EXPECT_ILLCMD;
2316 }
2317
2318 if (sc->sc_state != NCR_CONNECTED &&
2319 sc->sc_state != NCR_IDENTIFIED) {
2320 /* IDENTIFY fail?! */
2321 printf("%s: identify failed, state %d, intr %02x\n",
2322 sc->sc_dev.dv_xname, sc->sc_state,
2323 sc->sc_espintr);
2324 ncr53c9x_init(sc, 1);
2325 return (1);
2326 }
2327 goto shortcut; /* ie. next phase expected soon */
2328 }
2329
2330 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
2331 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
2332 /*
2333 * Arbitration won; examine the `step' register
2334 * to determine how far the selection could progress.
2335 */
2336 ecb = sc->sc_nexus;
2337 if (!ecb)
2338 panic("ncr53c9x: no nexus");
2339
2340 sc_link = ecb->xs->sc_link;
2341 ti = &sc->sc_tinfo[sc_link->target];
2342
2343 switch (sc->sc_espstep) {
2344 case 0:
2345 /*
2346 * The target did not respond with a
2347 * message out phase - probably an old
2348 * device that doesn't recognize ATN.
2349 * Clear ATN and just continue, the
2350 * target should be in the command
2351 * phase.
2352 * XXXX check for command phase?
2353 */
2354 NCRCMD(sc, NCRCMD_RSTATN);
2355 break;
2356 case 1:
2357 if ((ti->flags & T_NEGOTIATE) == 0 &&
2358 ecb->tag[0] == 0) {
2359 printf("%s: step 1 & !NEG\n",
2360 sc->sc_dev.dv_xname);
2361 goto reset;
2362 }
2363 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
2364 printf("%s: !MSGOUT\n",
2365 sc->sc_dev.dv_xname);
2366 goto reset;
2367 }
2368 if (ti->flags & T_WIDE) {
2369 ncr53c9x_sched_msgout(SEND_WDTR);
2370 }
2371 if (ti->flags & T_NEGOTIATE) {
2372 /* Start negotiating */
2373 ti->period = sc->sc_minsync;
2374 ti->offset = 15;
2375 sc->sc_flags |= NCR_SYNCHNEGO;
2376 if (ecb->tag[0])
2377 ncr53c9x_sched_msgout(SEND_TAG|SEND_SDTR);
2378 else
2379 ncr53c9x_sched_msgout(SEND_SDTR);
2380 } else {
2381 /* Could not do ATN3 so send TAG */
2382 ncr53c9x_sched_msgout(SEND_TAG);
2383 }
2384 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
2385 break;
2386 case 3:
2387 /*
2388 * Grr, this is supposed to mean
2389 * "target left command phase prematurely".
2390 * It seems to happen regularly when
2391 * sync mode is on.
2392 * Look at FIFO to see if command went out.
2393 * (Timing problems?)
2394 */
2395 if (sc->sc_features & NCR_F_DMASELECT) {
2396 if (sc->sc_cmdlen == 0)
2397 /* Hope for the best.. */
2398 break;
2399 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2400 & NCRFIFO_FF) == 0) {
2401 /* Hope for the best.. */
2402 break;
2403 }
2404 printf("(%s:%d:%d): selection failed;"
2405 " %d left in FIFO "
2406 "[intr %x, stat %x, step %d]\n",
2407 sc->sc_dev.dv_xname,
2408 sc_link->target,
2409 sc_link->lun,
2410 NCR_READ_REG(sc, NCR_FFLAG)
2411 & NCRFIFO_FF,
2412 sc->sc_espintr, sc->sc_espstat,
2413 sc->sc_espstep);
2414 NCRCMD(sc, NCRCMD_FLUSH);
2415 ncr53c9x_sched_msgout(SEND_ABORT);
2416 return (1);
2417 case 2:
2418 /* Select stuck at Command Phase */
2419 NCRCMD(sc, NCRCMD_FLUSH);
2420 break;
2421 case 4:
2422 if (sc->sc_features & NCR_F_DMASELECT &&
2423 sc->sc_cmdlen != 0)
2424 printf("(%s:%d:%d): select; "
2425 "%lu left in DMA buffer "
2426 "[intr %x, stat %x, step %d]\n",
2427 sc->sc_dev.dv_xname,
2428 sc_link->target,
2429 sc_link->lun,
2430 (u_long)sc->sc_cmdlen,
2431 sc->sc_espintr,
2432 sc->sc_espstat,
2433 sc->sc_espstep);
2434 /* So far, everything went fine */
2435 break;
2436 }
2437
2438 sc->sc_prevphase = INVALID_PHASE; /* ?? */
2439 /* Do an implicit RESTORE POINTERS. */
2440 sc->sc_dp = ecb->daddr;
2441 sc->sc_dleft = ecb->dleft;
2442 sc->sc_state = NCR_CONNECTED;
2443 break;
2444
2445 } else {
2446
2447 printf("%s: unexpected status after select"
2448 ": [intr %x, stat %x, step %x]\n",
2449 sc->sc_dev.dv_xname,
2450 sc->sc_espintr, sc->sc_espstat,
2451 sc->sc_espstep);
2452 NCRCMD(sc, NCRCMD_FLUSH);
2453 DELAY(1);
2454 goto reset;
2455 }
2456 if (sc->sc_state == NCR_IDLE) {
2457 printf("%s: stray interrupt\n",
2458 sc->sc_dev.dv_xname);
2459 return (0);
2460 }
2461 break;
2462
2463 case NCR_CONNECTED:
2464 if (sc->sc_flags & NCR_ICCS) {
2465 /* "Initiate Command Complete Steps" in progress */
2466 u_char msg;
2467
2468 sc->sc_flags &= ~NCR_ICCS;
2469
2470 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2471 printf("%s: ICCS: "
2472 ": [intr %x, stat %x, step %x]\n",
2473 sc->sc_dev.dv_xname,
2474 sc->sc_espintr, sc->sc_espstat,
2475 sc->sc_espstep);
2476 }
2477 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2478 if (sc->sc_imlen < 2)
2479 printf("%s: can't get status, only %d bytes\n",
2480 sc->sc_dev.dv_xname, (int)sc->sc_imlen);
2481 ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
2482 msg = sc->sc_imess[sc->sc_imlen - 1];
2483 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
2484 if (msg == MSG_CMDCOMPLETE) {
2485 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
2486 ? 0
2487 : sc->sc_dleft;
2488 if ((ecb->flags & ECB_SENSE) == 0)
2489 ecb->xs->resid = ecb->dleft;
2490 sc->sc_state = NCR_CMDCOMPLETE;
2491 } else
2492 printf("%s: STATUS_PHASE: msg %d\n",
2493 sc->sc_dev.dv_xname, msg);
2494 sc->sc_imlen = 0;
2495 NCRCMD(sc, NCRCMD_MSGOK);
2496 goto shortcut; /* ie. wait for disconnect */
2497 }
2498 break;
2499 default:
2500 /* Don't panic: reset. */
2501 printf("%s: invalid state: %d\n",
2502 sc->sc_dev.dv_xname,
2503 sc->sc_state);
2504 ncr53c9x_scsi_reset(sc);
2505 goto out;
2506 break;
2507 }
2508
2509 /*
2510 * Driver is now in state NCR_CONNECTED, i.e. we
2511 * have a current command working the SCSI bus.
2512 */
2513 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2514 panic("ncr53c9x no nexus");
2515 }
2516
2517 switch (sc->sc_phase) {
2518 case MESSAGE_OUT_PHASE:
2519 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2520 ncr53c9x_msgout(sc);
2521 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2522 break;
2523 case MESSAGE_IN_PHASE:
2524 msgin:
2525 NCR_PHASE(("MESSAGE_IN_PHASE "));
2526 if (sc->sc_espintr & NCRINTR_BS) {
2527 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2528 !(sc->sc_espstat2 & FAS_STAT2_EMPTY)) {
2529 NCRCMD(sc, NCRCMD_FLUSH);
2530 }
2531 sc->sc_flags |= NCR_WAITI;
2532 NCRCMD(sc, NCRCMD_TRANS);
2533 } else if (sc->sc_espintr & NCRINTR_FC) {
2534 if ((sc->sc_flags & NCR_WAITI) == 0) {
2535 printf("%s: MSGIN: unexpected FC bit: "
2536 "[intr %x, stat %x, step %x]\n",
2537 sc->sc_dev.dv_xname,
2538 sc->sc_espintr, sc->sc_espstat,
2539 sc->sc_espstep);
2540 }
2541 sc->sc_flags &= ~NCR_WAITI;
2542 ncr53c9x_rdfifo(sc,
2543 (sc->sc_prevphase == sc->sc_phase) ?
2544 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2545 ncr53c9x_msgin(sc);
2546 } else {
2547 printf("%s: MSGIN: weird bits: "
2548 "[intr %x, stat %x, step %x]\n",
2549 sc->sc_dev.dv_xname,
2550 sc->sc_espintr, sc->sc_espstat,
2551 sc->sc_espstep);
2552 }
2553 sc->sc_prevphase = MESSAGE_IN_PHASE;
2554 goto shortcut; /* i.e. expect data to be ready */
2555 break;
2556 case COMMAND_PHASE:
2557 /*
2558 * Send the command block. Normally we don't see this
2559 * phase because the SEL_ATN command takes care of
2560 * all this. However, we end up here if either the
2561 * target or we wanted to exchange some more messages
2562 * first (e.g. to start negotiations).
2563 */
2564
2565 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2566 ecb->cmd.cmd.opcode, ecb->clen));
2567 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2568 NCRCMD(sc, NCRCMD_FLUSH);
2569 /* DELAY(1); */
2570 }
2571 if (sc->sc_features & NCR_F_DMASELECT) {
2572 /* setup DMA transfer for command */
2573 size = ecb->clen;
2574 sc->sc_cmdlen = size;
2575 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2576 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2577 0, &size);
2578 /* Program the SCSI counter */
2579 NCR_SET_COUNT(sc, size);
2580
2581 /* load the count in */
2582 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2583
2584 /* start the command transfer */
2585 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2586 NCRDMA_GO(sc);
2587 } else {
2588 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2589 sc->sc_cmdlen = 0;
2590 NCRCMD(sc, NCRCMD_TRANS);
2591 }
2592 sc->sc_prevphase = COMMAND_PHASE;
2593 break;
2594 case DATA_OUT_PHASE:
2595 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
2596 NCRCMD(sc, NCRCMD_FLUSH);
2597 size = min(sc->sc_dleft, sc->sc_maxxfer);
2598 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2599 0, &size);
2600 sc->sc_prevphase = DATA_OUT_PHASE;
2601 goto setup_xfer;
2602 case DATA_IN_PHASE:
2603 NCR_PHASE(("DATA_IN_PHASE "));
2604 if (sc->sc_rev == NCR_VARIANT_ESP100)
2605 NCRCMD(sc, NCRCMD_FLUSH);
2606 size = min(sc->sc_dleft, sc->sc_maxxfer);
2607 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
2608 1, &size);
2609 sc->sc_prevphase = DATA_IN_PHASE;
2610 setup_xfer:
2611 /* Target returned to data phase: wipe "done" memory */
2612 ecb->flags &= ~ECB_TENTATIVE_DONE;
2613
2614 /* Program the SCSI counter */
2615 NCR_SET_COUNT(sc, size);
2616
2617 /* load the count in */
2618 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2619
2620 /*
2621 * Note that if `size' is 0, we've already transceived
2622 * all the bytes we want but we're still in DATA PHASE.
2623 * Apparently, the device needs padding. Also, a
2624 * transfer size of 0 means "maximum" to the chip
2625 * DMA logic.
2626 */
2627 NCRCMD(sc,
2628 (size==0?NCRCMD_TRPAD:NCRCMD_TRANS)|NCRCMD_DMA);
2629 NCRDMA_GO(sc);
2630 return (1);
2631 case STATUS_PHASE:
2632 NCR_PHASE(("STATUS_PHASE "));
2633 sc->sc_flags |= NCR_ICCS;
2634 NCRCMD(sc, NCRCMD_ICCS);
2635 sc->sc_prevphase = STATUS_PHASE;
2636 goto shortcut; /* i.e. expect status results soon */
2637 break;
2638 case INVALID_PHASE:
2639 break;
2640 default:
2641 printf("%s: unexpected bus phase; resetting\n",
2642 sc->sc_dev.dv_xname);
2643 goto reset;
2644 }
2645
2646 out:
2647 return (1);
2648
2649 reset:
2650 ncr53c9x_init(sc, 1);
2651 goto out;
2652
2653 finish:
2654 ncr53c9x_done(sc, ecb);
2655 goto out;
2656
2657 sched:
2658 sc->sc_state = NCR_IDLE;
2659 ncr53c9x_sched(sc);
2660 goto out;
2661
2662 shortcut:
2663 /*
2664 * The idea is that many of the SCSI operations take very little
2665 * time, and going away and getting interrupted is too high an
2666 * overhead to pay. For example, selecting, sending a message
2667 * and command and then doing some work can be done in one "pass".
2668 *
2669 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1
2670 * at 40MHz. This needs testing.
2671 */
2672 {
2673 struct timeval wait, cur;
2674
2675 microuptime(&wait);
2676 wait.tv_usec += 50/sc->sc_freq;
2677 if (wait.tv_usec >= 1000000) {
2678 wait.tv_sec++;
2679 wait.tv_usec -= 1000000;
2680 }
2681 do {
2682 if (NCRDMA_ISINTR(sc))
2683 goto again;
2684 microuptime(&cur);
2685 } while (timercmp(&cur, &wait, <=));
2686 }
2687 goto out;
2688 }
2689
2690 void
ncr53c9x_abort(struct ncr53c9x_softc * sc,struct ncr53c9x_ecb * ecb)2691 ncr53c9x_abort(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
2692 {
2693
2694 /* 2 secs for the abort */
2695 ecb->xs->timeout = NCR_ABORT_TIMEOUT;
2696 ecb->flags |= ECB_ABORT;
2697
2698 if (ecb == sc->sc_nexus) {
2699 int timeout = ecb->xs->timeout;
2700
2701 /*
2702 * If we're still selecting, the message will be scheduled
2703 * after selection is complete.
2704 */
2705 if (sc->sc_state == NCR_CONNECTED)
2706 ncr53c9x_sched_msgout(SEND_ABORT);
2707
2708 /*
2709 * Reschedule timeout.
2710 */
2711 if (timeout > 1000000)
2712 timeout = (timeout / 1000) * hz;
2713 else
2714 timeout = (timeout * hz) / 1000;
2715 timeout_add(&ecb->xs->stimeout, timeout);
2716 } else {
2717 /*
2718 * Just leave the command where it is.
2719 * XXX - what choice do we have but to reset the SCSI
2720 * eventually?
2721 */
2722 if (sc->sc_state == NCR_IDLE)
2723 ncr53c9x_sched(sc);
2724 }
2725 }
2726
2727 void
ncr53c9x_timeout(void * arg)2728 ncr53c9x_timeout(void *arg)
2729 {
2730 struct ncr53c9x_ecb *ecb = arg;
2731 struct scsi_xfer *xs = ecb->xs;
2732 struct scsi_link *sc_link = xs->sc_link;
2733 struct ncr53c9x_softc *sc = sc_link->bus->sb_adapter_softc;
2734 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
2735 int s;
2736
2737 sc_print_addr(sc_link);
2738 printf("timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
2739 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
2740 "msg(q %x,o %x) %s>",
2741 ecb, ecb->flags, ecb->dleft, ecb->stat,
2742 sc->sc_state, sc->sc_nexus,
2743 NCR_READ_REG(sc, NCR_STAT),
2744 sc->sc_phase, sc->sc_prevphase,
2745 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2746 NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
2747 #if NCR53C9X_DEBUG > 1
2748 printf("TRACE: %s.", ecb->trace);
2749 #endif
2750
2751 s = splbio();
2752
2753 if (ecb->flags & ECB_ABORT) {
2754 /* abort timed out */
2755 printf(" AGAIN\n");
2756
2757 ncr53c9x_init(sc, 1);
2758 } else {
2759 /* abort the operation that has timed out */
2760 printf("\n");
2761 xs->error = XS_TIMEOUT;
2762 ncr53c9x_abort(sc, ecb);
2763
2764 /* Disable sync mode if stuck in a data phase */
2765 if (ecb == sc->sc_nexus &&
2766 (ti->flags & T_SYNCMODE) != 0 &&
2767 (sc->sc_phase & (MSGI|CDI)) == 0) {
2768 sc_print_addr(sc_link);
2769 printf("sync negotiation disabled\n");
2770 sc->sc_cfflags |= (1 << (sc_link->target + 16));
2771 }
2772 }
2773
2774 splx(s);
2775 }
2776