1 /* $NetBSD: ne2000.c,v 1.74 2013/08/11 12:34:16 rkujawa Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
35 * adapters.
36 *
37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
38 *
39 * Copyright (C) 1993, David Greenman. This software may be used, modified,
40 * copied, distributed, and sold, in both source and binary form provided that
41 * the above copyright and these terms are retained. Under no circumstances is
42 * the author responsible for the proper functioning of this software, nor does
43 * the author assume any responsibility for damages incurred with its use.
44 */
45
46 /*
47 * Common code shared by all NE2000-compatible Ethernet interfaces.
48 */
49
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.74 2013/08/11 12:34:16 rkujawa Exp $");
52
53 #include "opt_ipkdb.h"
54
55 #include "rtl80x9.h"
56
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/device.h>
60 #include <sys/socket.h>
61 #include <sys/mbuf.h>
62 #include <sys/syslog.h>
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_types.h>
67 #include <net/if_media.h>
68
69 #include <net/if_ether.h>
70
71 #include <sys/bswap.h>
72 #include <sys/bus.h>
73
74 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
75 #define bus_space_write_stream_2 bus_space_write_2
76 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
77 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
78 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
79
80 #ifdef IPKDB_NE
81 #include <ipkdb/ipkdb.h>
82 #endif
83
84 #include <dev/ic/dp8390reg.h>
85 #include <dev/ic/dp8390var.h>
86
87 #include <dev/ic/ne2000reg.h>
88 #include <dev/ic/ne2000var.h>
89
90 #include <dev/ic/rtl80x9reg.h>
91 #include <dev/ic/rtl80x9var.h>
92
93 #include <dev/ic/ax88190reg.h>
94
95 static int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int);
96 static int ne2000_ring_copy(struct dp8390_softc *, int, void *, u_short);
97 static void ne2000_read_hdr(struct dp8390_softc *, int,
98 struct dp8390_ring *);
99 static int ne2000_test_mem(struct dp8390_softc *);
100
101 static void ne2000_writemem(bus_space_tag_t, bus_space_handle_t,
102 bus_space_tag_t, bus_space_handle_t, const uint8_t *, int,
103 size_t, int, int);
104 static void ne2000_readmem(bus_space_tag_t, bus_space_handle_t,
105 bus_space_tag_t, bus_space_handle_t, int, uint8_t *,
106 size_t, int);
107
108 #ifdef NE2000_DETECT_8BIT
109 static bool ne2000_detect_8bit(bus_space_tag_t, bus_space_handle_t,
110 bus_space_tag_t, bus_space_handle_t);
111 #endif
112
113 #define ASIC_BARRIER(asict, asich) \
114 bus_space_barrier((asict), (asich), 0, 0x10, \
115 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
116
117 int
ne2000_attach(struct ne2000_softc * nsc,uint8_t * myea)118 ne2000_attach(struct ne2000_softc *nsc, uint8_t *myea)
119 {
120 struct dp8390_softc *dsc = &nsc->sc_dp8390;
121 bus_space_tag_t nict = dsc->sc_regt;
122 bus_space_handle_t nich = dsc->sc_regh;
123 bus_space_tag_t asict = nsc->sc_asict;
124 bus_space_handle_t asich = nsc->sc_asich;
125 uint8_t romdata[16];
126 int memstart, memsize, i, useword;
127
128 /*
129 * Detect it again unless caller specified it; this gives us
130 * the memory size.
131 */
132 if (nsc->sc_type == NE2000_TYPE_UNKNOWN)
133 nsc->sc_type = ne2000_detect(nict, nich, asict, asich);
134
135 /*
136 * 8k of memory for NE1000, 16k for NE2000 and 24k for the
137 * card uses DL10019.
138 */
139 switch (nsc->sc_type) {
140 case NE2000_TYPE_UNKNOWN:
141 default:
142 aprint_error_dev(dsc->sc_dev, "where did the card go?\n");
143 return 1;
144 case NE2000_TYPE_NE1000:
145 memstart = 8192;
146 memsize = 8192;
147 useword = 0;
148 break;
149 case NE2000_TYPE_NE2000:
150 case NE2000_TYPE_AX88190: /* XXX really? */
151 case NE2000_TYPE_AX88790:
152 case NE2000_TYPE_AX88796:
153 #if NRTL80X9 > 0
154 case NE2000_TYPE_RTL8019:
155 #endif
156 memstart = 16384;
157 memsize = 16384;
158 useword = 1;
159
160 if (
161 #ifdef NE2000_DETECT_8BIT
162 ne2000_detect_8bit(nict, nich, asict, asich) ||
163 #endif
164 (nsc->sc_quirk & NE2000_QUIRK_8BIT) != 0) {
165 /* in 8 bit mode, only 8KB memory can be used */
166 memsize = 8192;
167 useword = 0;
168 }
169 break;
170 case NE2000_TYPE_DL10019:
171 case NE2000_TYPE_DL10022:
172 memstart = 8192 * 3;
173 memsize = 8192 * 3;
174 useword = 1;
175 break;
176 }
177
178 nsc->sc_useword = useword;
179 #if NRTL80X9 > 0
180 if (nsc->sc_type == NE2000_TYPE_RTL8019) {
181 dsc->init_card = rtl80x9_init_card;
182 dsc->sc_media_init = rtl80x9_media_init;
183 dsc->sc_mediachange = rtl80x9_mediachange;
184 dsc->sc_mediastatus = rtl80x9_mediastatus;
185 }
186 #endif
187
188 dsc->cr_proto = ED_CR_RD2;
189 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
190 nsc->sc_type == NE2000_TYPE_AX88790) {
191 dsc->rcr_proto = ED_RCR_INTT;
192 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
193 } else
194 dsc->rcr_proto = 0;
195
196 /*
197 * DCR gets:
198 *
199 * FIFO threshold to 8, No auto-init Remote DMA,
200 * byte order=80x86.
201 *
202 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA.
203 */
204 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
205
206 dsc->test_mem = ne2000_test_mem;
207 dsc->ring_copy = ne2000_ring_copy;
208 dsc->write_mbuf = ne2000_write_mbuf;
209 dsc->read_hdr = ne2000_read_hdr;
210
211 /* Registers are linear. */
212 for (i = 0; i < 16; i++)
213 dsc->sc_reg_map[i] = i;
214
215 /*
216 * NIC memory doens't start at zero on an NE board.
217 * The start address is tied to the bus width.
218 */
219 #ifdef GWETHER
220 {
221 int x;
222 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE],
223 tbuf[ED_PAGE_SIZE];
224
225 memstart = 0;
226 for (i = 0; i < ED_PAGE_SIZE; i++)
227 pbuf0[i] = 0;
228
229 /* Search for the start of RAM. */
230 for (x = 1; x < 256; x++) {
231 ne2000_writemem(nict, nich, asict, asich, pbuf0,
232 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
233 ne2000_readmem(nict, nich, asict, asich,
234 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
235 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
236 for (i = 0; i < ED_PAGE_SIZE; i++)
237 pbuf[i] = 255 - x;
238 ne2000_writemem(nict, nich, asict, asich,
239 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
240 useword, 0);
241 ne2000_readmem(nict, nich, asict, asich,
242 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
243 useword);
244 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
245 memstart = x << ED_PAGE_SHIFT;
246 memsize = ED_PAGE_SIZE;
247 break;
248 }
249 }
250 }
251
252 if (memstart == 0) {
253 aprint_error_dev(dsc->sc_dev,
254 "cannot find start of RAM\n");
255 return 1;
256 }
257
258 /* Search for the end of RAM. */
259 for (++x; x < 256; x++) {
260 ne2000_writemem(nict, nich, asict, asich, pbuf0,
261 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
262 ne2000_readmem(nict, nich, asict, asich,
263 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
264 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
265 for (i = 0; i < ED_PAGE_SIZE; i++)
266 pbuf[i] = 255 - x;
267 ne2000_writemem(nict, nich, asict, asich,
268 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
269 useword, 0);
270 ne2000_readmem(nict, nich, asict, asich,
271 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
272 useword);
273 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
274 memsize += ED_PAGE_SIZE;
275 else
276 break;
277 } else
278 break;
279 }
280
281 printf("%s: RAM start 0x%x, size %d\n",
282 device_xname(dsc->sc_dev), memstart, memsize);
283 }
284 #endif /* GWETHER */
285 dsc->mem_start = memstart;
286
287 dsc->mem_size = memsize;
288
289 if (myea == NULL) {
290 /* Read the station address. */
291 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
292 nsc->sc_type == NE2000_TYPE_AX88790 ||
293 nsc->sc_type == NE2000_TYPE_AX88796) {
294 /* Select page 0 registers. */
295 NIC_BARRIER(nict, nich);
296 bus_space_write_1(nict, nich, ED_P0_CR,
297 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
298 NIC_BARRIER(nict, nich);
299 /* Select word transfer. */
300 bus_space_write_1(nict, nich, ED_P0_DCR,
301 useword ? ED_DCR_WTS : 0);
302 NIC_BARRIER(nict, nich);
303 ne2000_readmem(nict, nich, asict, asich,
304 AX88190_NODEID_OFFSET, dsc->sc_enaddr,
305 ETHER_ADDR_LEN, useword);
306 } else {
307 bool ne1000 = (nsc->sc_type == NE2000_TYPE_NE1000);
308
309 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
310 sizeof(romdata), useword);
311 for (i = 0; i < ETHER_ADDR_LEN; i++)
312 dsc->sc_enaddr[i] =
313 romdata[i * (ne1000 ? 1 : 2)];
314 }
315 } else
316 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr));
317
318 /* Clear any pending interrupts that might have occurred above. */
319 NIC_BARRIER(nict, nich);
320 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
321 NIC_BARRIER(nict, nich);
322
323 if (dsc->sc_media_init == NULL)
324 dsc->sc_media_init = dp8390_media_init;
325
326 if (dp8390_config(dsc)) {
327 aprint_error_dev(dsc->sc_dev, "setup failed\n");
328 return 1;
329 }
330
331 return 0;
332 }
333
334 /*
335 * Detect an NE-2000 or compatible. Returns a model code.
336 */
337 int
ne2000_detect(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich)338 ne2000_detect(bus_space_tag_t nict, bus_space_handle_t nich,
339 bus_space_tag_t asict, bus_space_handle_t asich)
340 {
341 const uint8_t test_pattern[32] = "THIS is A memory TEST pattern";
342 uint8_t test_buffer[32], tmp;
343 int i, rv = NE2000_TYPE_UNKNOWN;
344 int useword;
345
346 /* Reset the board. */
347 #ifdef GWETHER
348 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0);
349 ASIC_BARRIER(asict, asich);
350 delay(200);
351 #endif /* GWETHER */
352 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
353 ASIC_BARRIER(asict, asich);
354 delay(10000);
355
356 /*
357 * I don't know if this is necessary; probably cruft leftover from
358 * Clarkson packet driver code. Doesn't do a thing on the boards I've
359 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
360 * non-invasive...but some boards don't seem to reset and I don't have
361 * complete documentation on what the 'right' thing to do is...so we do
362 * the invasive thing for now. Yuck.]
363 */
364 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
365 ASIC_BARRIER(asict, asich);
366 delay(5000);
367
368 /*
369 * This is needed because some NE clones apparently don't reset the
370 * NIC properly (or the NIC chip doesn't reset fully on power-up).
371 * XXX - this makes the probe invasive! Done against my better
372 * judgement. -DLG
373 */
374 bus_space_write_1(nict, nich, ED_P0_CR,
375 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
376 NIC_BARRIER(nict, nich);
377
378 delay(5000);
379
380 /*
381 * Generic probe routine for testing for the existence of a DS8390.
382 * Must be performed after the NIC has just been reset. This
383 * works by looking at certain register values that are guaranteed
384 * to be initialized a certain way after power-up or reset.
385 *
386 * Specifically:
387 *
388 * Register reset bits set bits
389 * -------- ---------- --------
390 * CR TXP, STA RD2, STP
391 * ISR RST
392 * IMR <all>
393 * DCR LAS
394 * TCR LB1, LB0
395 *
396 * We only look at CR and ISR, however, since looking at the others
397 * would require changing register pages, which would be intrusive
398 * if this isn't an 8390.
399 */
400
401 tmp = bus_space_read_1(nict, nich, ED_P0_CR);
402 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
403 (ED_CR_RD2 | ED_CR_STP))
404 goto out;
405
406 tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
407 if ((tmp & ED_ISR_RST) != ED_ISR_RST)
408 goto out;
409
410 bus_space_write_1(nict, nich,
411 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
412 NIC_BARRIER(nict, nich);
413
414 for (i = 0; i < 100; i++) {
415 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) ==
416 ED_ISR_RST) {
417 /* Ack the reset bit. */
418 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST);
419 NIC_BARRIER(nict, nich);
420 break;
421 }
422 delay(100);
423 }
424
425 #if 0
426 /* XXX */
427 if (i == 100)
428 goto out;
429 #endif
430
431 /*
432 * Test the ability to read and write to the NIC memory. This has
433 * the side effect of determining if this is an NE1000 or an NE2000.
434 */
435
436 /*
437 * This prevents packets from being stored in the NIC memory when
438 * the readmem routine turns on the start bit in the CR.
439 */
440 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON);
441 NIC_BARRIER(nict, nich);
442
443 /* Temporarily initialize DCR for byte operations. */
444 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
445
446 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
447 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
448
449 /*
450 * Write a test pattern in byte mode. If this fails, then there
451 * probably isn't any memory at 8k - which likely means that the
452 * board is an NE2000.
453 */
454 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192,
455 sizeof(test_pattern), 0, 1);
456 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer,
457 sizeof(test_buffer), 0);
458
459 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
460 /* We're an NE1000. */
461 rv = NE2000_TYPE_NE1000;
462 goto out;
463 }
464
465 /* not an NE1000 - try NE2000 */
466
467 /* try 16 bit mode first */
468 useword = 1;
469
470 #ifdef NE2000_DETECT_8BIT
471 /*
472 * Check bus type in EEPROM first because some NE2000 compatible wedges
473 * on 16 bit DMA access if the chip is configured in 8 bit mode.
474 */
475 if (ne2000_detect_8bit(nict, nich, asict, asich))
476 useword = 0;
477 #endif
478 again:
479 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS |
480 (useword ? ED_DCR_WTS : 0));
481 bus_space_write_1(nict, nich, ED_P0_PSTART, 16384 >> ED_PAGE_SHIFT);
482 bus_space_write_1(nict, nich, ED_P0_PSTOP,
483 (16384 + (useword ? 16384 : 8192)) >> ED_PAGE_SHIFT);
484
485 /*
486 * Write the test pattern in word mode. If this also fails,
487 * then we don't know what this board is.
488 */
489 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384,
490 sizeof(test_pattern), useword, 1);
491 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer,
492 sizeof(test_buffer), useword);
493
494 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) {
495 if (useword == 1) {
496 /* try 8 bit mode */
497 useword = 0;
498 goto again;
499 }
500 return NE2000_TYPE_UNKNOWN; /* not an NE2000 either */
501 }
502
503 rv = NE2000_TYPE_NE2000;
504
505 #if NRTL80X9 > 0
506 /* Check for a Realtek RTL8019. */
507 if (bus_space_read_1(nict, nich, NERTL_RTL0_8019ID0) == RTL0_8019ID0 &&
508 bus_space_read_1(nict, nich, NERTL_RTL0_8019ID1) == RTL0_8019ID1)
509 rv = NE2000_TYPE_RTL8019;
510 #endif
511
512 out:
513 /* Clear any pending interrupts that might have occurred above. */
514 NIC_BARRIER(nict, nich);
515 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
516
517 return rv;
518 }
519
520 #ifdef NE2000_DETECT_8BIT
521 static bool
ne2000_detect_8bit(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich)522 ne2000_detect_8bit(bus_space_tag_t nict, bus_space_handle_t nich,
523 bus_space_tag_t asict, bus_space_handle_t asich)
524 {
525 bool is8bit;
526 uint8_t romdata[32];
527
528 is8bit = false;
529
530 /* Set DCR for 8 bit DMA. */
531 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
532 /* Read PROM area. */
533 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
534 sizeof(romdata), 0);
535 if (romdata[28] == 'B' && romdata[30] == 'B') {
536 /* 'B' (0x42) in 8 bit mode, 'W' (0x57) in 16 bit mode */
537 is8bit = true;
538 }
539 if (!is8bit) {
540 /* not in 8 bit mode; put back DCR setting for 16 bit DMA */
541 bus_space_write_1(nict, nich, ED_P0_DCR,
542 ED_DCR_FT1 | ED_DCR_LS | ED_DCR_WTS);
543 }
544
545 return is8bit;
546 }
547 #endif
548
549 /*
550 * Write an mbuf chain to the destination NIC memory address using programmed
551 * I/O.
552 */
553 int
ne2000_write_mbuf(struct dp8390_softc * sc,struct mbuf * m,int buf)554 ne2000_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
555 {
556 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
557 bus_space_tag_t nict = sc->sc_regt;
558 bus_space_handle_t nich = sc->sc_regh;
559 bus_space_tag_t asict = nsc->sc_asict;
560 bus_space_handle_t asich = nsc->sc_asich;
561 int savelen, padlen;
562 int maxwait = 100; /* about 120us */
563
564 savelen = m->m_pkthdr.len;
565 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
566 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen;
567 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
568 } else
569 padlen = 0;
570
571
572 /* Select page 0 registers. */
573 NIC_BARRIER(nict, nich);
574 bus_space_write_1(nict, nich, ED_P0_CR,
575 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
576 NIC_BARRIER(nict, nich);
577
578 /* Reset remote DMA complete flag. */
579 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
580 NIC_BARRIER(nict, nich);
581
582 /* Set up DMA byte count. */
583 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen);
584 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8);
585
586 /* Set up destination address in NIC mem. */
587 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
588 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
589
590 /* Set remote DMA write. */
591 NIC_BARRIER(nict, nich);
592 bus_space_write_1(nict, nich,
593 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
594 NIC_BARRIER(nict, nich);
595
596 /*
597 * Transfer the mbuf chain to the NIC memory. NE2000 cards
598 * require that data be transferred as words, and only words,
599 * so that case requires some extra code to patch over odd-length
600 * mbufs.
601 */
602 if (nsc->sc_useword == 0) {
603 /* byte ops are easy. */
604 for (; m != NULL; m = m->m_next) {
605 if (m->m_len) {
606 bus_space_write_multi_1(asict, asich,
607 NE2000_ASIC_DATA, mtod(m, uint8_t *),
608 m->m_len);
609 }
610 }
611 if (padlen) {
612 for(; padlen > 0; padlen--)
613 bus_space_write_1(asict, asich,
614 NE2000_ASIC_DATA, 0);
615 }
616 } else {
617 /* word ops are a bit trickier. */
618 uint8_t *data, savebyte[2];
619 int l, leftover;
620 #ifdef DIAGNOSTIC
621 uint8_t *lim;
622 #endif
623 /* Start out with no leftover data. */
624 leftover = 0;
625 savebyte[0] = savebyte[1] = 0;
626
627 for (; m != NULL; m = m->m_next) {
628 l = m->m_len;
629 if (l == 0)
630 continue;
631 data = mtod(m, uint8_t *);
632 #ifdef DIAGNOSTIC
633 lim = data + l;
634 #endif
635 while (l > 0) {
636 if (leftover) {
637 /*
638 * Data left over (from mbuf or
639 * realignment). Buffer the next
640 * byte, and write it and the
641 * leftover data out.
642 */
643 savebyte[1] = *data++;
644 l--;
645 bus_space_write_stream_2(asict, asich,
646 NE2000_ASIC_DATA,
647 *(uint16_t *)savebyte);
648 leftover = 0;
649 } else if (BUS_SPACE_ALIGNED_POINTER(data,
650 uint16_t) == 0) {
651 /*
652 * Unaligned data; buffer the next
653 * byte.
654 */
655 savebyte[0] = *data++;
656 l--;
657 leftover = 1;
658 } else {
659 /*
660 * Aligned data; output contiguous
661 * words as much as we can, then
662 * buffer the remaining byte, if any.
663 */
664 leftover = l & 1;
665 l &= ~1;
666 bus_space_write_multi_stream_2(asict,
667 asich, NE2000_ASIC_DATA,
668 (uint16_t *)data, l >> 1);
669 data += l;
670 if (leftover)
671 savebyte[0] = *data++;
672 l = 0;
673 }
674 }
675 if (l < 0)
676 panic("ne2000_write_mbuf: negative len");
677 #ifdef DIAGNOSTIC
678 if (data != lim)
679 panic("ne2000_write_mbuf: data != lim");
680 #endif
681 }
682 if (leftover) {
683 savebyte[1] = 0;
684 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
685 *(uint16_t *)savebyte);
686 }
687 if (padlen) {
688 for(; padlen > 1; padlen -= 2)
689 bus_space_write_stream_2(asict, asich,
690 NE2000_ASIC_DATA, 0);
691 }
692 }
693 NIC_BARRIER(nict, nich);
694
695 /* some AX88796 doesn't seem to have remote DMA complete */
696 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE)
697 return savelen;
698
699 /*
700 * Wait for remote DMA to complete. This is necessary because on the
701 * transmit side, data is handled internally by the NIC in bursts, and
702 * we can't start another remote DMA until this one completes. Not
703 * waiting causes really bad things to happen - like the NIC wedging
704 * the bus.
705 */
706 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
707 ED_ISR_RDC) && --maxwait) {
708 (void)bus_space_read_1(nict, nich, ED_P0_CRDA1);
709 (void)bus_space_read_1(nict, nich, ED_P0_CRDA0);
710 NIC_BARRIER(nict, nich);
711 DELAY(1);
712 }
713
714 if (maxwait == 0) {
715 log(LOG_WARNING,
716 "%s: remote transmit DMA failed to complete\n",
717 device_xname(sc->sc_dev));
718 dp8390_reset(sc);
719 }
720
721 return savelen;
722 }
723
724 /*
725 * Given a source and destination address, copy 'amout' of a packet from
726 * the ring buffer into a linear destination buffer. Takes into account
727 * ring-wrap.
728 */
729 int
ne2000_ring_copy(struct dp8390_softc * sc,int src,void * dstv,u_short amount)730 ne2000_ring_copy(struct dp8390_softc *sc, int src, void *dstv, u_short amount)
731 {
732 char *dst = dstv;
733 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
734 bus_space_tag_t nict = sc->sc_regt;
735 bus_space_handle_t nich = sc->sc_regh;
736 bus_space_tag_t asict = nsc->sc_asict;
737 bus_space_handle_t asich = nsc->sc_asich;
738 u_short tmp_amount;
739 int useword = nsc->sc_useword;
740
741 /* Does copy wrap to lower addr in ring buffer? */
742 if (src + amount > sc->mem_end) {
743 tmp_amount = sc->mem_end - src;
744
745 /* Copy amount up to end of NIC memory. */
746 ne2000_readmem(nict, nich, asict, asich, src,
747 (uint8_t *)dst, tmp_amount, useword);
748
749 amount -= tmp_amount;
750 src = sc->mem_ring;
751 dst += tmp_amount;
752 }
753
754 ne2000_readmem(nict, nich, asict, asich, src, (uint8_t *)dst,
755 amount, useword);
756
757 return src + amount;
758 }
759
760 void
ne2000_read_hdr(struct dp8390_softc * sc,int buf,struct dp8390_ring * hdr)761 ne2000_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr)
762 {
763 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
764
765 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
766 buf, (uint8_t *)hdr, sizeof(struct dp8390_ring),
767 nsc->sc_useword);
768 #if BYTE_ORDER == BIG_ENDIAN
769 hdr->count = bswap16(hdr->count);
770 #endif
771 }
772
773 int
ne2000_test_mem(struct dp8390_softc * sc)774 ne2000_test_mem(struct dp8390_softc *sc)
775 {
776
777 /* Noop. */
778 return 0;
779 }
780
781 /*
782 * Given a NIC memory source address and a host memory destination address,
783 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is
784 * rounded up to a word - ok as long as mbufs are word sized.
785 */
786 void
ne2000_readmem(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich,int src,uint8_t * dst,size_t amount,int useword)787 ne2000_readmem(bus_space_tag_t nict, bus_space_handle_t nich,
788 bus_space_tag_t asict, bus_space_handle_t asich,
789 int src, uint8_t *dst, size_t amount, int useword)
790 {
791
792 /* Select page 0 registers. */
793 NIC_BARRIER(nict, nich);
794 bus_space_write_1(nict, nich, ED_P0_CR,
795 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
796 NIC_BARRIER(nict, nich);
797
798 /* Round up to a word. */
799 amount = roundup2(amount, sizeof(uint16_t));
800
801 /* Set up DMA byte count. */
802 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount);
803 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8);
804
805 /* Set up source address in NIC mem. */
806 bus_space_write_1(nict, nich, ED_P0_RSAR0, src);
807 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8);
808
809 NIC_BARRIER(nict, nich);
810 bus_space_write_1(nict, nich, ED_P0_CR,
811 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
812
813 ASIC_BARRIER(asict, asich);
814 if (useword)
815 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
816 (uint16_t *)dst, amount >> 1);
817 else
818 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
819 dst, amount);
820 }
821
822 /*
823 * Stripped down routine for writing a linear buffer to NIC memory. Only
824 * used in the probe routine to test the memory. 'len' must be even.
825 */
826 void
ne2000_writemem(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich,const uint8_t * src,int dst,size_t len,int useword,int quiet)827 ne2000_writemem(bus_space_tag_t nict, bus_space_handle_t nich,
828 bus_space_tag_t asict, bus_space_handle_t asich,
829 const uint8_t *src, int dst, size_t len, int useword, int quiet)
830 {
831 int maxwait = 100; /* about 120us */
832
833 /* Select page 0 registers. */
834 NIC_BARRIER(nict, nich);
835 bus_space_write_1(nict, nich, ED_P0_CR,
836 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
837 NIC_BARRIER(nict, nich);
838
839 /* Reset remote DMA complete flag. */
840 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
841 NIC_BARRIER(nict, nich);
842
843 /* Set up DMA byte count. */
844 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
845 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
846
847 /* Set up destination address in NIC mem. */
848 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst);
849 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8);
850
851 /* Set remote DMA write. */
852 NIC_BARRIER(nict, nich);
853 bus_space_write_1(nict, nich, ED_P0_CR,
854 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
855 NIC_BARRIER(nict, nich);
856
857 ASIC_BARRIER(asict, asich);
858 if (useword)
859 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
860 (const uint16_t *)src, len >> 1);
861 else
862 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA,
863 src, len);
864 ASIC_BARRIER(asict, asich);
865
866 /*
867 * Wait for remote DMA to complete. This is necessary because on the
868 * transmit side, data is handled internally by the NIC in bursts, and
869 * we can't start another remote DMA until this one completes. Not
870 * waiting causes really bad things to happen - like the NIC wedging
871 * the bus.
872 */
873 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
874 ED_ISR_RDC) && --maxwait)
875 DELAY(1);
876
877 if (!quiet && maxwait == 0)
878 printf("ne2000_writemem: failed to complete\n");
879 }
880
881 int
ne2000_detach(struct ne2000_softc * sc,int flags)882 ne2000_detach(struct ne2000_softc *sc, int flags)
883 {
884
885 return dp8390_detach(&sc->sc_dp8390, flags);
886 }
887
888 #ifdef IPKDB_NE
889 /*
890 * This code is essentially the same as ne2000_attach above.
891 */
892 int
ne2000_ipkdb_attach(struct ipkdb_if * kip)893 ne2000_ipkdb_attach(struct ipkdb_if *kip)
894 {
895 struct ne2000_softc *np = kip->port;
896 struct dp8390_softc *dp = &np->sc_dp8390;
897 bus_space_tag_t nict = dp->sc_regt;
898 bus_space_handle_t nich = dp->sc_regh;
899 bus_space_tag_t asict = np->sc_asict;
900 bus_space_handle_t asich = np->sc_asich;
901 int i, useword;
902
903 #ifdef GWETHER
904 /* Not supported (yet?) */
905 return -1;
906 #endif
907
908 if (np->sc_type == NE2000_TYPE_UNKNOWN)
909 np->sc_type = ne2000_detect(nict, nich, asict, asich);
910 if (np->sc_type == NE2000_TYPE_UNKNOWN)
911 return -1;
912
913 switch (np->sc_type) {
914 case NE2000_TYPE_NE1000:
915 dp->mem_start = 8192;
916 dp->mem_size = 8192;
917 useword = 0;
918 kip->name = "ne1000";
919 break;
920 case NE2000_TYPE_NE2000:
921 case NE2000_TYPE_AX88190:
922 case NE2000_TYPE_AX88790:
923 case NE2000_TYPE_AX88796:
924 #if NRTL80X9 > 0
925 case NE2000_TYPE_RTL8019:
926 #endif
927 dp->mem_start = 16384;
928 dp->mem_size = 16384;
929 useword = 1;
930 if (
931 #ifdef NE2000_DETECT_8BIT
932 ne2000_detect_8bit(nict, nich, asict, asich) ||
933 #endif
934 (np->sc_quirk & NE2000_QUIRK_8BIT) != 0) {
935 /* in 8 bit mode, only 8KB memory can be used */
936 dp->mem_size = 8192;
937 useword = 0;
938 }
939 kip->name =
940 (np->sc_type == NE2000_TYPE_AX88190 ||
941 np->sc_type == NE2000_TYPE_AX88790) ?
942 "ax88190" : "ne2000";
943 break;
944 case NE2000_TYPE_DL10019:
945 case NE2000_TYPE_DL10022:
946 dp->mem_start = 8192 * 3;
947 dp->mem_size = 8192 * 3;
948 useword = 1;
949 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ?
950 "dl10022" : "dl10019";
951 break;
952 default:
953 return -1;
954 break;
955 }
956
957 np->sc_useword = useword;
958 #if NRTL80X9 > 0
959 if (np->sc_type == NE2000_TYPE_RTL8019) {
960 dp->init_card = rtl80x9_init_card;
961 dp->sc_media_init = rtl80x9_media_init;
962 dp->sc_mediachange = rtl80x9_mediachange;
963 dp->sc_mediastatus = rtl80x9_mediastatus;
964 }
965 #endif
966
967 dp->cr_proto = ED_CR_RD2;
968 if (np->sc_type == NE2000_TYPE_AX88190 ||
969 np->sc_type == NE2000_TYPE_AX88790) {
970 dp->rcr_proto = ED_RCR_INTT;
971 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
972 } else
973 dp->rcr_proto = 0;
974 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
975
976 dp->test_mem = ne2000_test_mem;
977 dp->ring_copy = ne2000_ring_copy;
978 dp->write_mbuf = ne2000_write_mbuf;
979 dp->read_hdr = ne2000_read_hdr;
980
981 for (i = 0; i < 16; i++)
982 dp->sc_reg_map[i] = i;
983
984 if (dp8390_ipkdb_attach(kip))
985 return -1;
986
987 if (!(kip->flags & IPKDB_MYHW)) {
988 char romdata[16];
989
990 /* Read the station address. */
991 if (np->sc_type == NE2000_TYPE_AX88190 ||
992 np->sc_type == NE2000_TYPE_AX88790 ||
993 np->sc_type == NE2000_TYPE_AX88796) {
994 /* Select page 0 registers. */
995 NIC_BARRIER(nict, nich);
996 bus_space_write_1(nict, nich, ED_P0_CR,
997 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
998 NIC_BARRIER(nict, nich);
999 /* Select word transfer */
1000 bus_space_write_1(nict, nich, ED_P0_DCR,
1001 useword ? ED_DCR_WTS : 0);
1002 ne2000_readmem(nict, nich, asict, asich,
1003 AX88190_NODEID_OFFSET, kip->myenetaddr,
1004 ETHER_ADDR_LEN, useword);
1005 } else {
1006 bool ne1000 = (np->sc_type == NE2000_TYPE_NE1000);
1007
1008 ne2000_readmem(nict, nich, asict, asich,
1009 0, romdata, sizeof romdata, useword);
1010 for (i = 0; i < ETHER_ADDR_LEN; i++)
1011 kip->myenetaddr[i] =
1012 romdata[i * (ne1000 ? 1 : 2)];
1013 }
1014 kip->flags |= IPKDB_MYHW;
1015
1016 }
1017 dp8390_stop(dp);
1018
1019 return 0;
1020 }
1021 #endif
1022
1023 bool
ne2000_suspend(device_t self,const pmf_qual_t * qual)1024 ne2000_suspend(device_t self, const pmf_qual_t *qual)
1025 {
1026 struct ne2000_softc *sc = device_private(self);
1027 struct dp8390_softc *dsc = &sc->sc_dp8390;
1028 int s;
1029
1030 s = splnet();
1031
1032 dp8390_stop(dsc);
1033 dp8390_disable(dsc);
1034
1035 splx(s);
1036 return true;
1037 }
1038
1039 bool
ne2000_resume(device_t self,const pmf_qual_t * qual)1040 ne2000_resume(device_t self, const pmf_qual_t *qual)
1041 {
1042 struct ne2000_softc *sc = device_private(self);
1043 struct dp8390_softc *dsc = &sc->sc_dp8390;
1044 struct ifnet *ifp = &dsc->sc_ec.ec_if;
1045 int s;
1046
1047 s = splnet();
1048
1049 if (ifp->if_flags & IFF_UP) {
1050 if (dp8390_enable(dsc) == 0)
1051 dp8390_init(dsc);
1052 }
1053
1054 splx(s);
1055 return true;
1056 }
1057