1 /* $NetBSD: ne2000.c,v 1.77 2021/08/20 20:25:28 andvar Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
35 * adapters.
36 *
37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
38 *
39 * Copyright (C) 1993, David Greenman. This software may be used, modified,
40 * copied, distributed, and sold, in both source and binary form provided that
41 * the above copyright and these terms are retained. Under no circumstances is
42 * the author responsible for the proper functioning of this software, nor does
43 * the author assume any responsibility for damages incurred with its use.
44 */
45
46 /*
47 * Common code shared by all NE2000-compatible Ethernet interfaces.
48 */
49
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.77 2021/08/20 20:25:28 andvar Exp $");
52
53 #include "rtl80x9.h"
54
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/device.h>
58 #include <sys/socket.h>
59 #include <sys/mbuf.h>
60 #include <sys/syslog.h>
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_types.h>
65 #include <net/if_media.h>
66
67 #include <net/if_ether.h>
68
69 #include <sys/bswap.h>
70 #include <sys/bus.h>
71
72 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
73 #define bus_space_write_stream_2 bus_space_write_2
74 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
75 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
76 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
77
78 #include <dev/ic/dp8390reg.h>
79 #include <dev/ic/dp8390var.h>
80
81 #include <dev/ic/ne2000reg.h>
82 #include <dev/ic/ne2000var.h>
83
84 #include <dev/ic/rtl80x9reg.h>
85 #include <dev/ic/rtl80x9var.h>
86
87 #include <dev/ic/ax88190reg.h>
88
89 static int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int);
90 static int ne2000_ring_copy(struct dp8390_softc *, int, void *, u_short);
91 static void ne2000_read_hdr(struct dp8390_softc *, int,
92 struct dp8390_ring *);
93 static int ne2000_test_mem(struct dp8390_softc *);
94
95 static void ne2000_writemem(bus_space_tag_t, bus_space_handle_t,
96 bus_space_tag_t, bus_space_handle_t, const uint8_t *, int,
97 size_t, int, int);
98 static void ne2000_readmem(bus_space_tag_t, bus_space_handle_t,
99 bus_space_tag_t, bus_space_handle_t, int, uint8_t *,
100 size_t, int);
101
102 #ifdef NE2000_DETECT_8BIT
103 static bool ne2000_detect_8bit(bus_space_tag_t, bus_space_handle_t,
104 bus_space_tag_t, bus_space_handle_t);
105 #endif
106
107 #define ASIC_BARRIER(asict, asich) \
108 bus_space_barrier((asict), (asich), 0, 0x10, \
109 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
110
111 int
ne2000_attach(struct ne2000_softc * nsc,uint8_t * myea)112 ne2000_attach(struct ne2000_softc *nsc, uint8_t *myea)
113 {
114 struct dp8390_softc *dsc = &nsc->sc_dp8390;
115 bus_space_tag_t nict = dsc->sc_regt;
116 bus_space_handle_t nich = dsc->sc_regh;
117 bus_space_tag_t asict = nsc->sc_asict;
118 bus_space_handle_t asich = nsc->sc_asich;
119 uint8_t romdata[16];
120 int memstart, memsize, i, useword;
121
122 /*
123 * Detect it again unless caller specified it; this gives us
124 * the memory size.
125 */
126 if (nsc->sc_type == NE2000_TYPE_UNKNOWN)
127 nsc->sc_type = ne2000_detect(nict, nich, asict, asich);
128
129 /*
130 * 8k of memory for NE1000, 16k for NE2000 and 24k for the
131 * card uses DL10019.
132 */
133 switch (nsc->sc_type) {
134 case NE2000_TYPE_UNKNOWN:
135 default:
136 aprint_error_dev(dsc->sc_dev, "where did the card go?\n");
137 return 1;
138 case NE2000_TYPE_NE1000:
139 memstart = 8192;
140 memsize = 8192;
141 useword = 0;
142 break;
143 case NE2000_TYPE_NE2000:
144 case NE2000_TYPE_AX88190: /* XXX really? */
145 case NE2000_TYPE_AX88790:
146 case NE2000_TYPE_AX88796:
147 #if NRTL80X9 > 0
148 case NE2000_TYPE_RTL8019:
149 #endif
150 memstart = 16384;
151 memsize = 16384;
152 useword = 1;
153
154 if (
155 #ifdef NE2000_DETECT_8BIT
156 ne2000_detect_8bit(nict, nich, asict, asich) ||
157 #endif
158 (nsc->sc_quirk & NE2000_QUIRK_8BIT) != 0) {
159 /* in 8 bit mode, only 8KB memory can be used */
160 memsize = 8192;
161 useword = 0;
162 }
163 break;
164 case NE2000_TYPE_DL10019:
165 case NE2000_TYPE_DL10022:
166 memstart = 8192 * 3;
167 memsize = 8192 * 3;
168 useword = 1;
169 break;
170 }
171
172 nsc->sc_useword = useword;
173 #if NRTL80X9 > 0
174 if (nsc->sc_type == NE2000_TYPE_RTL8019) {
175 dsc->init_card = rtl80x9_init_card;
176 dsc->sc_media_init = rtl80x9_media_init;
177 dsc->sc_mediachange = rtl80x9_mediachange;
178 dsc->sc_mediastatus = rtl80x9_mediastatus;
179 }
180 #endif
181
182 dsc->cr_proto = ED_CR_RD2;
183 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
184 nsc->sc_type == NE2000_TYPE_AX88790) {
185 dsc->rcr_proto = ED_RCR_INTT;
186 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
187 } else
188 dsc->rcr_proto = 0;
189
190 /*
191 * DCR gets:
192 *
193 * FIFO threshold to 8, No auto-init Remote DMA,
194 * byte order=80x86.
195 *
196 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA.
197 */
198 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
199
200 dsc->test_mem = ne2000_test_mem;
201 dsc->ring_copy = ne2000_ring_copy;
202 dsc->write_mbuf = ne2000_write_mbuf;
203 dsc->read_hdr = ne2000_read_hdr;
204
205 /* Registers are linear. */
206 for (i = 0; i < 16; i++)
207 dsc->sc_reg_map[i] = i;
208
209 /*
210 * NIC memory doesn't start at zero on an NE board.
211 * The start address is tied to the bus width.
212 */
213 #ifdef GWETHER
214 {
215 int x;
216 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE],
217 tbuf[ED_PAGE_SIZE];
218
219 memstart = 0;
220 for (i = 0; i < ED_PAGE_SIZE; i++)
221 pbuf0[i] = 0;
222
223 /* Search for the start of RAM. */
224 for (x = 1; x < 256; x++) {
225 ne2000_writemem(nict, nich, asict, asich, pbuf0,
226 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
227 ne2000_readmem(nict, nich, asict, asich,
228 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
229 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
230 for (i = 0; i < ED_PAGE_SIZE; i++)
231 pbuf[i] = 255 - x;
232 ne2000_writemem(nict, nich, asict, asich,
233 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
234 useword, 0);
235 ne2000_readmem(nict, nich, asict, asich,
236 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
237 useword);
238 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
239 memstart = x << ED_PAGE_SHIFT;
240 memsize = ED_PAGE_SIZE;
241 break;
242 }
243 }
244 }
245
246 if (memstart == 0) {
247 aprint_error_dev(dsc->sc_dev,
248 "cannot find start of RAM\n");
249 return 1;
250 }
251
252 /* Search for the end of RAM. */
253 for (++x; x < 256; x++) {
254 ne2000_writemem(nict, nich, asict, asich, pbuf0,
255 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
256 ne2000_readmem(nict, nich, asict, asich,
257 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
258 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
259 for (i = 0; i < ED_PAGE_SIZE; i++)
260 pbuf[i] = 255 - x;
261 ne2000_writemem(nict, nich, asict, asich,
262 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
263 useword, 0);
264 ne2000_readmem(nict, nich, asict, asich,
265 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
266 useword);
267 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
268 memsize += ED_PAGE_SIZE;
269 else
270 break;
271 } else
272 break;
273 }
274
275 printf("%s: RAM start 0x%x, size %d\n",
276 device_xname(dsc->sc_dev), memstart, memsize);
277 }
278 #endif /* GWETHER */
279 dsc->mem_start = memstart;
280
281 dsc->mem_size = memsize;
282
283 if (myea == NULL) {
284 /* Read the station address. */
285 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
286 nsc->sc_type == NE2000_TYPE_AX88790 ||
287 nsc->sc_type == NE2000_TYPE_AX88796) {
288 /* Select page 0 registers. */
289 NIC_BARRIER(nict, nich);
290 bus_space_write_1(nict, nich, ED_P0_CR,
291 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
292 NIC_BARRIER(nict, nich);
293 /* Select word transfer. */
294 bus_space_write_1(nict, nich, ED_P0_DCR,
295 useword ? ED_DCR_WTS : 0);
296 NIC_BARRIER(nict, nich);
297 ne2000_readmem(nict, nich, asict, asich,
298 AX88190_NODEID_OFFSET, dsc->sc_enaddr,
299 ETHER_ADDR_LEN, useword);
300 } else {
301 bool ne1000 = (nsc->sc_type == NE2000_TYPE_NE1000);
302
303 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
304 sizeof(romdata), useword);
305 for (i = 0; i < ETHER_ADDR_LEN; i++)
306 dsc->sc_enaddr[i] =
307 romdata[i * (ne1000 ? 1 : 2)];
308 }
309 } else
310 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr));
311
312 /* Clear any pending interrupts that might have occurred above. */
313 NIC_BARRIER(nict, nich);
314 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
315 NIC_BARRIER(nict, nich);
316
317 if (dsc->sc_media_init == NULL)
318 dsc->sc_media_init = dp8390_media_init;
319
320 if (dp8390_config(dsc)) {
321 aprint_error_dev(dsc->sc_dev, "setup failed\n");
322 return 1;
323 }
324
325 return 0;
326 }
327
328 /*
329 * Detect an NE-2000 or compatible. Returns a model code.
330 */
331 int
ne2000_detect(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich)332 ne2000_detect(bus_space_tag_t nict, bus_space_handle_t nich,
333 bus_space_tag_t asict, bus_space_handle_t asich)
334 {
335 const uint8_t test_pattern[32] = "THIS is A memory TEST pattern";
336 uint8_t test_buffer[32], tmp;
337 int i, rv = NE2000_TYPE_UNKNOWN;
338 int useword;
339
340 /* Reset the board. */
341 #ifdef GWETHER
342 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0);
343 ASIC_BARRIER(asict, asich);
344 delay(200);
345 #endif /* GWETHER */
346 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
347 ASIC_BARRIER(asict, asich);
348 delay(10000);
349
350 /*
351 * I don't know if this is necessary; probably cruft leftover from
352 * Clarkson packet driver code. Doesn't do a thing on the boards I've
353 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
354 * non-invasive...but some boards don't seem to reset and I don't have
355 * complete documentation on what the 'right' thing to do is...so we do
356 * the invasive thing for now. Yuck.]
357 */
358 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
359 ASIC_BARRIER(asict, asich);
360 delay(5000);
361
362 /*
363 * This is needed because some NE clones apparently don't reset the
364 * NIC properly (or the NIC chip doesn't reset fully on power-up).
365 * XXX - this makes the probe invasive! Done against my better
366 * judgement. -DLG
367 */
368 bus_space_write_1(nict, nich, ED_P0_CR,
369 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
370 NIC_BARRIER(nict, nich);
371
372 delay(5000);
373
374 /*
375 * Generic probe routine for testing for the existence of a DS8390.
376 * Must be performed after the NIC has just been reset. This
377 * works by looking at certain register values that are guaranteed
378 * to be initialized a certain way after power-up or reset.
379 *
380 * Specifically:
381 *
382 * Register reset bits set bits
383 * -------- ---------- --------
384 * CR TXP, STA RD2, STP
385 * ISR RST
386 * IMR <all>
387 * DCR LAS
388 * TCR LB1, LB0
389 *
390 * We only look at CR and ISR, however, since looking at the others
391 * would require changing register pages, which would be intrusive
392 * if this isn't an 8390.
393 */
394
395 tmp = bus_space_read_1(nict, nich, ED_P0_CR);
396 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
397 (ED_CR_RD2 | ED_CR_STP))
398 goto out;
399
400 tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
401 if ((tmp & ED_ISR_RST) != ED_ISR_RST)
402 goto out;
403
404 bus_space_write_1(nict, nich,
405 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
406 NIC_BARRIER(nict, nich);
407
408 for (i = 0; i < 100; i++) {
409 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) ==
410 ED_ISR_RST) {
411 /* Ack the reset bit. */
412 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST);
413 NIC_BARRIER(nict, nich);
414 break;
415 }
416 delay(100);
417 }
418
419 #if 0
420 /* XXX */
421 if (i == 100)
422 goto out;
423 #endif
424
425 /*
426 * Test the ability to read and write to the NIC memory. This has
427 * the side effect of determining if this is an NE1000 or an NE2000.
428 */
429
430 /*
431 * This prevents packets from being stored in the NIC memory when
432 * the readmem routine turns on the start bit in the CR.
433 */
434 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON);
435 NIC_BARRIER(nict, nich);
436
437 /* Temporarily initialize DCR for byte operations. */
438 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
439
440 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
441 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
442
443 /*
444 * Write a test pattern in byte mode. If this fails, then there
445 * probably isn't any memory at 8k - which likely means that the
446 * board is an NE2000.
447 */
448 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192,
449 sizeof(test_pattern), 0, 1);
450 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer,
451 sizeof(test_buffer), 0);
452
453 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
454 /* We're an NE1000. */
455 rv = NE2000_TYPE_NE1000;
456 goto out;
457 }
458
459 /* not an NE1000 - try NE2000 */
460
461 /* try 16 bit mode first */
462 useword = 1;
463
464 #ifdef NE2000_DETECT_8BIT
465 /*
466 * Check bus type in EEPROM first because some NE2000 compatible wedges
467 * on 16 bit DMA access if the chip is configured in 8 bit mode.
468 */
469 if (ne2000_detect_8bit(nict, nich, asict, asich))
470 useword = 0;
471 #endif
472 again:
473 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS |
474 (useword ? ED_DCR_WTS : 0));
475 bus_space_write_1(nict, nich, ED_P0_PSTART, 16384 >> ED_PAGE_SHIFT);
476 bus_space_write_1(nict, nich, ED_P0_PSTOP,
477 (16384 + (useword ? 16384 : 8192)) >> ED_PAGE_SHIFT);
478
479 /*
480 * Write the test pattern in word mode. If this also fails,
481 * then we don't know what this board is.
482 */
483 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384,
484 sizeof(test_pattern), useword, 1);
485 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer,
486 sizeof(test_buffer), useword);
487
488 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) {
489 if (useword == 1) {
490 /* try 8 bit mode */
491 useword = 0;
492 goto again;
493 }
494 return NE2000_TYPE_UNKNOWN; /* not an NE2000 either */
495 }
496
497 rv = NE2000_TYPE_NE2000;
498
499 #if NRTL80X9 > 0
500 /* Check for a Realtek RTL8019. */
501 if (bus_space_read_1(nict, nich, NERTL_RTL0_8019ID0) == RTL0_8019ID0 &&
502 bus_space_read_1(nict, nich, NERTL_RTL0_8019ID1) == RTL0_8019ID1)
503 rv = NE2000_TYPE_RTL8019;
504 #endif
505
506 out:
507 /* Clear any pending interrupts that might have occurred above. */
508 NIC_BARRIER(nict, nich);
509 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
510
511 return rv;
512 }
513
514 #ifdef NE2000_DETECT_8BIT
515 static bool
ne2000_detect_8bit(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich)516 ne2000_detect_8bit(bus_space_tag_t nict, bus_space_handle_t nich,
517 bus_space_tag_t asict, bus_space_handle_t asich)
518 {
519 bool is8bit;
520 uint8_t romdata[32];
521
522 is8bit = false;
523
524 /* Set DCR for 8 bit DMA. */
525 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
526 /* Read PROM area. */
527 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
528 sizeof(romdata), 0);
529 if (romdata[28] == 'B' && romdata[30] == 'B') {
530 /* 'B' (0x42) in 8 bit mode, 'W' (0x57) in 16 bit mode */
531 is8bit = true;
532 }
533 if (!is8bit) {
534 /* not in 8 bit mode; put back DCR setting for 16 bit DMA */
535 bus_space_write_1(nict, nich, ED_P0_DCR,
536 ED_DCR_FT1 | ED_DCR_LS | ED_DCR_WTS);
537 }
538
539 return is8bit;
540 }
541 #endif
542
543 /*
544 * Write an mbuf chain to the destination NIC memory address using programmed
545 * I/O.
546 */
547 int
ne2000_write_mbuf(struct dp8390_softc * sc,struct mbuf * m,int buf)548 ne2000_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
549 {
550 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
551 bus_space_tag_t nict = sc->sc_regt;
552 bus_space_handle_t nich = sc->sc_regh;
553 bus_space_tag_t asict = nsc->sc_asict;
554 bus_space_handle_t asich = nsc->sc_asich;
555 int savelen, padlen;
556 int maxwait = 100; /* about 120us */
557
558 savelen = m->m_pkthdr.len;
559 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
560 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen;
561 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
562 } else
563 padlen = 0;
564
565
566 /* Select page 0 registers. */
567 NIC_BARRIER(nict, nich);
568 bus_space_write_1(nict, nich, ED_P0_CR,
569 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
570 NIC_BARRIER(nict, nich);
571
572 /* Reset remote DMA complete flag. */
573 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
574 NIC_BARRIER(nict, nich);
575
576 /* Set up DMA byte count. */
577 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen);
578 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8);
579
580 /* Set up destination address in NIC mem. */
581 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
582 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
583
584 /* Set remote DMA write. */
585 NIC_BARRIER(nict, nich);
586 bus_space_write_1(nict, nich,
587 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
588 NIC_BARRIER(nict, nich);
589
590 /*
591 * Transfer the mbuf chain to the NIC memory. NE2000 cards
592 * require that data be transferred as words, and only words,
593 * so that case requires some extra code to patch over odd-length
594 * mbufs.
595 */
596 if (nsc->sc_useword == 0) {
597 /* byte ops are easy. */
598 for (; m != NULL; m = m->m_next) {
599 if (m->m_len) {
600 bus_space_write_multi_1(asict, asich,
601 NE2000_ASIC_DATA, mtod(m, uint8_t *),
602 m->m_len);
603 }
604 }
605 if (padlen) {
606 for(; padlen > 0; padlen--)
607 bus_space_write_1(asict, asich,
608 NE2000_ASIC_DATA, 0);
609 }
610 } else {
611 /* word ops are a bit trickier. */
612 uint8_t *data, savebyte[2];
613 int l, leftover;
614 #ifdef DIAGNOSTIC
615 uint8_t *lim;
616 #endif
617 /* Start out with no leftover data. */
618 leftover = 0;
619 savebyte[0] = savebyte[1] = 0;
620
621 for (; m != NULL; m = m->m_next) {
622 l = m->m_len;
623 if (l == 0)
624 continue;
625 data = mtod(m, uint8_t *);
626 #ifdef DIAGNOSTIC
627 lim = data + l;
628 #endif
629 while (l > 0) {
630 if (leftover) {
631 /*
632 * Data left over (from mbuf or
633 * realignment). Buffer the next
634 * byte, and write it and the
635 * leftover data out.
636 */
637 savebyte[1] = *data++;
638 l--;
639 bus_space_write_stream_2(asict, asich,
640 NE2000_ASIC_DATA,
641 *(uint16_t *)savebyte);
642 leftover = 0;
643 } else if (BUS_SPACE_ALIGNED_POINTER(data,
644 uint16_t) == 0) {
645 /*
646 * Unaligned data; buffer the next
647 * byte.
648 */
649 savebyte[0] = *data++;
650 l--;
651 leftover = 1;
652 } else {
653 /*
654 * Aligned data; output contiguous
655 * words as much as we can, then
656 * buffer the remaining byte, if any.
657 */
658 leftover = l & 1;
659 l &= ~1;
660 bus_space_write_multi_stream_2(asict,
661 asich, NE2000_ASIC_DATA,
662 (uint16_t *)data, l >> 1);
663 data += l;
664 if (leftover)
665 savebyte[0] = *data++;
666 l = 0;
667 }
668 }
669 if (l < 0)
670 panic("ne2000_write_mbuf: negative len");
671 #ifdef DIAGNOSTIC
672 if (data != lim)
673 panic("ne2000_write_mbuf: data != lim");
674 #endif
675 }
676 if (leftover) {
677 savebyte[1] = 0;
678 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
679 *(uint16_t *)savebyte);
680 }
681 if (padlen) {
682 for(; padlen > 1; padlen -= 2)
683 bus_space_write_stream_2(asict, asich,
684 NE2000_ASIC_DATA, 0);
685 }
686 }
687 NIC_BARRIER(nict, nich);
688
689 /* some AX88796 doesn't seem to have remote DMA complete */
690 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE)
691 return savelen;
692
693 /*
694 * Wait for remote DMA to complete. This is necessary because on the
695 * transmit side, data is handled internally by the NIC in bursts, and
696 * we can't start another remote DMA until this one completes. Not
697 * waiting causes really bad things to happen - like the NIC wedging
698 * the bus.
699 */
700 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
701 ED_ISR_RDC) && --maxwait) {
702 (void)bus_space_read_1(nict, nich, ED_P0_CRDA1);
703 (void)bus_space_read_1(nict, nich, ED_P0_CRDA0);
704 NIC_BARRIER(nict, nich);
705 DELAY(1);
706 }
707
708 if (maxwait == 0) {
709 log(LOG_WARNING,
710 "%s: remote transmit DMA failed to complete\n",
711 device_xname(sc->sc_dev));
712 dp8390_reset(sc);
713 }
714
715 return savelen;
716 }
717
718 /*
719 * Given a source and destination address, copy 'amout' of a packet from
720 * the ring buffer into a linear destination buffer. Takes into account
721 * ring-wrap.
722 */
723 int
ne2000_ring_copy(struct dp8390_softc * sc,int src,void * dstv,u_short amount)724 ne2000_ring_copy(struct dp8390_softc *sc, int src, void *dstv, u_short amount)
725 {
726 char *dst = dstv;
727 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
728 bus_space_tag_t nict = sc->sc_regt;
729 bus_space_handle_t nich = sc->sc_regh;
730 bus_space_tag_t asict = nsc->sc_asict;
731 bus_space_handle_t asich = nsc->sc_asich;
732 u_short tmp_amount;
733 int useword = nsc->sc_useword;
734
735 /* Does copy wrap to lower addr in ring buffer? */
736 if (src + amount > sc->mem_end) {
737 tmp_amount = sc->mem_end - src;
738
739 /* Copy amount up to end of NIC memory. */
740 ne2000_readmem(nict, nich, asict, asich, src,
741 (uint8_t *)dst, tmp_amount, useword);
742
743 amount -= tmp_amount;
744 src = sc->mem_ring;
745 dst += tmp_amount;
746 }
747
748 ne2000_readmem(nict, nich, asict, asich, src, (uint8_t *)dst,
749 amount, useword);
750
751 return src + amount;
752 }
753
754 void
ne2000_read_hdr(struct dp8390_softc * sc,int buf,struct dp8390_ring * hdr)755 ne2000_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr)
756 {
757 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
758
759 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
760 buf, (uint8_t *)hdr, sizeof(struct dp8390_ring),
761 nsc->sc_useword);
762 #if BYTE_ORDER == BIG_ENDIAN
763 hdr->count = bswap16(hdr->count);
764 #endif
765 }
766
767 int
ne2000_test_mem(struct dp8390_softc * sc)768 ne2000_test_mem(struct dp8390_softc *sc)
769 {
770
771 /* Noop. */
772 return 0;
773 }
774
775 /*
776 * Given a NIC memory source address and a host memory destination address,
777 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is
778 * rounded up to a word - ok as long as mbufs are word sized.
779 */
780 void
ne2000_readmem(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich,int src,uint8_t * dst,size_t amount,int useword)781 ne2000_readmem(bus_space_tag_t nict, bus_space_handle_t nich,
782 bus_space_tag_t asict, bus_space_handle_t asich,
783 int src, uint8_t *dst, size_t amount, int useword)
784 {
785
786 /* Select page 0 registers. */
787 NIC_BARRIER(nict, nich);
788 bus_space_write_1(nict, nich, ED_P0_CR,
789 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
790 NIC_BARRIER(nict, nich);
791
792 /* Round up to a word. */
793 amount = roundup2(amount, sizeof(uint16_t));
794
795 /* Set up DMA byte count. */
796 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount);
797 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8);
798
799 /* Set up source address in NIC mem. */
800 bus_space_write_1(nict, nich, ED_P0_RSAR0, src);
801 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8);
802
803 NIC_BARRIER(nict, nich);
804 bus_space_write_1(nict, nich, ED_P0_CR,
805 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
806
807 ASIC_BARRIER(asict, asich);
808 if (useword)
809 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
810 (uint16_t *)dst, amount >> 1);
811 else
812 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
813 dst, amount);
814 }
815
816 /*
817 * Stripped down routine for writing a linear buffer to NIC memory. Only
818 * used in the probe routine to test the memory. 'len' must be even.
819 */
820 void
ne2000_writemem(bus_space_tag_t nict,bus_space_handle_t nich,bus_space_tag_t asict,bus_space_handle_t asich,const uint8_t * src,int dst,size_t len,int useword,int quiet)821 ne2000_writemem(bus_space_tag_t nict, bus_space_handle_t nich,
822 bus_space_tag_t asict, bus_space_handle_t asich,
823 const uint8_t *src, int dst, size_t len, int useword, int quiet)
824 {
825 int maxwait = 100; /* about 120us */
826
827 /* Select page 0 registers. */
828 NIC_BARRIER(nict, nich);
829 bus_space_write_1(nict, nich, ED_P0_CR,
830 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
831 NIC_BARRIER(nict, nich);
832
833 /* Reset remote DMA complete flag. */
834 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
835 NIC_BARRIER(nict, nich);
836
837 /* Set up DMA byte count. */
838 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
839 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
840
841 /* Set up destination address in NIC mem. */
842 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst);
843 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8);
844
845 /* Set remote DMA write. */
846 NIC_BARRIER(nict, nich);
847 bus_space_write_1(nict, nich, ED_P0_CR,
848 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
849 NIC_BARRIER(nict, nich);
850
851 ASIC_BARRIER(asict, asich);
852 if (useword)
853 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
854 (const uint16_t *)src, len >> 1);
855 else
856 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA,
857 src, len);
858 ASIC_BARRIER(asict, asich);
859
860 /*
861 * Wait for remote DMA to complete. This is necessary because on the
862 * transmit side, data is handled internally by the NIC in bursts, and
863 * we can't start another remote DMA until this one completes. Not
864 * waiting causes really bad things to happen - like the NIC wedging
865 * the bus.
866 */
867 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
868 ED_ISR_RDC) && --maxwait)
869 DELAY(1);
870
871 if (!quiet && maxwait == 0)
872 printf("ne2000_writemem: failed to complete\n");
873 }
874
875 int
ne2000_detach(struct ne2000_softc * sc,int flags)876 ne2000_detach(struct ne2000_softc *sc, int flags)
877 {
878
879 return dp8390_detach(&sc->sc_dp8390, flags);
880 }
881
882 bool
ne2000_suspend(device_t self,const pmf_qual_t * qual)883 ne2000_suspend(device_t self, const pmf_qual_t *qual)
884 {
885 struct ne2000_softc *sc = device_private(self);
886 struct dp8390_softc *dsc = &sc->sc_dp8390;
887 int s;
888
889 s = splnet();
890
891 dp8390_stop(dsc);
892 dp8390_disable(dsc);
893
894 splx(s);
895 return true;
896 }
897
898 bool
ne2000_resume(device_t self,const pmf_qual_t * qual)899 ne2000_resume(device_t self, const pmf_qual_t *qual)
900 {
901 struct ne2000_softc *sc = device_private(self);
902 struct dp8390_softc *dsc = &sc->sc_dp8390;
903 struct ifnet *ifp = &dsc->sc_ec.ec_if;
904 int s;
905
906 s = splnet();
907
908 if (ifp->if_flags & IFF_UP) {
909 if (dp8390_enable(dsc) == 0)
910 dp8390_init(dsc);
911 }
912
913 splx(s);
914 return true;
915 }
916