1#include "gen_arm_regalloc_if.h" 2#include "irverify_t.h" 3#include "fourcc.h" 4 5static int cmp_attr_arm_EmptyReg(const ir_node *a, const ir_node *b) { 6 (void) a; 7 (void) b; 8 return 1; 9} 10 11 12ir_op *op_arm_fConst = NULL; 13ir_op *op_arm_Mvf = NULL; 14ir_op *op_arm_Ldr = NULL; 15ir_op *op_arm_Rsb = NULL; 16ir_op *op_arm_Mla = NULL; 17ir_op *op_arm_LinkMovPC = NULL; 18ir_op *op_arm_Mov = NULL; 19ir_op *op_arm_FltX = NULL; 20ir_op *op_arm_Or = NULL; 21ir_op *op_arm_EmptyReg = NULL; 22ir_op *op_arm_Cmp = NULL; 23ir_op *op_arm_Smull = NULL; 24ir_op *op_arm_Add = NULL; 25ir_op *op_arm_LinkLdrPC = NULL; 26ir_op *op_arm_Ldf = NULL; 27ir_op *op_arm_Mvn = NULL; 28ir_op *op_arm_B = NULL; 29ir_op *op_arm_LoadStackM3Epilogue = NULL; 30ir_op *op_arm_Tst = NULL; 31ir_op *op_arm_Umull = NULL; 32ir_op *op_arm_Bic = NULL; 33ir_op *op_arm_Sub = NULL; 34ir_op *op_arm_Mul = NULL; 35ir_op *op_arm_Adf = NULL; 36ir_op *op_arm_Bl = NULL; 37ir_op *op_arm_Stf = NULL; 38ir_op *op_arm_Clz = NULL; 39ir_op *op_arm_Suf = NULL; 40ir_op *op_arm_Cmfe = NULL; 41ir_op *op_arm_CopyB = NULL; 42ir_op *op_arm_FrameAddr = NULL; 43ir_op *op_arm_And = NULL; 44ir_op *op_arm_Str = NULL; 45ir_op *op_arm_Dvf = NULL; 46ir_op *op_arm_SwitchJmp = NULL; 47ir_op *op_arm_StoreStackM4Inc = NULL; 48ir_op *op_arm_Muf = NULL; 49ir_op *op_arm_SymConst = NULL; 50ir_op *op_arm_Eor = NULL; 51ir_op *op_arm_Jmp = NULL; 52 53ir_op *get_op_arm_fConst(void) { return op_arm_fConst; } 54int is_arm_fConst(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_fConst; } 55 56ir_op *get_op_arm_Mvf(void) { return op_arm_Mvf; } 57int is_arm_Mvf(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Mvf; } 58 59ir_op *get_op_arm_Ldr(void) { return op_arm_Ldr; } 60int is_arm_Ldr(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Ldr; } 61 62ir_op *get_op_arm_Rsb(void) { return op_arm_Rsb; } 63int is_arm_Rsb(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Rsb; } 64 65ir_op *get_op_arm_Mla(void) { return op_arm_Mla; } 66int is_arm_Mla(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Mla; } 67 68ir_op *get_op_arm_LinkMovPC(void) { return op_arm_LinkMovPC; } 69int is_arm_LinkMovPC(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_LinkMovPC; } 70 71ir_op *get_op_arm_Mov(void) { return op_arm_Mov; } 72int is_arm_Mov(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Mov; } 73 74ir_op *get_op_arm_FltX(void) { return op_arm_FltX; } 75int is_arm_FltX(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_FltX; } 76 77ir_op *get_op_arm_Or(void) { return op_arm_Or; } 78int is_arm_Or(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Or; } 79 80ir_op *get_op_arm_EmptyReg(void) { return op_arm_EmptyReg; } 81int is_arm_EmptyReg(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_EmptyReg; } 82 83ir_op *get_op_arm_Cmp(void) { return op_arm_Cmp; } 84int is_arm_Cmp(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Cmp; } 85 86ir_op *get_op_arm_Smull(void) { return op_arm_Smull; } 87int is_arm_Smull(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Smull; } 88 89ir_op *get_op_arm_Add(void) { return op_arm_Add; } 90int is_arm_Add(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Add; } 91 92ir_op *get_op_arm_LinkLdrPC(void) { return op_arm_LinkLdrPC; } 93int is_arm_LinkLdrPC(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_LinkLdrPC; } 94 95ir_op *get_op_arm_Ldf(void) { return op_arm_Ldf; } 96int is_arm_Ldf(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Ldf; } 97 98ir_op *get_op_arm_Mvn(void) { return op_arm_Mvn; } 99int is_arm_Mvn(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Mvn; } 100 101ir_op *get_op_arm_B(void) { return op_arm_B; } 102int is_arm_B(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_B; } 103 104ir_op *get_op_arm_LoadStackM3Epilogue(void) { return op_arm_LoadStackM3Epilogue; } 105int is_arm_LoadStackM3Epilogue(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_LoadStackM3Epilogue; } 106 107ir_op *get_op_arm_Tst(void) { return op_arm_Tst; } 108int is_arm_Tst(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Tst; } 109 110ir_op *get_op_arm_Umull(void) { return op_arm_Umull; } 111int is_arm_Umull(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Umull; } 112 113ir_op *get_op_arm_Bic(void) { return op_arm_Bic; } 114int is_arm_Bic(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Bic; } 115 116ir_op *get_op_arm_Sub(void) { return op_arm_Sub; } 117int is_arm_Sub(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Sub; } 118 119ir_op *get_op_arm_Mul(void) { return op_arm_Mul; } 120int is_arm_Mul(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Mul; } 121 122ir_op *get_op_arm_Adf(void) { return op_arm_Adf; } 123int is_arm_Adf(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Adf; } 124 125ir_op *get_op_arm_Bl(void) { return op_arm_Bl; } 126int is_arm_Bl(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Bl; } 127 128ir_op *get_op_arm_Stf(void) { return op_arm_Stf; } 129int is_arm_Stf(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Stf; } 130 131ir_op *get_op_arm_Clz(void) { return op_arm_Clz; } 132int is_arm_Clz(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Clz; } 133 134ir_op *get_op_arm_Suf(void) { return op_arm_Suf; } 135int is_arm_Suf(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Suf; } 136 137ir_op *get_op_arm_Cmfe(void) { return op_arm_Cmfe; } 138int is_arm_Cmfe(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Cmfe; } 139 140ir_op *get_op_arm_CopyB(void) { return op_arm_CopyB; } 141int is_arm_CopyB(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_CopyB; } 142 143ir_op *get_op_arm_FrameAddr(void) { return op_arm_FrameAddr; } 144int is_arm_FrameAddr(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_FrameAddr; } 145 146ir_op *get_op_arm_And(void) { return op_arm_And; } 147int is_arm_And(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_And; } 148 149ir_op *get_op_arm_Str(void) { return op_arm_Str; } 150int is_arm_Str(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Str; } 151 152ir_op *get_op_arm_Dvf(void) { return op_arm_Dvf; } 153int is_arm_Dvf(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Dvf; } 154 155ir_op *get_op_arm_SwitchJmp(void) { return op_arm_SwitchJmp; } 156int is_arm_SwitchJmp(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_SwitchJmp; } 157 158ir_op *get_op_arm_StoreStackM4Inc(void) { return op_arm_StoreStackM4Inc; } 159int is_arm_StoreStackM4Inc(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_StoreStackM4Inc; } 160 161ir_op *get_op_arm_Muf(void) { return op_arm_Muf; } 162int is_arm_Muf(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Muf; } 163 164ir_op *get_op_arm_SymConst(void) { return op_arm_SymConst; } 165int is_arm_SymConst(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_SymConst; } 166 167ir_op *get_op_arm_Eor(void) { return op_arm_Eor; } 168int is_arm_Eor(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Eor; } 169 170ir_op *get_op_arm_Jmp(void) { return op_arm_Jmp; } 171int is_arm_Jmp(const ir_node *n) { return get_arm_irn_opcode(n) == iro_arm_Jmp; } 172 173 174 175static int arm_opcode_start = -1; 176static int arm_opcode_end = -1; 177 178 179/** A tag for the arm opcodes. Note that the address is used as a tag value, NOT the FOURCC code. */ 180#define arm_op_tag FOURCC('A', 'R', 'M', '\0') 181 182/** Return the opcode number of the first arm opcode. */ 183int get_arm_opcode_first(void) { 184 return arm_opcode_start; 185} 186 187/** Return the opcode number of the last arm opcode + 1. */ 188int get_arm_opcode_last(void) { 189 return arm_opcode_end; 190} 191 192/** Return 1 if the given opcode is a arm machine op, 0 otherwise */ 193int is_arm_op(const ir_op *op) { 194 return get_op_tag(op) == arm_op_tag; 195} 196 197/** Return 1 if the given node is a arm machine node, 0 otherwise */ 198int is_arm_irn(const ir_node *node) { 199 return is_arm_op(get_irn_op(node)); 200} 201 202int get_arm_irn_opcode(const ir_node *node) { 203 if (is_arm_irn(node)) 204 return get_irn_opcode(node) - arm_opcode_start; 205 return -1; 206} 207 208#ifdef BIT 209#undef BIT 210#endif 211#define BIT(x) (1 << (x)) 212 213static const unsigned arm_limit_gp_sp[] = { BIT(REG_GP_SP), 0 }; 214static const unsigned arm_limit_gp_r11[] = { BIT(REG_GP_R11), 0 }; 215static const unsigned arm_limit_gp_pc[] = { BIT(REG_GP_PC), 0 }; 216 217static const arch_register_req_t arm_requirements_fpa_fpa = { 218 arch_register_req_type_normal, 219 & arm_reg_classes[CLASS_arm_fpa], 220 NULL, /* limit bitset */ 221 0, /* same pos */ 222 0, /* different pos */ 223 1 /* width */ 224}; 225 226 227static const arch_register_req_t arm_requirements_gp_gp = { 228 arch_register_req_type_normal, 229 & arm_reg_classes[CLASS_arm_gp], 230 NULL, /* limit bitset */ 231 0, /* same pos */ 232 0, /* different pos */ 233 1 /* width */ 234}; 235 236 237static const arch_register_req_t arm_requirements__none = { 238 arch_register_req_type_none, 239 NULL, /* regclass */ 240 NULL, /* limit bitset */ 241 0, /* same pos */ 242 0, /* different pos */ 243 0 /* width */ 244}; 245 246 247static const arch_register_req_t arm_requirements_gp_not_in_r1 = { 248 arch_register_req_type_must_be_different, 249 & arm_reg_classes[CLASS_arm_gp], 250 NULL, 251 0, /* same pos */ 252 1, /* different pos */ 253 1 /* width */ 254}; 255 256 257static const arch_register_req_t arm_requirements_flags_flags = { 258 arch_register_req_type_normal, 259 & arm_reg_classes[CLASS_arm_flags], 260 NULL, /* limit bitset */ 261 0, /* same pos */ 262 0, /* different pos */ 263 1 /* width */ 264}; 265 266 267static const arch_register_req_t arm_requirements_gp_sp = { 268 arch_register_req_type_limited, 269 & arm_reg_classes[CLASS_arm_gp], 270 arm_limit_gp_sp, 271 0, /* same pos */ 272 0, /* different pos */ 273 1 /* width */ 274}; 275 276 277static const arch_register_req_t arm_requirements_gp_r11_I = { 278 arch_register_req_type_ignore | arch_register_req_type_limited, 279 & arm_reg_classes[CLASS_arm_gp], 280 arm_limit_gp_r11, 281 0, /* same pos */ 282 0, /* different pos */ 283 1 /* width */ 284}; 285 286 287static const arch_register_req_t arm_requirements_gp_sp_I_S = { 288 arch_register_req_type_ignore | arch_register_req_type_produces_sp | arch_register_req_type_limited, 289 & arm_reg_classes[CLASS_arm_gp], 290 arm_limit_gp_sp, 291 0, /* same pos */ 292 0, /* different pos */ 293 1 /* width */ 294}; 295 296 297static const arch_register_req_t arm_requirements_gp_pc_I = { 298 arch_register_req_type_ignore | arch_register_req_type_limited, 299 & arm_reg_classes[CLASS_arm_gp], 300 arm_limit_gp_pc, 301 0, /* same pos */ 302 0, /* different pos */ 303 1 /* width */ 304}; 305 306 307static const arch_register_req_t arm_requirements_gp_not_sp = { 308 arch_register_req_type_limited, 309 & arm_reg_classes[CLASS_arm_gp], 310 arm_limit_gp_sp, 311 0, /* same pos */ 312 0, /* different pos */ 313 1 /* width */ 314}; 315 316 317 318/** 319 * construct fConst node 320 */ 321ir_node *new_bd_arm_fConst(dbg_info *dbgi, ir_node *block, ir_tarval *tv) 322{ 323 ir_graph *irg = get_irn_irg(block); 324 ir_op *op = op_arm_fConst; 325 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 326 ir_node *res; 327 backend_info_t *info; 328 int arity = 0; 329 ir_node **in = NULL; 330 int n_res = 1; 331 ir_mode *mode = get_tarval_mode(tv); 332 static const arch_register_req_t **in_reqs = NULL; 333 arm_fConst_attr_t *attr; 334 335 /* flags */ 336 irn_flags_ |= arch_irn_flags_rematerializable; 337 338 /* create node */ 339 assert(op != NULL); 340 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 341 342 /* init node attributes */ 343 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 344 345 info = be_get_info(res); 346 (void) info; /* avoid potential warning */ 347 info->out_infos[0].req = &arm_requirements_fpa_fpa; 348 349 350 attr = (arm_fConst_attr_t*)get_irn_generic_attr(res); 351 (void) attr; /* avoid potential warning */ 352 attr->tv = tv; 353 /* optimize node */ 354 res = optimize_node(res); 355 irn_verify_irg(res, irg); 356 357 return res; 358} 359 360/** 361 * construct Mvf node 362 */ 363ir_node *new_bd_arm_Mvf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_mode *op_mode) 364{ 365 ir_graph *irg = get_irn_irg(block); 366 ir_op *op = op_arm_Mvf; 367 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 368 ir_node *res; 369 backend_info_t *info; 370 int arity = 1; 371 ir_node *in[1]; 372 int n_res = 1; 373 ir_mode *mode = mode_F; 374 static const arch_register_req_t *in_reqs[] = 375 { 376 & arm_requirements_fpa_fpa, 377 }; 378 379 /* construct in array */ 380 in[0] = op0; 381 382 /* flags */ 383 irn_flags_ |= arch_irn_flags_rematerializable; 384 385 /* create node */ 386 assert(op != NULL); 387 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 388 389 /* init node attributes */ 390 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 391 init_arm_farith_attributes(res, op_mode); 392 393 info = be_get_info(res); 394 (void) info; /* avoid potential warning */ 395 info->out_infos[0].req = &arm_requirements_fpa_fpa; 396 397 398 /* optimize node */ 399 res = optimize_node(res); 400 irn_verify_irg(res, irg); 401 402 return res; 403} 404 405/** 406 * construct Ldr node 407 */ 408ir_node *new_bd_arm_Ldr(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity) 409{ 410 ir_graph *irg = get_irn_irg(block); 411 ir_op *op = op_arm_Ldr; 412 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 413 ir_node *res; 414 backend_info_t *info; 415 int arity = 2; 416 ir_node *in[2]; 417 int n_res = 2; 418 ir_mode *mode = mode_T; 419 static const arch_register_req_t *in_reqs[] = 420 { 421 & arm_requirements_gp_gp, 422 & arm_requirements__none, 423 }; 424 425 /* construct in array */ 426 in[0] = ptr; 427 in[1] = mem; 428 429 /* create node */ 430 assert(op != NULL); 431 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 432 433 /* init node attributes */ 434 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 435 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity); 436 437 info = be_get_info(res); 438 (void) info; /* avoid potential warning */ 439 info->out_infos[0].req = &arm_requirements_gp_gp; 440 info->out_infos[1].req = &arm_requirements__none; 441 442 443 /* optimize node */ 444 res = optimize_node(res); 445 irn_verify_irg(res, irg); 446 447 return res; 448} 449 450/** 451 * construct Rsb node 452 */ 453ir_node *new_bd_arm_Rsb_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot) 454{ 455 ir_graph *irg = get_irn_irg(block); 456 ir_op *op = op_arm_Rsb; 457 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 458 ir_node *res; 459 backend_info_t *info; 460 int arity = 1; 461 ir_node *in[1]; 462 int n_res = 1; 463 ir_mode *mode = mode_Iu; 464 static const arch_register_req_t *in_reqs[] = 465 { 466 & arm_requirements_gp_gp, 467 }; 468 469 /* construct in array */ 470 in[0] = left; 471 472 /* flags */ 473 irn_flags_ |= arch_irn_flags_rematerializable; 474 475 /* create node */ 476 assert(op != NULL); 477 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 478 479 /* init node attributes */ 480 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 481 482 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 483 info = be_get_info(res); 484 (void) info; /* avoid potential warning */ 485 info->out_infos[0].req = &arm_requirements_gp_gp; 486 487 488 /* optimize node */ 489 res = optimize_node(res); 490 irn_verify_irg(res, irg); 491 492 return res; 493} 494 495/** 496 * construct Rsb node 497 */ 498ir_node *new_bd_arm_Rsb_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 499{ 500 ir_graph *irg = get_irn_irg(block); 501 ir_op *op = op_arm_Rsb; 502 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 503 ir_node *res; 504 backend_info_t *info; 505 int arity = 2; 506 ir_node *in[2]; 507 int n_res = 1; 508 ir_mode *mode = mode_Iu; 509 static const arch_register_req_t *in_reqs[] = 510 { 511 & arm_requirements_gp_gp, 512 & arm_requirements_gp_gp, 513 }; 514 515 /* construct in array */ 516 in[0] = left; 517 in[1] = right; 518 519 /* flags */ 520 irn_flags_ |= arch_irn_flags_rematerializable; 521 522 /* create node */ 523 assert(op != NULL); 524 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 525 526 /* init node attributes */ 527 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 528 529 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 530 info = be_get_info(res); 531 (void) info; /* avoid potential warning */ 532 info->out_infos[0].req = &arm_requirements_gp_gp; 533 534 535 /* optimize node */ 536 res = optimize_node(res); 537 irn_verify_irg(res, irg); 538 539 return res; 540} 541 542/** 543 * construct Rsb node 544 */ 545ir_node *new_bd_arm_Rsb_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right) 546{ 547 ir_graph *irg = get_irn_irg(block); 548 ir_op *op = op_arm_Rsb; 549 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 550 ir_node *res; 551 backend_info_t *info; 552 int arity = 2; 553 ir_node *in[2]; 554 int n_res = 1; 555 ir_mode *mode = mode_Iu; 556 static const arch_register_req_t *in_reqs[] = 557 { 558 & arm_requirements_gp_gp, 559 & arm_requirements_gp_gp, 560 }; 561 562 /* construct in array */ 563 in[0] = left; 564 in[1] = right; 565 566 /* flags */ 567 irn_flags_ |= arch_irn_flags_rematerializable; 568 569 /* create node */ 570 assert(op != NULL); 571 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 572 573 /* init node attributes */ 574 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 575 576 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 577 info = be_get_info(res); 578 (void) info; /* avoid potential warning */ 579 info->out_infos[0].req = &arm_requirements_gp_gp; 580 581 582 /* optimize node */ 583 res = optimize_node(res); 584 irn_verify_irg(res, irg); 585 586 return res; 587} 588 589/** 590 * construct Rsb node 591 */ 592ir_node *new_bd_arm_Rsb_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier) 593{ 594 ir_graph *irg = get_irn_irg(block); 595 ir_op *op = op_arm_Rsb; 596 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 597 ir_node *res; 598 backend_info_t *info; 599 int arity = 3; 600 ir_node *in[3]; 601 int n_res = 1; 602 ir_mode *mode = mode_Iu; 603 static const arch_register_req_t *in_reqs[] = 604 { 605 & arm_requirements_gp_gp, 606 & arm_requirements_gp_gp, 607 & arm_requirements_gp_gp, 608 }; 609 610 /* construct in array */ 611 in[0] = left; 612 in[1] = right; 613 in[2] = shift; 614 615 /* flags */ 616 irn_flags_ |= arch_irn_flags_rematerializable; 617 618 /* create node */ 619 assert(op != NULL); 620 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 621 622 /* init node attributes */ 623 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 624 625 init_arm_shifter_operand(res, 0, shift_modifier, 0); 626 info = be_get_info(res); 627 (void) info; /* avoid potential warning */ 628 info->out_infos[0].req = &arm_requirements_gp_gp; 629 630 631 /* optimize node */ 632 res = optimize_node(res); 633 irn_verify_irg(res, irg); 634 635 return res; 636} 637 638/** 639 * construct Mla node 640 */ 641ir_node *new_bd_arm_Mla(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_node *op2) 642{ 643 ir_graph *irg = get_irn_irg(block); 644 ir_op *op = op_arm_Mla; 645 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 646 ir_node *res; 647 backend_info_t *info; 648 int arity = 3; 649 ir_node *in[3]; 650 int n_res = 1; 651 ir_mode *mode = mode_Iu; 652 static const arch_register_req_t *in_reqs[] = 653 { 654 & arm_requirements_gp_gp, 655 & arm_requirements_gp_gp, 656 & arm_requirements_gp_gp, 657 }; 658 659 /* construct in array */ 660 in[0] = op0; 661 in[1] = op1; 662 in[2] = op2; 663 664 /* flags */ 665 irn_flags_ |= arch_irn_flags_rematerializable; 666 667 /* create node */ 668 assert(op != NULL); 669 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 670 671 /* init node attributes */ 672 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 673 674 info = be_get_info(res); 675 (void) info; /* avoid potential warning */ 676 info->out_infos[0].req = &arm_requirements_gp_not_in_r1; 677 678 679 /* optimize node */ 680 res = optimize_node(res); 681 irn_verify_irg(res, irg); 682 683 return res; 684} 685 686/** 687 * construct LinkMovPC node 688 */ 689ir_node *new_bd_arm_LinkMovPC(dbg_info *dbgi, ir_node *block, int arity, ir_node *in[], int n_res, arm_shift_modifier_t shift_modifier, unsigned char immediate_value, unsigned char immediate_rot) 690{ 691 ir_graph *irg = get_irn_irg(block); 692 ir_op *op = op_arm_LinkMovPC; 693 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 694 ir_node *res; 695 backend_info_t *info; 696 ir_mode *mode = mode_T; 697 static const arch_register_req_t **in_reqs = NULL; 698 699 /* create node */ 700 assert(op != NULL); 701 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 702 703 /* init node attributes */ 704 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 705 706 init_arm_shifter_operand(res, immediate_value, shift_modifier, immediate_rot); 707 arch_add_irn_flags(res, arch_irn_flags_modify_flags); 708 info = be_get_info(res); 709 (void) info; /* avoid potential warning */ 710 711 712 /* optimize node */ 713 res = optimize_node(res); 714 irn_verify_irg(res, irg); 715 716 return res; 717} 718 719/** 720 * construct Mov node 721 */ 722ir_node *new_bd_arm_Mov_imm(dbg_info *dbgi, ir_node *block, unsigned char immediate_value, unsigned char immediate_rot) 723{ 724 ir_graph *irg = get_irn_irg(block); 725 ir_op *op = op_arm_Mov; 726 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 727 ir_node *res; 728 backend_info_t *info; 729 int arity = 0; 730 ir_node **in = NULL; 731 int n_res = 1; 732 ir_mode *mode = mode_Iu; 733 static const arch_register_req_t **in_reqs = NULL; 734 735 /* flags */ 736 irn_flags_ |= arch_irn_flags_rematerializable; 737 738 /* create node */ 739 assert(op != NULL); 740 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 741 742 /* init node attributes */ 743 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 744 745 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 746 info = be_get_info(res); 747 (void) info; /* avoid potential warning */ 748 info->out_infos[0].req = &arm_requirements_gp_gp; 749 750 751 /* optimize node */ 752 res = optimize_node(res); 753 irn_verify_irg(res, irg); 754 755 return res; 756} 757 758/** 759 * construct Mov node 760 */ 761ir_node *new_bd_arm_Mov_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *op0, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 762{ 763 ir_graph *irg = get_irn_irg(block); 764 ir_op *op = op_arm_Mov; 765 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 766 ir_node *res; 767 backend_info_t *info; 768 int arity = 1; 769 ir_node *in[1]; 770 int n_res = 1; 771 ir_mode *mode = mode_Iu; 772 static const arch_register_req_t *in_reqs[] = 773 { 774 & arm_requirements_gp_gp, 775 }; 776 777 /* construct in array */ 778 in[0] = op0; 779 780 /* flags */ 781 irn_flags_ |= arch_irn_flags_rematerializable; 782 783 /* create node */ 784 assert(op != NULL); 785 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 786 787 /* init node attributes */ 788 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 789 790 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 791 info = be_get_info(res); 792 (void) info; /* avoid potential warning */ 793 info->out_infos[0].req = &arm_requirements_gp_gp; 794 795 796 /* optimize node */ 797 res = optimize_node(res); 798 irn_verify_irg(res, irg); 799 800 return res; 801} 802 803/** 804 * construct Mov node 805 */ 806ir_node *new_bd_arm_Mov_reg(dbg_info *dbgi, ir_node *block, ir_node *op0) 807{ 808 ir_graph *irg = get_irn_irg(block); 809 ir_op *op = op_arm_Mov; 810 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 811 ir_node *res; 812 backend_info_t *info; 813 int arity = 1; 814 ir_node *in[1]; 815 int n_res = 1; 816 ir_mode *mode = mode_Iu; 817 static const arch_register_req_t *in_reqs[] = 818 { 819 & arm_requirements_gp_gp, 820 }; 821 822 /* construct in array */ 823 in[0] = op0; 824 825 /* flags */ 826 irn_flags_ |= arch_irn_flags_rematerializable; 827 828 /* create node */ 829 assert(op != NULL); 830 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 831 832 /* init node attributes */ 833 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 834 835 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 836 info = be_get_info(res); 837 (void) info; /* avoid potential warning */ 838 info->out_infos[0].req = &arm_requirements_gp_gp; 839 840 841 /* optimize node */ 842 res = optimize_node(res); 843 irn_verify_irg(res, irg); 844 845 return res; 846} 847 848/** 849 * construct Mov node 850 */ 851ir_node *new_bd_arm_Mov_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, arm_shift_modifier_t shift_modifier) 852{ 853 ir_graph *irg = get_irn_irg(block); 854 ir_op *op = op_arm_Mov; 855 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 856 ir_node *res; 857 backend_info_t *info; 858 int arity = 2; 859 ir_node *in[2]; 860 int n_res = 1; 861 ir_mode *mode = mode_Iu; 862 static const arch_register_req_t *in_reqs[] = 863 { 864 & arm_requirements_gp_gp, 865 & arm_requirements_gp_gp, 866 }; 867 868 /* construct in array */ 869 in[0] = op0; 870 in[1] = op1; 871 872 /* flags */ 873 irn_flags_ |= arch_irn_flags_rematerializable; 874 875 /* create node */ 876 assert(op != NULL); 877 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 878 879 /* init node attributes */ 880 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 881 882 init_arm_shifter_operand(res, 0, shift_modifier, 0); 883 info = be_get_info(res); 884 (void) info; /* avoid potential warning */ 885 info->out_infos[0].req = &arm_requirements_gp_gp; 886 887 888 /* optimize node */ 889 res = optimize_node(res); 890 irn_verify_irg(res, irg); 891 892 return res; 893} 894 895/** 896 * construct FltX node 897 */ 898ir_node *new_bd_arm_FltX(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_mode *op_mode) 899{ 900 ir_graph *irg = get_irn_irg(block); 901 ir_op *op = op_arm_FltX; 902 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 903 ir_node *res; 904 backend_info_t *info; 905 int arity = 1; 906 ir_node *in[1]; 907 int n_res = 1; 908 ir_mode *mode = mode_F; 909 static const arch_register_req_t *in_reqs[] = 910 { 911 & arm_requirements_gp_gp, 912 }; 913 914 /* construct in array */ 915 in[0] = op0; 916 917 /* flags */ 918 irn_flags_ |= arch_irn_flags_rematerializable; 919 920 /* create node */ 921 assert(op != NULL); 922 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 923 924 /* init node attributes */ 925 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 926 init_arm_farith_attributes(res, op_mode); 927 928 info = be_get_info(res); 929 (void) info; /* avoid potential warning */ 930 info->out_infos[0].req = &arm_requirements_fpa_fpa; 931 932 933 /* optimize node */ 934 res = optimize_node(res); 935 irn_verify_irg(res, irg); 936 937 return res; 938} 939 940/** 941 * construct Or node 942 */ 943ir_node *new_bd_arm_Or_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot) 944{ 945 ir_graph *irg = get_irn_irg(block); 946 ir_op *op = op_arm_Or; 947 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 948 ir_node *res; 949 backend_info_t *info; 950 int arity = 1; 951 ir_node *in[1]; 952 int n_res = 1; 953 ir_mode *mode = mode_Iu; 954 static const arch_register_req_t *in_reqs[] = 955 { 956 & arm_requirements_gp_gp, 957 }; 958 959 /* construct in array */ 960 in[0] = left; 961 962 /* flags */ 963 irn_flags_ |= arch_irn_flags_rematerializable; 964 965 /* create node */ 966 assert(op != NULL); 967 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 968 969 /* init node attributes */ 970 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 971 972 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 973 info = be_get_info(res); 974 (void) info; /* avoid potential warning */ 975 info->out_infos[0].req = &arm_requirements_gp_gp; 976 977 978 /* optimize node */ 979 res = optimize_node(res); 980 irn_verify_irg(res, irg); 981 982 return res; 983} 984 985/** 986 * construct Or node 987 */ 988ir_node *new_bd_arm_Or_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 989{ 990 ir_graph *irg = get_irn_irg(block); 991 ir_op *op = op_arm_Or; 992 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 993 ir_node *res; 994 backend_info_t *info; 995 int arity = 2; 996 ir_node *in[2]; 997 int n_res = 1; 998 ir_mode *mode = mode_Iu; 999 static const arch_register_req_t *in_reqs[] = 1000 { 1001 & arm_requirements_gp_gp, 1002 & arm_requirements_gp_gp, 1003 }; 1004 1005 /* construct in array */ 1006 in[0] = left; 1007 in[1] = right; 1008 1009 /* flags */ 1010 irn_flags_ |= arch_irn_flags_rematerializable; 1011 1012 /* create node */ 1013 assert(op != NULL); 1014 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1015 1016 /* init node attributes */ 1017 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1018 1019 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 1020 info = be_get_info(res); 1021 (void) info; /* avoid potential warning */ 1022 info->out_infos[0].req = &arm_requirements_gp_gp; 1023 1024 1025 /* optimize node */ 1026 res = optimize_node(res); 1027 irn_verify_irg(res, irg); 1028 1029 return res; 1030} 1031 1032/** 1033 * construct Or node 1034 */ 1035ir_node *new_bd_arm_Or_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right) 1036{ 1037 ir_graph *irg = get_irn_irg(block); 1038 ir_op *op = op_arm_Or; 1039 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1040 ir_node *res; 1041 backend_info_t *info; 1042 int arity = 2; 1043 ir_node *in[2]; 1044 int n_res = 1; 1045 ir_mode *mode = mode_Iu; 1046 static const arch_register_req_t *in_reqs[] = 1047 { 1048 & arm_requirements_gp_gp, 1049 & arm_requirements_gp_gp, 1050 }; 1051 1052 /* construct in array */ 1053 in[0] = left; 1054 in[1] = right; 1055 1056 /* flags */ 1057 irn_flags_ |= arch_irn_flags_rematerializable; 1058 1059 /* create node */ 1060 assert(op != NULL); 1061 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1062 1063 /* init node attributes */ 1064 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1065 1066 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 1067 info = be_get_info(res); 1068 (void) info; /* avoid potential warning */ 1069 info->out_infos[0].req = &arm_requirements_gp_gp; 1070 1071 1072 /* optimize node */ 1073 res = optimize_node(res); 1074 irn_verify_irg(res, irg); 1075 1076 return res; 1077} 1078 1079/** 1080 * construct Or node 1081 */ 1082ir_node *new_bd_arm_Or_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier) 1083{ 1084 ir_graph *irg = get_irn_irg(block); 1085 ir_op *op = op_arm_Or; 1086 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1087 ir_node *res; 1088 backend_info_t *info; 1089 int arity = 3; 1090 ir_node *in[3]; 1091 int n_res = 1; 1092 ir_mode *mode = mode_Iu; 1093 static const arch_register_req_t *in_reqs[] = 1094 { 1095 & arm_requirements_gp_gp, 1096 & arm_requirements_gp_gp, 1097 & arm_requirements_gp_gp, 1098 }; 1099 1100 /* construct in array */ 1101 in[0] = left; 1102 in[1] = right; 1103 in[2] = shift; 1104 1105 /* flags */ 1106 irn_flags_ |= arch_irn_flags_rematerializable; 1107 1108 /* create node */ 1109 assert(op != NULL); 1110 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1111 1112 /* init node attributes */ 1113 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1114 1115 init_arm_shifter_operand(res, 0, shift_modifier, 0); 1116 info = be_get_info(res); 1117 (void) info; /* avoid potential warning */ 1118 info->out_infos[0].req = &arm_requirements_gp_gp; 1119 1120 1121 /* optimize node */ 1122 res = optimize_node(res); 1123 irn_verify_irg(res, irg); 1124 1125 return res; 1126} 1127 1128/** 1129 * construct EmptyReg node 1130 */ 1131ir_node *new_bd_arm_EmptyReg(dbg_info *dbgi, ir_node *block) 1132{ 1133 ir_graph *irg = get_irn_irg(block); 1134 ir_op *op = op_arm_EmptyReg; 1135 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1136 ir_node *res; 1137 backend_info_t *info; 1138 int arity = 0; 1139 ir_node **in = NULL; 1140 int n_res = 1; 1141 ir_mode *mode = mode_Iu; 1142 static const arch_register_req_t **in_reqs = NULL; 1143 1144 /* flags */ 1145 irn_flags_ |= arch_irn_flags_rematerializable; 1146 1147 /* create node */ 1148 assert(op != NULL); 1149 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1150 1151 /* init node attributes */ 1152 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1153 1154 info = be_get_info(res); 1155 (void) info; /* avoid potential warning */ 1156 info->out_infos[0].req = &arm_requirements_gp_gp; 1157 1158 1159 /* optimize node */ 1160 res = optimize_node(res); 1161 irn_verify_irg(res, irg); 1162 1163 return res; 1164} 1165 1166/** 1167 * construct Cmp node 1168 */ 1169ir_node *new_bd_arm_Cmp_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned) 1170{ 1171 ir_graph *irg = get_irn_irg(block); 1172 ir_op *op = op_arm_Cmp; 1173 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1174 ir_node *res; 1175 backend_info_t *info; 1176 int arity = 1; 1177 ir_node *in[1]; 1178 int n_res = 1; 1179 ir_mode *mode = mode_Bu; 1180 static const arch_register_req_t *in_reqs[] = 1181 { 1182 & arm_requirements_gp_gp, 1183 }; 1184 1185 /* construct in array */ 1186 in[0] = left; 1187 1188 /* flags */ 1189 irn_flags_ |= arch_irn_flags_rematerializable; 1190 irn_flags_ |= arch_irn_flags_modify_flags; 1191 1192 /* create node */ 1193 assert(op != NULL); 1194 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1195 1196 /* init node attributes */ 1197 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1198 1199 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 1200 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 1201 info = be_get_info(res); 1202 (void) info; /* avoid potential warning */ 1203 info->out_infos[0].req = &arm_requirements_flags_flags; 1204 1205 1206 /* optimize node */ 1207 res = optimize_node(res); 1208 irn_verify_irg(res, irg); 1209 1210 return res; 1211} 1212 1213/** 1214 * construct Cmp node 1215 */ 1216ir_node *new_bd_arm_Cmp_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned) 1217{ 1218 ir_graph *irg = get_irn_irg(block); 1219 ir_op *op = op_arm_Cmp; 1220 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1221 ir_node *res; 1222 backend_info_t *info; 1223 int arity = 2; 1224 ir_node *in[2]; 1225 int n_res = 1; 1226 ir_mode *mode = mode_Bu; 1227 static const arch_register_req_t *in_reqs[] = 1228 { 1229 & arm_requirements_gp_gp, 1230 & arm_requirements_gp_gp, 1231 }; 1232 1233 /* construct in array */ 1234 in[0] = left; 1235 in[1] = right; 1236 1237 /* flags */ 1238 irn_flags_ |= arch_irn_flags_rematerializable; 1239 irn_flags_ |= arch_irn_flags_modify_flags; 1240 1241 /* create node */ 1242 assert(op != NULL); 1243 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1244 1245 /* init node attributes */ 1246 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1247 1248 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 1249 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 1250 info = be_get_info(res); 1251 (void) info; /* avoid potential warning */ 1252 info->out_infos[0].req = &arm_requirements_flags_flags; 1253 1254 1255 /* optimize node */ 1256 res = optimize_node(res); 1257 irn_verify_irg(res, irg); 1258 1259 return res; 1260} 1261 1262/** 1263 * construct Cmp node 1264 */ 1265ir_node *new_bd_arm_Cmp_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned) 1266{ 1267 ir_graph *irg = get_irn_irg(block); 1268 ir_op *op = op_arm_Cmp; 1269 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1270 ir_node *res; 1271 backend_info_t *info; 1272 int arity = 2; 1273 ir_node *in[2]; 1274 int n_res = 1; 1275 ir_mode *mode = mode_Bu; 1276 static const arch_register_req_t *in_reqs[] = 1277 { 1278 & arm_requirements_gp_gp, 1279 & arm_requirements_gp_gp, 1280 }; 1281 1282 /* construct in array */ 1283 in[0] = left; 1284 in[1] = right; 1285 1286 /* flags */ 1287 irn_flags_ |= arch_irn_flags_rematerializable; 1288 irn_flags_ |= arch_irn_flags_modify_flags; 1289 1290 /* create node */ 1291 assert(op != NULL); 1292 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1293 1294 /* init node attributes */ 1295 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1296 1297 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 1298 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 1299 info = be_get_info(res); 1300 (void) info; /* avoid potential warning */ 1301 info->out_infos[0].req = &arm_requirements_flags_flags; 1302 1303 1304 /* optimize node */ 1305 res = optimize_node(res); 1306 irn_verify_irg(res, irg); 1307 1308 return res; 1309} 1310 1311/** 1312 * construct Cmp node 1313 */ 1314ir_node *new_bd_arm_Cmp_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned) 1315{ 1316 ir_graph *irg = get_irn_irg(block); 1317 ir_op *op = op_arm_Cmp; 1318 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1319 ir_node *res; 1320 backend_info_t *info; 1321 int arity = 3; 1322 ir_node *in[3]; 1323 int n_res = 1; 1324 ir_mode *mode = mode_Bu; 1325 static const arch_register_req_t *in_reqs[] = 1326 { 1327 & arm_requirements_gp_gp, 1328 & arm_requirements_gp_gp, 1329 & arm_requirements_gp_gp, 1330 }; 1331 1332 /* construct in array */ 1333 in[0] = left; 1334 in[1] = right; 1335 in[2] = shift; 1336 1337 /* flags */ 1338 irn_flags_ |= arch_irn_flags_rematerializable; 1339 irn_flags_ |= arch_irn_flags_modify_flags; 1340 1341 /* create node */ 1342 assert(op != NULL); 1343 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1344 1345 /* init node attributes */ 1346 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1347 1348 init_arm_shifter_operand(res, 0, shift_modifier, 0); 1349 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 1350 info = be_get_info(res); 1351 (void) info; /* avoid potential warning */ 1352 info->out_infos[0].req = &arm_requirements_flags_flags; 1353 1354 1355 /* optimize node */ 1356 res = optimize_node(res); 1357 irn_verify_irg(res, irg); 1358 1359 return res; 1360} 1361 1362/** 1363 * construct Smull node 1364 */ 1365ir_node *new_bd_arm_Smull(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1) 1366{ 1367 ir_graph *irg = get_irn_irg(block); 1368 ir_op *op = op_arm_Smull; 1369 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1370 ir_node *res; 1371 backend_info_t *info; 1372 int arity = 2; 1373 ir_node *in[2]; 1374 int n_res = 2; 1375 ir_mode *mode = mode_T; 1376 static const arch_register_req_t *in_reqs[] = 1377 { 1378 & arm_requirements_gp_gp, 1379 & arm_requirements_gp_gp, 1380 }; 1381 1382 /* construct in array */ 1383 in[0] = op0; 1384 in[1] = op1; 1385 1386 /* flags */ 1387 irn_flags_ |= arch_irn_flags_rematerializable; 1388 1389 /* create node */ 1390 assert(op != NULL); 1391 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1392 1393 /* init node attributes */ 1394 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1395 1396 info = be_get_info(res); 1397 (void) info; /* avoid potential warning */ 1398 info->out_infos[0].req = &arm_requirements_gp_gp; 1399 info->out_infos[1].req = &arm_requirements_gp_gp; 1400 1401 1402 /* optimize node */ 1403 res = optimize_node(res); 1404 irn_verify_irg(res, irg); 1405 1406 return res; 1407} 1408 1409/** 1410 * construct Add node 1411 */ 1412ir_node *new_bd_arm_Add_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot) 1413{ 1414 ir_graph *irg = get_irn_irg(block); 1415 ir_op *op = op_arm_Add; 1416 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1417 ir_node *res; 1418 backend_info_t *info; 1419 int arity = 1; 1420 ir_node *in[1]; 1421 int n_res = 1; 1422 ir_mode *mode = mode_Iu; 1423 static const arch_register_req_t *in_reqs[] = 1424 { 1425 & arm_requirements_gp_gp, 1426 }; 1427 1428 /* construct in array */ 1429 in[0] = left; 1430 1431 /* flags */ 1432 irn_flags_ |= arch_irn_flags_rematerializable; 1433 1434 /* create node */ 1435 assert(op != NULL); 1436 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1437 1438 /* init node attributes */ 1439 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1440 1441 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 1442 info = be_get_info(res); 1443 (void) info; /* avoid potential warning */ 1444 info->out_infos[0].req = &arm_requirements_gp_gp; 1445 1446 1447 /* optimize node */ 1448 res = optimize_node(res); 1449 irn_verify_irg(res, irg); 1450 1451 return res; 1452} 1453 1454/** 1455 * construct Add node 1456 */ 1457ir_node *new_bd_arm_Add_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 1458{ 1459 ir_graph *irg = get_irn_irg(block); 1460 ir_op *op = op_arm_Add; 1461 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1462 ir_node *res; 1463 backend_info_t *info; 1464 int arity = 2; 1465 ir_node *in[2]; 1466 int n_res = 1; 1467 ir_mode *mode = mode_Iu; 1468 static const arch_register_req_t *in_reqs[] = 1469 { 1470 & arm_requirements_gp_gp, 1471 & arm_requirements_gp_gp, 1472 }; 1473 1474 /* construct in array */ 1475 in[0] = left; 1476 in[1] = right; 1477 1478 /* flags */ 1479 irn_flags_ |= arch_irn_flags_rematerializable; 1480 1481 /* create node */ 1482 assert(op != NULL); 1483 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1484 1485 /* init node attributes */ 1486 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1487 1488 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 1489 info = be_get_info(res); 1490 (void) info; /* avoid potential warning */ 1491 info->out_infos[0].req = &arm_requirements_gp_gp; 1492 1493 1494 /* optimize node */ 1495 res = optimize_node(res); 1496 irn_verify_irg(res, irg); 1497 1498 return res; 1499} 1500 1501/** 1502 * construct Add node 1503 */ 1504ir_node *new_bd_arm_Add_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right) 1505{ 1506 ir_graph *irg = get_irn_irg(block); 1507 ir_op *op = op_arm_Add; 1508 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1509 ir_node *res; 1510 backend_info_t *info; 1511 int arity = 2; 1512 ir_node *in[2]; 1513 int n_res = 1; 1514 ir_mode *mode = mode_Iu; 1515 static const arch_register_req_t *in_reqs[] = 1516 { 1517 & arm_requirements_gp_gp, 1518 & arm_requirements_gp_gp, 1519 }; 1520 1521 /* construct in array */ 1522 in[0] = left; 1523 in[1] = right; 1524 1525 /* flags */ 1526 irn_flags_ |= arch_irn_flags_rematerializable; 1527 1528 /* create node */ 1529 assert(op != NULL); 1530 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1531 1532 /* init node attributes */ 1533 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1534 1535 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 1536 info = be_get_info(res); 1537 (void) info; /* avoid potential warning */ 1538 info->out_infos[0].req = &arm_requirements_gp_gp; 1539 1540 1541 /* optimize node */ 1542 res = optimize_node(res); 1543 irn_verify_irg(res, irg); 1544 1545 return res; 1546} 1547 1548/** 1549 * construct Add node 1550 */ 1551ir_node *new_bd_arm_Add_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier) 1552{ 1553 ir_graph *irg = get_irn_irg(block); 1554 ir_op *op = op_arm_Add; 1555 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1556 ir_node *res; 1557 backend_info_t *info; 1558 int arity = 3; 1559 ir_node *in[3]; 1560 int n_res = 1; 1561 ir_mode *mode = mode_Iu; 1562 static const arch_register_req_t *in_reqs[] = 1563 { 1564 & arm_requirements_gp_gp, 1565 & arm_requirements_gp_gp, 1566 & arm_requirements_gp_gp, 1567 }; 1568 1569 /* construct in array */ 1570 in[0] = left; 1571 in[1] = right; 1572 in[2] = shift; 1573 1574 /* flags */ 1575 irn_flags_ |= arch_irn_flags_rematerializable; 1576 1577 /* create node */ 1578 assert(op != NULL); 1579 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1580 1581 /* init node attributes */ 1582 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1583 1584 init_arm_shifter_operand(res, 0, shift_modifier, 0); 1585 info = be_get_info(res); 1586 (void) info; /* avoid potential warning */ 1587 info->out_infos[0].req = &arm_requirements_gp_gp; 1588 1589 1590 /* optimize node */ 1591 res = optimize_node(res); 1592 irn_verify_irg(res, irg); 1593 1594 return res; 1595} 1596 1597/** 1598 * construct LinkLdrPC node 1599 */ 1600ir_node *new_bd_arm_LinkLdrPC(dbg_info *dbgi, ir_node *block, int arity, ir_node *in[], int n_res, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity) 1601{ 1602 ir_graph *irg = get_irn_irg(block); 1603 ir_op *op = op_arm_LinkLdrPC; 1604 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1605 ir_node *res; 1606 backend_info_t *info; 1607 ir_mode *mode = mode_T; 1608 static const arch_register_req_t **in_reqs = NULL; 1609 1610 /* create node */ 1611 assert(op != NULL); 1612 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1613 1614 /* init node attributes */ 1615 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1616 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity); 1617 arch_add_irn_flags(res, arch_irn_flags_modify_flags); 1618 info = be_get_info(res); 1619 (void) info; /* avoid potential warning */ 1620 1621 1622 /* optimize node */ 1623 res = optimize_node(res); 1624 irn_verify_irg(res, irg); 1625 1626 return res; 1627} 1628 1629/** 1630 * construct Ldf node 1631 */ 1632ir_node *new_bd_arm_Ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity) 1633{ 1634 ir_graph *irg = get_irn_irg(block); 1635 ir_op *op = op_arm_Ldf; 1636 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1637 ir_node *res; 1638 backend_info_t *info; 1639 int arity = 2; 1640 ir_node *in[2]; 1641 int n_res = 2; 1642 ir_mode *mode = mode_T; 1643 static const arch_register_req_t *in_reqs[] = 1644 { 1645 & arm_requirements_gp_gp, 1646 & arm_requirements__none, 1647 }; 1648 1649 /* construct in array */ 1650 in[0] = ptr; 1651 in[1] = mem; 1652 1653 /* create node */ 1654 assert(op != NULL); 1655 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1656 1657 /* init node attributes */ 1658 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1659 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity); 1660 1661 info = be_get_info(res); 1662 (void) info; /* avoid potential warning */ 1663 info->out_infos[0].req = &arm_requirements_fpa_fpa; 1664 info->out_infos[1].req = &arm_requirements__none; 1665 1666 1667 /* optimize node */ 1668 res = optimize_node(res); 1669 irn_verify_irg(res, irg); 1670 1671 return res; 1672} 1673 1674/** 1675 * construct Mvn node 1676 */ 1677ir_node *new_bd_arm_Mvn_imm(dbg_info *dbgi, ir_node *block, unsigned char immediate_value, unsigned char immediate_rot) 1678{ 1679 ir_graph *irg = get_irn_irg(block); 1680 ir_op *op = op_arm_Mvn; 1681 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1682 ir_node *res; 1683 backend_info_t *info; 1684 int arity = 0; 1685 ir_node **in = NULL; 1686 int n_res = 1; 1687 ir_mode *mode = mode_Iu; 1688 static const arch_register_req_t **in_reqs = NULL; 1689 1690 /* flags */ 1691 irn_flags_ |= arch_irn_flags_rematerializable; 1692 1693 /* create node */ 1694 assert(op != NULL); 1695 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1696 1697 /* init node attributes */ 1698 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1699 1700 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 1701 info = be_get_info(res); 1702 (void) info; /* avoid potential warning */ 1703 info->out_infos[0].req = &arm_requirements_gp_gp; 1704 1705 1706 /* optimize node */ 1707 res = optimize_node(res); 1708 irn_verify_irg(res, irg); 1709 1710 return res; 1711} 1712 1713/** 1714 * construct Mvn node 1715 */ 1716ir_node *new_bd_arm_Mvn_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *op0, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 1717{ 1718 ir_graph *irg = get_irn_irg(block); 1719 ir_op *op = op_arm_Mvn; 1720 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1721 ir_node *res; 1722 backend_info_t *info; 1723 int arity = 1; 1724 ir_node *in[1]; 1725 int n_res = 1; 1726 ir_mode *mode = mode_Iu; 1727 static const arch_register_req_t *in_reqs[] = 1728 { 1729 & arm_requirements_gp_gp, 1730 }; 1731 1732 /* construct in array */ 1733 in[0] = op0; 1734 1735 /* flags */ 1736 irn_flags_ |= arch_irn_flags_rematerializable; 1737 1738 /* create node */ 1739 assert(op != NULL); 1740 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1741 1742 /* init node attributes */ 1743 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1744 1745 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 1746 info = be_get_info(res); 1747 (void) info; /* avoid potential warning */ 1748 info->out_infos[0].req = &arm_requirements_gp_gp; 1749 1750 1751 /* optimize node */ 1752 res = optimize_node(res); 1753 irn_verify_irg(res, irg); 1754 1755 return res; 1756} 1757 1758/** 1759 * construct Mvn node 1760 */ 1761ir_node *new_bd_arm_Mvn_reg(dbg_info *dbgi, ir_node *block, ir_node *op0) 1762{ 1763 ir_graph *irg = get_irn_irg(block); 1764 ir_op *op = op_arm_Mvn; 1765 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1766 ir_node *res; 1767 backend_info_t *info; 1768 int arity = 1; 1769 ir_node *in[1]; 1770 int n_res = 1; 1771 ir_mode *mode = mode_Iu; 1772 static const arch_register_req_t *in_reqs[] = 1773 { 1774 & arm_requirements_gp_gp, 1775 }; 1776 1777 /* construct in array */ 1778 in[0] = op0; 1779 1780 /* flags */ 1781 irn_flags_ |= arch_irn_flags_rematerializable; 1782 1783 /* create node */ 1784 assert(op != NULL); 1785 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1786 1787 /* init node attributes */ 1788 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1789 1790 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 1791 info = be_get_info(res); 1792 (void) info; /* avoid potential warning */ 1793 info->out_infos[0].req = &arm_requirements_gp_gp; 1794 1795 1796 /* optimize node */ 1797 res = optimize_node(res); 1798 irn_verify_irg(res, irg); 1799 1800 return res; 1801} 1802 1803/** 1804 * construct Mvn node 1805 */ 1806ir_node *new_bd_arm_Mvn_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, arm_shift_modifier_t shift_modifier) 1807{ 1808 ir_graph *irg = get_irn_irg(block); 1809 ir_op *op = op_arm_Mvn; 1810 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1811 ir_node *res; 1812 backend_info_t *info; 1813 int arity = 2; 1814 ir_node *in[2]; 1815 int n_res = 1; 1816 ir_mode *mode = mode_Iu; 1817 static const arch_register_req_t *in_reqs[] = 1818 { 1819 & arm_requirements_gp_gp, 1820 & arm_requirements_gp_gp, 1821 }; 1822 1823 /* construct in array */ 1824 in[0] = op0; 1825 in[1] = op1; 1826 1827 /* flags */ 1828 irn_flags_ |= arch_irn_flags_rematerializable; 1829 1830 /* create node */ 1831 assert(op != NULL); 1832 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1833 1834 /* init node attributes */ 1835 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1836 1837 init_arm_shifter_operand(res, 0, shift_modifier, 0); 1838 info = be_get_info(res); 1839 (void) info; /* avoid potential warning */ 1840 info->out_infos[0].req = &arm_requirements_gp_gp; 1841 1842 1843 /* optimize node */ 1844 res = optimize_node(res); 1845 irn_verify_irg(res, irg); 1846 1847 return res; 1848} 1849 1850/** 1851 * construct B node 1852 */ 1853ir_node *new_bd_arm_B(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_relation relation) 1854{ 1855 ir_graph *irg = get_irn_irg(block); 1856 ir_op *op = op_arm_B; 1857 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1858 ir_node *res; 1859 backend_info_t *info; 1860 int arity = 1; 1861 ir_node *in[1]; 1862 int n_res = 2; 1863 ir_mode *mode = mode_T; 1864 static const arch_register_req_t *in_reqs[] = 1865 { 1866 & arm_requirements_flags_flags, 1867 }; 1868 arm_CondJmp_attr_t *attr; 1869 1870 /* construct in array */ 1871 in[0] = op0; 1872 1873 /* create node */ 1874 assert(op != NULL); 1875 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1876 1877 /* init node attributes */ 1878 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1879 1880 info = be_get_info(res); 1881 (void) info; /* avoid potential warning */ 1882 info->out_infos[0].req = &arm_requirements__none; 1883 info->out_infos[1].req = &arm_requirements__none; 1884 1885 1886 attr = (arm_CondJmp_attr_t*)get_irn_generic_attr(res); 1887 (void) attr; /* avoid potential warning */ 1888 set_arm_CondJmp_relation(res, relation); 1889 /* optimize node */ 1890 res = optimize_node(res); 1891 irn_verify_irg(res, irg); 1892 1893 return res; 1894} 1895 1896/** 1897 * construct LoadStackM3Epilogue node 1898 */ 1899ir_node *new_bd_arm_LoadStackM3Epilogue(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1) 1900{ 1901 ir_graph *irg = get_irn_irg(block); 1902 ir_op *op = op_arm_LoadStackM3Epilogue; 1903 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1904 ir_node *res; 1905 backend_info_t *info; 1906 int arity = 2; 1907 ir_node *in[2]; 1908 int n_res = 4; 1909 ir_mode *mode = mode_T; 1910 static const arch_register_req_t *in_reqs[] = 1911 { 1912 & arm_requirements_gp_sp, 1913 & arm_requirements__none, 1914 }; 1915 1916 /* construct in array */ 1917 in[0] = op0; 1918 in[1] = op1; 1919 1920 /* flags */ 1921 irn_flags_ |= arch_irn_flags_rematerializable; 1922 1923 /* create node */ 1924 assert(op != NULL); 1925 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1926 1927 /* init node attributes */ 1928 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1929 1930 info = be_get_info(res); 1931 (void) info; /* avoid potential warning */ 1932 info->out_infos[0].req = &arm_requirements_gp_r11_I; 1933 info->out_infos[1].req = &arm_requirements_gp_sp_I_S; 1934 info->out_infos[2].req = &arm_requirements_gp_pc_I; 1935 info->out_infos[3].req = &arm_requirements__none; 1936 1937 1938 /* optimize node */ 1939 res = optimize_node(res); 1940 irn_verify_irg(res, irg); 1941 1942 return res; 1943} 1944 1945/** 1946 * construct Tst node 1947 */ 1948ir_node *new_bd_arm_Tst_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned) 1949{ 1950 ir_graph *irg = get_irn_irg(block); 1951 ir_op *op = op_arm_Tst; 1952 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 1953 ir_node *res; 1954 backend_info_t *info; 1955 int arity = 1; 1956 ir_node *in[1]; 1957 int n_res = 1; 1958 ir_mode *mode = mode_Bu; 1959 static const arch_register_req_t *in_reqs[] = 1960 { 1961 & arm_requirements_gp_gp, 1962 }; 1963 1964 /* construct in array */ 1965 in[0] = left; 1966 1967 /* flags */ 1968 irn_flags_ |= arch_irn_flags_rematerializable; 1969 irn_flags_ |= arch_irn_flags_modify_flags; 1970 1971 /* create node */ 1972 assert(op != NULL); 1973 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 1974 1975 /* init node attributes */ 1976 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 1977 1978 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 1979 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 1980 info = be_get_info(res); 1981 (void) info; /* avoid potential warning */ 1982 info->out_infos[0].req = &arm_requirements_flags_flags; 1983 1984 1985 /* optimize node */ 1986 res = optimize_node(res); 1987 irn_verify_irg(res, irg); 1988 1989 return res; 1990} 1991 1992/** 1993 * construct Tst node 1994 */ 1995ir_node *new_bd_arm_Tst_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned) 1996{ 1997 ir_graph *irg = get_irn_irg(block); 1998 ir_op *op = op_arm_Tst; 1999 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2000 ir_node *res; 2001 backend_info_t *info; 2002 int arity = 2; 2003 ir_node *in[2]; 2004 int n_res = 1; 2005 ir_mode *mode = mode_Bu; 2006 static const arch_register_req_t *in_reqs[] = 2007 { 2008 & arm_requirements_gp_gp, 2009 & arm_requirements_gp_gp, 2010 }; 2011 2012 /* construct in array */ 2013 in[0] = left; 2014 in[1] = right; 2015 2016 /* flags */ 2017 irn_flags_ |= arch_irn_flags_rematerializable; 2018 irn_flags_ |= arch_irn_flags_modify_flags; 2019 2020 /* create node */ 2021 assert(op != NULL); 2022 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2023 2024 /* init node attributes */ 2025 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2026 2027 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 2028 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 2029 info = be_get_info(res); 2030 (void) info; /* avoid potential warning */ 2031 info->out_infos[0].req = &arm_requirements_flags_flags; 2032 2033 2034 /* optimize node */ 2035 res = optimize_node(res); 2036 irn_verify_irg(res, irg); 2037 2038 return res; 2039} 2040 2041/** 2042 * construct Tst node 2043 */ 2044ir_node *new_bd_arm_Tst_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned) 2045{ 2046 ir_graph *irg = get_irn_irg(block); 2047 ir_op *op = op_arm_Tst; 2048 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2049 ir_node *res; 2050 backend_info_t *info; 2051 int arity = 2; 2052 ir_node *in[2]; 2053 int n_res = 1; 2054 ir_mode *mode = mode_Bu; 2055 static const arch_register_req_t *in_reqs[] = 2056 { 2057 & arm_requirements_gp_gp, 2058 & arm_requirements_gp_gp, 2059 }; 2060 2061 /* construct in array */ 2062 in[0] = left; 2063 in[1] = right; 2064 2065 /* flags */ 2066 irn_flags_ |= arch_irn_flags_rematerializable; 2067 irn_flags_ |= arch_irn_flags_modify_flags; 2068 2069 /* create node */ 2070 assert(op != NULL); 2071 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2072 2073 /* init node attributes */ 2074 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2075 2076 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 2077 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 2078 info = be_get_info(res); 2079 (void) info; /* avoid potential warning */ 2080 info->out_infos[0].req = &arm_requirements_flags_flags; 2081 2082 2083 /* optimize node */ 2084 res = optimize_node(res); 2085 irn_verify_irg(res, irg); 2086 2087 return res; 2088} 2089 2090/** 2091 * construct Tst node 2092 */ 2093ir_node *new_bd_arm_Tst_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned) 2094{ 2095 ir_graph *irg = get_irn_irg(block); 2096 ir_op *op = op_arm_Tst; 2097 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2098 ir_node *res; 2099 backend_info_t *info; 2100 int arity = 3; 2101 ir_node *in[3]; 2102 int n_res = 1; 2103 ir_mode *mode = mode_Bu; 2104 static const arch_register_req_t *in_reqs[] = 2105 { 2106 & arm_requirements_gp_gp, 2107 & arm_requirements_gp_gp, 2108 & arm_requirements_gp_gp, 2109 }; 2110 2111 /* construct in array */ 2112 in[0] = left; 2113 in[1] = right; 2114 in[2] = shift; 2115 2116 /* flags */ 2117 irn_flags_ |= arch_irn_flags_rematerializable; 2118 irn_flags_ |= arch_irn_flags_modify_flags; 2119 2120 /* create node */ 2121 assert(op != NULL); 2122 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2123 2124 /* init node attributes */ 2125 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2126 2127 init_arm_shifter_operand(res, 0, shift_modifier, 0); 2128 init_arm_cmp_attr(res, ins_permuted, is_unsigned); 2129 info = be_get_info(res); 2130 (void) info; /* avoid potential warning */ 2131 info->out_infos[0].req = &arm_requirements_flags_flags; 2132 2133 2134 /* optimize node */ 2135 res = optimize_node(res); 2136 irn_verify_irg(res, irg); 2137 2138 return res; 2139} 2140 2141/** 2142 * construct Umull node 2143 */ 2144ir_node *new_bd_arm_Umull(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1) 2145{ 2146 ir_graph *irg = get_irn_irg(block); 2147 ir_op *op = op_arm_Umull; 2148 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2149 ir_node *res; 2150 backend_info_t *info; 2151 int arity = 2; 2152 ir_node *in[2]; 2153 int n_res = 2; 2154 ir_mode *mode = mode_Iu; 2155 static const arch_register_req_t *in_reqs[] = 2156 { 2157 & arm_requirements_gp_gp, 2158 & arm_requirements_gp_gp, 2159 }; 2160 2161 /* construct in array */ 2162 in[0] = op0; 2163 in[1] = op1; 2164 2165 /* flags */ 2166 irn_flags_ |= arch_irn_flags_rematerializable; 2167 2168 /* create node */ 2169 assert(op != NULL); 2170 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2171 2172 /* init node attributes */ 2173 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2174 2175 info = be_get_info(res); 2176 (void) info; /* avoid potential warning */ 2177 info->out_infos[0].req = &arm_requirements_gp_gp; 2178 info->out_infos[1].req = &arm_requirements_gp_gp; 2179 2180 2181 /* optimize node */ 2182 res = optimize_node(res); 2183 irn_verify_irg(res, irg); 2184 2185 return res; 2186} 2187 2188/** 2189 * construct Bic node 2190 */ 2191ir_node *new_bd_arm_Bic_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot) 2192{ 2193 ir_graph *irg = get_irn_irg(block); 2194 ir_op *op = op_arm_Bic; 2195 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2196 ir_node *res; 2197 backend_info_t *info; 2198 int arity = 1; 2199 ir_node *in[1]; 2200 int n_res = 1; 2201 ir_mode *mode = mode_Iu; 2202 static const arch_register_req_t *in_reqs[] = 2203 { 2204 & arm_requirements_gp_gp, 2205 }; 2206 2207 /* construct in array */ 2208 in[0] = left; 2209 2210 /* flags */ 2211 irn_flags_ |= arch_irn_flags_rematerializable; 2212 2213 /* create node */ 2214 assert(op != NULL); 2215 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2216 2217 /* init node attributes */ 2218 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2219 2220 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 2221 info = be_get_info(res); 2222 (void) info; /* avoid potential warning */ 2223 info->out_infos[0].req = &arm_requirements_gp_gp; 2224 2225 2226 /* optimize node */ 2227 res = optimize_node(res); 2228 irn_verify_irg(res, irg); 2229 2230 return res; 2231} 2232 2233/** 2234 * construct Bic node 2235 */ 2236ir_node *new_bd_arm_Bic_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 2237{ 2238 ir_graph *irg = get_irn_irg(block); 2239 ir_op *op = op_arm_Bic; 2240 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2241 ir_node *res; 2242 backend_info_t *info; 2243 int arity = 2; 2244 ir_node *in[2]; 2245 int n_res = 1; 2246 ir_mode *mode = mode_Iu; 2247 static const arch_register_req_t *in_reqs[] = 2248 { 2249 & arm_requirements_gp_gp, 2250 & arm_requirements_gp_gp, 2251 }; 2252 2253 /* construct in array */ 2254 in[0] = left; 2255 in[1] = right; 2256 2257 /* flags */ 2258 irn_flags_ |= arch_irn_flags_rematerializable; 2259 2260 /* create node */ 2261 assert(op != NULL); 2262 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2263 2264 /* init node attributes */ 2265 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2266 2267 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 2268 info = be_get_info(res); 2269 (void) info; /* avoid potential warning */ 2270 info->out_infos[0].req = &arm_requirements_gp_gp; 2271 2272 2273 /* optimize node */ 2274 res = optimize_node(res); 2275 irn_verify_irg(res, irg); 2276 2277 return res; 2278} 2279 2280/** 2281 * construct Bic node 2282 */ 2283ir_node *new_bd_arm_Bic_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right) 2284{ 2285 ir_graph *irg = get_irn_irg(block); 2286 ir_op *op = op_arm_Bic; 2287 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2288 ir_node *res; 2289 backend_info_t *info; 2290 int arity = 2; 2291 ir_node *in[2]; 2292 int n_res = 1; 2293 ir_mode *mode = mode_Iu; 2294 static const arch_register_req_t *in_reqs[] = 2295 { 2296 & arm_requirements_gp_gp, 2297 & arm_requirements_gp_gp, 2298 }; 2299 2300 /* construct in array */ 2301 in[0] = left; 2302 in[1] = right; 2303 2304 /* flags */ 2305 irn_flags_ |= arch_irn_flags_rematerializable; 2306 2307 /* create node */ 2308 assert(op != NULL); 2309 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2310 2311 /* init node attributes */ 2312 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2313 2314 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 2315 info = be_get_info(res); 2316 (void) info; /* avoid potential warning */ 2317 info->out_infos[0].req = &arm_requirements_gp_gp; 2318 2319 2320 /* optimize node */ 2321 res = optimize_node(res); 2322 irn_verify_irg(res, irg); 2323 2324 return res; 2325} 2326 2327/** 2328 * construct Bic node 2329 */ 2330ir_node *new_bd_arm_Bic_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier) 2331{ 2332 ir_graph *irg = get_irn_irg(block); 2333 ir_op *op = op_arm_Bic; 2334 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2335 ir_node *res; 2336 backend_info_t *info; 2337 int arity = 3; 2338 ir_node *in[3]; 2339 int n_res = 1; 2340 ir_mode *mode = mode_Iu; 2341 static const arch_register_req_t *in_reqs[] = 2342 { 2343 & arm_requirements_gp_gp, 2344 & arm_requirements_gp_gp, 2345 & arm_requirements_gp_gp, 2346 }; 2347 2348 /* construct in array */ 2349 in[0] = left; 2350 in[1] = right; 2351 in[2] = shift; 2352 2353 /* flags */ 2354 irn_flags_ |= arch_irn_flags_rematerializable; 2355 2356 /* create node */ 2357 assert(op != NULL); 2358 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2359 2360 /* init node attributes */ 2361 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2362 2363 init_arm_shifter_operand(res, 0, shift_modifier, 0); 2364 info = be_get_info(res); 2365 (void) info; /* avoid potential warning */ 2366 info->out_infos[0].req = &arm_requirements_gp_gp; 2367 2368 2369 /* optimize node */ 2370 res = optimize_node(res); 2371 irn_verify_irg(res, irg); 2372 2373 return res; 2374} 2375 2376/** 2377 * construct Sub node 2378 */ 2379ir_node *new_bd_arm_Sub_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot) 2380{ 2381 ir_graph *irg = get_irn_irg(block); 2382 ir_op *op = op_arm_Sub; 2383 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2384 ir_node *res; 2385 backend_info_t *info; 2386 int arity = 1; 2387 ir_node *in[1]; 2388 int n_res = 1; 2389 ir_mode *mode = mode_Iu; 2390 static const arch_register_req_t *in_reqs[] = 2391 { 2392 & arm_requirements_gp_gp, 2393 }; 2394 2395 /* construct in array */ 2396 in[0] = left; 2397 2398 /* flags */ 2399 irn_flags_ |= arch_irn_flags_rematerializable; 2400 2401 /* create node */ 2402 assert(op != NULL); 2403 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2404 2405 /* init node attributes */ 2406 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2407 2408 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 2409 info = be_get_info(res); 2410 (void) info; /* avoid potential warning */ 2411 info->out_infos[0].req = &arm_requirements_gp_gp; 2412 2413 2414 /* optimize node */ 2415 res = optimize_node(res); 2416 irn_verify_irg(res, irg); 2417 2418 return res; 2419} 2420 2421/** 2422 * construct Sub node 2423 */ 2424ir_node *new_bd_arm_Sub_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 2425{ 2426 ir_graph *irg = get_irn_irg(block); 2427 ir_op *op = op_arm_Sub; 2428 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2429 ir_node *res; 2430 backend_info_t *info; 2431 int arity = 2; 2432 ir_node *in[2]; 2433 int n_res = 1; 2434 ir_mode *mode = mode_Iu; 2435 static const arch_register_req_t *in_reqs[] = 2436 { 2437 & arm_requirements_gp_gp, 2438 & arm_requirements_gp_gp, 2439 }; 2440 2441 /* construct in array */ 2442 in[0] = left; 2443 in[1] = right; 2444 2445 /* flags */ 2446 irn_flags_ |= arch_irn_flags_rematerializable; 2447 2448 /* create node */ 2449 assert(op != NULL); 2450 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2451 2452 /* init node attributes */ 2453 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2454 2455 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 2456 info = be_get_info(res); 2457 (void) info; /* avoid potential warning */ 2458 info->out_infos[0].req = &arm_requirements_gp_gp; 2459 2460 2461 /* optimize node */ 2462 res = optimize_node(res); 2463 irn_verify_irg(res, irg); 2464 2465 return res; 2466} 2467 2468/** 2469 * construct Sub node 2470 */ 2471ir_node *new_bd_arm_Sub_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right) 2472{ 2473 ir_graph *irg = get_irn_irg(block); 2474 ir_op *op = op_arm_Sub; 2475 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2476 ir_node *res; 2477 backend_info_t *info; 2478 int arity = 2; 2479 ir_node *in[2]; 2480 int n_res = 1; 2481 ir_mode *mode = mode_Iu; 2482 static const arch_register_req_t *in_reqs[] = 2483 { 2484 & arm_requirements_gp_gp, 2485 & arm_requirements_gp_gp, 2486 }; 2487 2488 /* construct in array */ 2489 in[0] = left; 2490 in[1] = right; 2491 2492 /* flags */ 2493 irn_flags_ |= arch_irn_flags_rematerializable; 2494 2495 /* create node */ 2496 assert(op != NULL); 2497 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2498 2499 /* init node attributes */ 2500 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2501 2502 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 2503 info = be_get_info(res); 2504 (void) info; /* avoid potential warning */ 2505 info->out_infos[0].req = &arm_requirements_gp_gp; 2506 2507 2508 /* optimize node */ 2509 res = optimize_node(res); 2510 irn_verify_irg(res, irg); 2511 2512 return res; 2513} 2514 2515/** 2516 * construct Sub node 2517 */ 2518ir_node *new_bd_arm_Sub_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier) 2519{ 2520 ir_graph *irg = get_irn_irg(block); 2521 ir_op *op = op_arm_Sub; 2522 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2523 ir_node *res; 2524 backend_info_t *info; 2525 int arity = 3; 2526 ir_node *in[3]; 2527 int n_res = 1; 2528 ir_mode *mode = mode_Iu; 2529 static const arch_register_req_t *in_reqs[] = 2530 { 2531 & arm_requirements_gp_gp, 2532 & arm_requirements_gp_gp, 2533 & arm_requirements_gp_gp, 2534 }; 2535 2536 /* construct in array */ 2537 in[0] = left; 2538 in[1] = right; 2539 in[2] = shift; 2540 2541 /* flags */ 2542 irn_flags_ |= arch_irn_flags_rematerializable; 2543 2544 /* create node */ 2545 assert(op != NULL); 2546 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2547 2548 /* init node attributes */ 2549 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2550 2551 init_arm_shifter_operand(res, 0, shift_modifier, 0); 2552 info = be_get_info(res); 2553 (void) info; /* avoid potential warning */ 2554 info->out_infos[0].req = &arm_requirements_gp_gp; 2555 2556 2557 /* optimize node */ 2558 res = optimize_node(res); 2559 irn_verify_irg(res, irg); 2560 2561 return res; 2562} 2563 2564/** 2565 * construct Mul node 2566 */ 2567ir_node *new_bd_arm_Mul(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1) 2568{ 2569 ir_graph *irg = get_irn_irg(block); 2570 ir_op *op = op_arm_Mul; 2571 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2572 ir_node *res; 2573 backend_info_t *info; 2574 int arity = 2; 2575 ir_node *in[2]; 2576 int n_res = 1; 2577 ir_mode *mode = mode_Iu; 2578 static const arch_register_req_t *in_reqs[] = 2579 { 2580 & arm_requirements_gp_gp, 2581 & arm_requirements_gp_gp, 2582 }; 2583 2584 /* construct in array */ 2585 in[0] = op0; 2586 in[1] = op1; 2587 2588 /* flags */ 2589 irn_flags_ |= arch_irn_flags_rematerializable; 2590 2591 /* create node */ 2592 assert(op != NULL); 2593 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2594 2595 /* init node attributes */ 2596 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2597 2598 info = be_get_info(res); 2599 (void) info; /* avoid potential warning */ 2600 info->out_infos[0].req = &arm_requirements_gp_not_in_r1; 2601 2602 2603 /* optimize node */ 2604 res = optimize_node(res); 2605 irn_verify_irg(res, irg); 2606 2607 return res; 2608} 2609 2610/** 2611 * construct Adf node 2612 */ 2613ir_node *new_bd_arm_Adf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode) 2614{ 2615 ir_graph *irg = get_irn_irg(block); 2616 ir_op *op = op_arm_Adf; 2617 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2618 ir_node *res; 2619 backend_info_t *info; 2620 int arity = 2; 2621 ir_node *in[2]; 2622 int n_res = 1; 2623 ir_mode *mode = mode_F; 2624 static const arch_register_req_t *in_reqs[] = 2625 { 2626 & arm_requirements_fpa_fpa, 2627 & arm_requirements_fpa_fpa, 2628 }; 2629 2630 /* construct in array */ 2631 in[0] = op0; 2632 in[1] = op1; 2633 2634 /* flags */ 2635 irn_flags_ |= arch_irn_flags_rematerializable; 2636 2637 /* create node */ 2638 assert(op != NULL); 2639 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2640 2641 /* init node attributes */ 2642 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2643 init_arm_farith_attributes(res, op_mode); 2644 2645 info = be_get_info(res); 2646 (void) info; /* avoid potential warning */ 2647 info->out_infos[0].req = &arm_requirements_fpa_fpa; 2648 2649 2650 /* optimize node */ 2651 res = optimize_node(res); 2652 irn_verify_irg(res, irg); 2653 2654 return res; 2655} 2656 2657/** 2658 * construct Bl node 2659 */ 2660ir_node *new_bd_arm_Bl(dbg_info *dbgi, ir_node *block, int arity, ir_node *in[], int n_res, ir_entity *entity, int symconst_offset) 2661{ 2662 ir_graph *irg = get_irn_irg(block); 2663 ir_op *op = op_arm_Bl; 2664 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2665 ir_node *res; 2666 backend_info_t *info; 2667 ir_mode *mode = mode_T; 2668 static const arch_register_req_t **in_reqs = NULL; 2669 2670 /* create node */ 2671 assert(op != NULL); 2672 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2673 2674 /* init node attributes */ 2675 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2676 init_arm_SymConst_attributes(res, entity, symconst_offset); 2677 arch_add_irn_flags(res, arch_irn_flags_modify_flags); 2678 info = be_get_info(res); 2679 (void) info; /* avoid potential warning */ 2680 2681 2682 /* optimize node */ 2683 res = optimize_node(res); 2684 irn_verify_irg(res, irg); 2685 2686 return res; 2687} 2688 2689/** 2690 * construct Stf node 2691 */ 2692ir_node *new_bd_arm_Stf(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *val, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity) 2693{ 2694 ir_graph *irg = get_irn_irg(block); 2695 ir_op *op = op_arm_Stf; 2696 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2697 ir_node *res; 2698 backend_info_t *info; 2699 int arity = 3; 2700 ir_node *in[3]; 2701 int n_res = 1; 2702 ir_mode *mode = mode_M; 2703 static const arch_register_req_t *in_reqs[] = 2704 { 2705 & arm_requirements_gp_gp, 2706 & arm_requirements_fpa_fpa, 2707 & arm_requirements__none, 2708 }; 2709 2710 /* construct in array */ 2711 in[0] = ptr; 2712 in[1] = val; 2713 in[2] = mem; 2714 2715 /* create node */ 2716 assert(op != NULL); 2717 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2718 2719 /* init node attributes */ 2720 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2721 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity); 2722 2723 info = be_get_info(res); 2724 (void) info; /* avoid potential warning */ 2725 info->out_infos[0].req = &arm_requirements__none; 2726 2727 2728 /* optimize node */ 2729 res = optimize_node(res); 2730 irn_verify_irg(res, irg); 2731 2732 return res; 2733} 2734 2735/** 2736 * construct Clz node 2737 */ 2738ir_node *new_bd_arm_Clz(dbg_info *dbgi, ir_node *block, ir_node *op0) 2739{ 2740 ir_graph *irg = get_irn_irg(block); 2741 ir_op *op = op_arm_Clz; 2742 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2743 ir_node *res; 2744 backend_info_t *info; 2745 int arity = 1; 2746 ir_node *in[1]; 2747 int n_res = 1; 2748 ir_mode *mode = mode_Iu; 2749 static const arch_register_req_t *in_reqs[] = 2750 { 2751 & arm_requirements_gp_gp, 2752 }; 2753 2754 /* construct in array */ 2755 in[0] = op0; 2756 2757 /* flags */ 2758 irn_flags_ |= arch_irn_flags_rematerializable; 2759 2760 /* create node */ 2761 assert(op != NULL); 2762 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2763 2764 /* init node attributes */ 2765 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2766 2767 info = be_get_info(res); 2768 (void) info; /* avoid potential warning */ 2769 info->out_infos[0].req = &arm_requirements_gp_gp; 2770 2771 2772 /* optimize node */ 2773 res = optimize_node(res); 2774 irn_verify_irg(res, irg); 2775 2776 return res; 2777} 2778 2779/** 2780 * construct Suf node 2781 */ 2782ir_node *new_bd_arm_Suf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode) 2783{ 2784 ir_graph *irg = get_irn_irg(block); 2785 ir_op *op = op_arm_Suf; 2786 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2787 ir_node *res; 2788 backend_info_t *info; 2789 int arity = 2; 2790 ir_node *in[2]; 2791 int n_res = 1; 2792 ir_mode *mode = mode_F; 2793 static const arch_register_req_t *in_reqs[] = 2794 { 2795 & arm_requirements_fpa_fpa, 2796 & arm_requirements_fpa_fpa, 2797 }; 2798 2799 /* construct in array */ 2800 in[0] = op0; 2801 in[1] = op1; 2802 2803 /* flags */ 2804 irn_flags_ |= arch_irn_flags_rematerializable; 2805 2806 /* create node */ 2807 assert(op != NULL); 2808 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2809 2810 /* init node attributes */ 2811 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2812 init_arm_farith_attributes(res, op_mode); 2813 2814 info = be_get_info(res); 2815 (void) info; /* avoid potential warning */ 2816 info->out_infos[0].req = &arm_requirements_fpa_fpa; 2817 2818 2819 /* optimize node */ 2820 res = optimize_node(res); 2821 irn_verify_irg(res, irg); 2822 2823 return res; 2824} 2825 2826/** 2827 * construct Cmfe node 2828 */ 2829ir_node *new_bd_arm_Cmfe(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, bool ins_permuted) 2830{ 2831 ir_graph *irg = get_irn_irg(block); 2832 ir_op *op = op_arm_Cmfe; 2833 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2834 ir_node *res; 2835 backend_info_t *info; 2836 int arity = 2; 2837 ir_node *in[2]; 2838 int n_res = 1; 2839 ir_mode *mode = mode_Bu; 2840 static const arch_register_req_t *in_reqs[] = 2841 { 2842 & arm_requirements_fpa_fpa, 2843 & arm_requirements_fpa_fpa, 2844 }; 2845 arm_cmp_attr_t *attr; 2846 2847 /* construct in array */ 2848 in[0] = op0; 2849 in[1] = op1; 2850 2851 /* flags */ 2852 irn_flags_ |= arch_irn_flags_rematerializable; 2853 irn_flags_ |= arch_irn_flags_modify_flags; 2854 2855 /* create node */ 2856 assert(op != NULL); 2857 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2858 2859 /* init node attributes */ 2860 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2861 2862 2863 info = be_get_info(res); 2864 (void) info; /* avoid potential warning */ 2865 info->out_infos[0].req = &arm_requirements_flags_flags; 2866 2867 2868 attr = (arm_cmp_attr_t*)get_irn_generic_attr(res); 2869 (void) attr; /* avoid potential warning */ 2870 init_arm_cmp_attr(res, ins_permuted, false); 2871 /* optimize node */ 2872 res = optimize_node(res); 2873 irn_verify_irg(res, irg); 2874 2875 return res; 2876} 2877 2878/** 2879 * construct CopyB node 2880 */ 2881ir_node *new_bd_arm_CopyB(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_node *op2, ir_node *op3, ir_node *op4, ir_node *op5, unsigned size) 2882{ 2883 ir_graph *irg = get_irn_irg(block); 2884 ir_op *op = op_arm_CopyB; 2885 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2886 ir_node *res; 2887 backend_info_t *info; 2888 int arity = 6; 2889 ir_node *in[6]; 2890 int n_res = 1; 2891 ir_mode *mode = mode_T; 2892 static const arch_register_req_t *in_reqs[] = 2893 { 2894 & arm_requirements_gp_not_sp, 2895 & arm_requirements_gp_not_sp, 2896 & arm_requirements_gp_gp, 2897 & arm_requirements_gp_gp, 2898 & arm_requirements_gp_gp, 2899 & arm_requirements__none, 2900 }; 2901 2902 /* construct in array */ 2903 in[0] = op0; 2904 in[1] = op1; 2905 in[2] = op2; 2906 in[3] = op3; 2907 in[4] = op4; 2908 in[5] = op5; 2909 2910 /* create node */ 2911 assert(op != NULL); 2912 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2913 2914 /* init node attributes */ 2915 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2916 init_arm_CopyB_attributes(res, size); 2917 2918 info = be_get_info(res); 2919 (void) info; /* avoid potential warning */ 2920 info->out_infos[0].req = &arm_requirements__none; 2921 2922 2923 /* optimize node */ 2924 res = optimize_node(res); 2925 irn_verify_irg(res, irg); 2926 2927 return res; 2928} 2929 2930/** 2931 * construct FrameAddr node 2932 */ 2933ir_node *new_bd_arm_FrameAddr(dbg_info *dbgi, ir_node *block, ir_node *base, ir_entity *entity, int symconst_offset) 2934{ 2935 ir_graph *irg = get_irn_irg(block); 2936 ir_op *op = op_arm_FrameAddr; 2937 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2938 ir_node *res; 2939 backend_info_t *info; 2940 int arity = 1; 2941 ir_node *in[1]; 2942 int n_res = 1; 2943 ir_mode *mode = mode_Iu; 2944 static const arch_register_req_t *in_reqs[] = 2945 { 2946 & arm_requirements_gp_gp, 2947 }; 2948 2949 /* construct in array */ 2950 in[0] = base; 2951 2952 /* flags */ 2953 irn_flags_ |= arch_irn_flags_rematerializable; 2954 2955 /* create node */ 2956 assert(op != NULL); 2957 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 2958 2959 /* init node attributes */ 2960 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 2961 init_arm_SymConst_attributes(res, entity, symconst_offset); 2962 2963 info = be_get_info(res); 2964 (void) info; /* avoid potential warning */ 2965 info->out_infos[0].req = &arm_requirements_gp_gp; 2966 2967 2968 /* optimize node */ 2969 res = optimize_node(res); 2970 irn_verify_irg(res, irg); 2971 2972 return res; 2973} 2974 2975/** 2976 * construct And node 2977 */ 2978ir_node *new_bd_arm_And_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot) 2979{ 2980 ir_graph *irg = get_irn_irg(block); 2981 ir_op *op = op_arm_And; 2982 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 2983 ir_node *res; 2984 backend_info_t *info; 2985 int arity = 1; 2986 ir_node *in[1]; 2987 int n_res = 1; 2988 ir_mode *mode = mode_Iu; 2989 static const arch_register_req_t *in_reqs[] = 2990 { 2991 & arm_requirements_gp_gp, 2992 }; 2993 2994 /* construct in array */ 2995 in[0] = left; 2996 2997 /* flags */ 2998 irn_flags_ |= arch_irn_flags_rematerializable; 2999 3000 /* create node */ 3001 assert(op != NULL); 3002 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3003 3004 /* init node attributes */ 3005 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3006 3007 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 3008 info = be_get_info(res); 3009 (void) info; /* avoid potential warning */ 3010 info->out_infos[0].req = &arm_requirements_gp_gp; 3011 3012 3013 /* optimize node */ 3014 res = optimize_node(res); 3015 irn_verify_irg(res, irg); 3016 3017 return res; 3018} 3019 3020/** 3021 * construct And node 3022 */ 3023ir_node *new_bd_arm_And_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 3024{ 3025 ir_graph *irg = get_irn_irg(block); 3026 ir_op *op = op_arm_And; 3027 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3028 ir_node *res; 3029 backend_info_t *info; 3030 int arity = 2; 3031 ir_node *in[2]; 3032 int n_res = 1; 3033 ir_mode *mode = mode_Iu; 3034 static const arch_register_req_t *in_reqs[] = 3035 { 3036 & arm_requirements_gp_gp, 3037 & arm_requirements_gp_gp, 3038 }; 3039 3040 /* construct in array */ 3041 in[0] = left; 3042 in[1] = right; 3043 3044 /* flags */ 3045 irn_flags_ |= arch_irn_flags_rematerializable; 3046 3047 /* create node */ 3048 assert(op != NULL); 3049 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3050 3051 /* init node attributes */ 3052 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3053 3054 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 3055 info = be_get_info(res); 3056 (void) info; /* avoid potential warning */ 3057 info->out_infos[0].req = &arm_requirements_gp_gp; 3058 3059 3060 /* optimize node */ 3061 res = optimize_node(res); 3062 irn_verify_irg(res, irg); 3063 3064 return res; 3065} 3066 3067/** 3068 * construct And node 3069 */ 3070ir_node *new_bd_arm_And_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right) 3071{ 3072 ir_graph *irg = get_irn_irg(block); 3073 ir_op *op = op_arm_And; 3074 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3075 ir_node *res; 3076 backend_info_t *info; 3077 int arity = 2; 3078 ir_node *in[2]; 3079 int n_res = 1; 3080 ir_mode *mode = mode_Iu; 3081 static const arch_register_req_t *in_reqs[] = 3082 { 3083 & arm_requirements_gp_gp, 3084 & arm_requirements_gp_gp, 3085 }; 3086 3087 /* construct in array */ 3088 in[0] = left; 3089 in[1] = right; 3090 3091 /* flags */ 3092 irn_flags_ |= arch_irn_flags_rematerializable; 3093 3094 /* create node */ 3095 assert(op != NULL); 3096 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3097 3098 /* init node attributes */ 3099 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3100 3101 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 3102 info = be_get_info(res); 3103 (void) info; /* avoid potential warning */ 3104 info->out_infos[0].req = &arm_requirements_gp_gp; 3105 3106 3107 /* optimize node */ 3108 res = optimize_node(res); 3109 irn_verify_irg(res, irg); 3110 3111 return res; 3112} 3113 3114/** 3115 * construct And node 3116 */ 3117ir_node *new_bd_arm_And_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier) 3118{ 3119 ir_graph *irg = get_irn_irg(block); 3120 ir_op *op = op_arm_And; 3121 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3122 ir_node *res; 3123 backend_info_t *info; 3124 int arity = 3; 3125 ir_node *in[3]; 3126 int n_res = 1; 3127 ir_mode *mode = mode_Iu; 3128 static const arch_register_req_t *in_reqs[] = 3129 { 3130 & arm_requirements_gp_gp, 3131 & arm_requirements_gp_gp, 3132 & arm_requirements_gp_gp, 3133 }; 3134 3135 /* construct in array */ 3136 in[0] = left; 3137 in[1] = right; 3138 in[2] = shift; 3139 3140 /* flags */ 3141 irn_flags_ |= arch_irn_flags_rematerializable; 3142 3143 /* create node */ 3144 assert(op != NULL); 3145 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3146 3147 /* init node attributes */ 3148 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3149 3150 init_arm_shifter_operand(res, 0, shift_modifier, 0); 3151 info = be_get_info(res); 3152 (void) info; /* avoid potential warning */ 3153 info->out_infos[0].req = &arm_requirements_gp_gp; 3154 3155 3156 /* optimize node */ 3157 res = optimize_node(res); 3158 irn_verify_irg(res, irg); 3159 3160 return res; 3161} 3162 3163/** 3164 * construct Str node 3165 */ 3166ir_node *new_bd_arm_Str(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *val, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity) 3167{ 3168 ir_graph *irg = get_irn_irg(block); 3169 ir_op *op = op_arm_Str; 3170 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3171 ir_node *res; 3172 backend_info_t *info; 3173 int arity = 3; 3174 ir_node *in[3]; 3175 int n_res = 1; 3176 ir_mode *mode = mode_M; 3177 static const arch_register_req_t *in_reqs[] = 3178 { 3179 & arm_requirements_gp_gp, 3180 & arm_requirements_gp_gp, 3181 & arm_requirements__none, 3182 }; 3183 3184 /* construct in array */ 3185 in[0] = ptr; 3186 in[1] = val; 3187 in[2] = mem; 3188 3189 /* create node */ 3190 assert(op != NULL); 3191 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3192 3193 /* init node attributes */ 3194 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3195 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity); 3196 3197 info = be_get_info(res); 3198 (void) info; /* avoid potential warning */ 3199 info->out_infos[0].req = &arm_requirements__none; 3200 3201 3202 /* optimize node */ 3203 res = optimize_node(res); 3204 irn_verify_irg(res, irg); 3205 3206 return res; 3207} 3208 3209/** 3210 * construct Dvf node 3211 */ 3212ir_node *new_bd_arm_Dvf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode) 3213{ 3214 ir_graph *irg = get_irn_irg(block); 3215 ir_op *op = op_arm_Dvf; 3216 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3217 ir_node *res; 3218 backend_info_t *info; 3219 int arity = 2; 3220 ir_node *in[2]; 3221 int n_res = 2; 3222 ir_mode *mode = mode_F; 3223 static const arch_register_req_t *in_reqs[] = 3224 { 3225 & arm_requirements_fpa_fpa, 3226 & arm_requirements_fpa_fpa, 3227 }; 3228 3229 /* construct in array */ 3230 in[0] = op0; 3231 in[1] = op1; 3232 3233 /* create node */ 3234 assert(op != NULL); 3235 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3236 3237 /* init node attributes */ 3238 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3239 init_arm_farith_attributes(res, op_mode); 3240 3241 info = be_get_info(res); 3242 (void) info; /* avoid potential warning */ 3243 info->out_infos[0].req = &arm_requirements_fpa_fpa; 3244 info->out_infos[1].req = &arm_requirements__none; 3245 3246 3247 /* optimize node */ 3248 res = optimize_node(res); 3249 irn_verify_irg(res, irg); 3250 3251 return res; 3252} 3253 3254/** 3255 * construct SwitchJmp node 3256 */ 3257ir_node *new_bd_arm_SwitchJmp(dbg_info *dbgi, ir_node *block, ir_node *op0, int n_res, const ir_switch_table *table) 3258{ 3259 ir_graph *irg = get_irn_irg(block); 3260 ir_op *op = op_arm_SwitchJmp; 3261 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3262 ir_node *res; 3263 backend_info_t *info; 3264 int arity = 1; 3265 ir_node *in[1]; 3266 ir_mode *mode = mode_T; 3267 static const arch_register_req_t *in_reqs[] = 3268 { 3269 & arm_requirements_gp_gp, 3270 }; 3271 arm_SwitchJmp_attr_t *attr; 3272 3273 /* construct in array */ 3274 in[0] = op0; 3275 3276 /* create node */ 3277 assert(op != NULL); 3278 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3279 3280 /* init node attributes */ 3281 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3282 3283 info = be_get_info(res); 3284 (void) info; /* avoid potential warning */ 3285 info->out_infos[0].req = &arm_requirements__none; 3286 3287 3288 attr = (arm_SwitchJmp_attr_t*)get_irn_generic_attr(res); 3289 (void) attr; /* avoid potential warning */ 3290 init_arm_SwitchJmp_attributes(res, table); 3291 /* optimize node */ 3292 res = optimize_node(res); 3293 irn_verify_irg(res, irg); 3294 3295 return res; 3296} 3297 3298/** 3299 * construct StoreStackM4Inc node 3300 */ 3301ir_node *new_bd_arm_StoreStackM4Inc(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_node *op2, ir_node *op3, ir_node *op4, ir_node *op5) 3302{ 3303 ir_graph *irg = get_irn_irg(block); 3304 ir_op *op = op_arm_StoreStackM4Inc; 3305 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3306 ir_node *res; 3307 backend_info_t *info; 3308 int arity = 6; 3309 ir_node *in[6]; 3310 int n_res = 2; 3311 ir_mode *mode = mode_T; 3312 static const arch_register_req_t *in_reqs[] = 3313 { 3314 & arm_requirements_gp_sp, 3315 & arm_requirements_gp_gp, 3316 & arm_requirements_gp_gp, 3317 & arm_requirements_gp_gp, 3318 & arm_requirements_gp_gp, 3319 & arm_requirements__none, 3320 }; 3321 3322 /* construct in array */ 3323 in[0] = op0; 3324 in[1] = op1; 3325 in[2] = op2; 3326 in[3] = op3; 3327 in[4] = op4; 3328 in[5] = op5; 3329 3330 /* flags */ 3331 irn_flags_ |= arch_irn_flags_rematerializable; 3332 3333 /* create node */ 3334 assert(op != NULL); 3335 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3336 3337 /* init node attributes */ 3338 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3339 3340 info = be_get_info(res); 3341 (void) info; /* avoid potential warning */ 3342 info->out_infos[0].req = &arm_requirements_gp_sp_I_S; 3343 info->out_infos[1].req = &arm_requirements__none; 3344 3345 3346 /* optimize node */ 3347 res = optimize_node(res); 3348 irn_verify_irg(res, irg); 3349 3350 return res; 3351} 3352 3353/** 3354 * construct Muf node 3355 */ 3356ir_node *new_bd_arm_Muf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode) 3357{ 3358 ir_graph *irg = get_irn_irg(block); 3359 ir_op *op = op_arm_Muf; 3360 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3361 ir_node *res; 3362 backend_info_t *info; 3363 int arity = 2; 3364 ir_node *in[2]; 3365 int n_res = 1; 3366 ir_mode *mode = mode_F; 3367 static const arch_register_req_t *in_reqs[] = 3368 { 3369 & arm_requirements_fpa_fpa, 3370 & arm_requirements_fpa_fpa, 3371 }; 3372 3373 /* construct in array */ 3374 in[0] = op0; 3375 in[1] = op1; 3376 3377 /* flags */ 3378 irn_flags_ |= arch_irn_flags_rematerializable; 3379 3380 /* create node */ 3381 assert(op != NULL); 3382 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3383 3384 /* init node attributes */ 3385 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3386 init_arm_farith_attributes(res, op_mode); 3387 3388 info = be_get_info(res); 3389 (void) info; /* avoid potential warning */ 3390 info->out_infos[0].req = &arm_requirements_fpa_fpa; 3391 3392 3393 /* optimize node */ 3394 res = optimize_node(res); 3395 irn_verify_irg(res, irg); 3396 3397 return res; 3398} 3399 3400/** 3401 * construct SymConst node 3402 */ 3403ir_node *new_bd_arm_SymConst(dbg_info *dbgi, ir_node *block, ir_entity *entity, int symconst_offset) 3404{ 3405 ir_graph *irg = get_irn_irg(block); 3406 ir_op *op = op_arm_SymConst; 3407 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3408 ir_node *res; 3409 backend_info_t *info; 3410 int arity = 0; 3411 ir_node **in = NULL; 3412 int n_res = 1; 3413 ir_mode *mode = mode_Iu; 3414 static const arch_register_req_t **in_reqs = NULL; 3415 3416 /* flags */ 3417 irn_flags_ |= arch_irn_flags_rematerializable; 3418 3419 /* create node */ 3420 assert(op != NULL); 3421 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3422 3423 /* init node attributes */ 3424 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3425 init_arm_SymConst_attributes(res, entity, symconst_offset); 3426 3427 info = be_get_info(res); 3428 (void) info; /* avoid potential warning */ 3429 info->out_infos[0].req = &arm_requirements_gp_gp; 3430 3431 3432 /* optimize node */ 3433 res = optimize_node(res); 3434 irn_verify_irg(res, irg); 3435 3436 return res; 3437} 3438 3439/** 3440 * construct Eor node 3441 */ 3442ir_node *new_bd_arm_Eor_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot) 3443{ 3444 ir_graph *irg = get_irn_irg(block); 3445 ir_op *op = op_arm_Eor; 3446 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3447 ir_node *res; 3448 backend_info_t *info; 3449 int arity = 1; 3450 ir_node *in[1]; 3451 int n_res = 1; 3452 ir_mode *mode = mode_Iu; 3453 static const arch_register_req_t *in_reqs[] = 3454 { 3455 & arm_requirements_gp_gp, 3456 }; 3457 3458 /* construct in array */ 3459 in[0] = left; 3460 3461 /* flags */ 3462 irn_flags_ |= arch_irn_flags_rematerializable; 3463 3464 /* create node */ 3465 assert(op != NULL); 3466 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3467 3468 /* init node attributes */ 3469 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3470 3471 init_arm_shifter_operand(res, immediate_value, ARM_SHF_IMM, immediate_rot); 3472 info = be_get_info(res); 3473 (void) info; /* avoid potential warning */ 3474 info->out_infos[0].req = &arm_requirements_gp_gp; 3475 3476 3477 /* optimize node */ 3478 res = optimize_node(res); 3479 irn_verify_irg(res, irg); 3480 3481 return res; 3482} 3483 3484/** 3485 * construct Eor node 3486 */ 3487ir_node *new_bd_arm_Eor_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate) 3488{ 3489 ir_graph *irg = get_irn_irg(block); 3490 ir_op *op = op_arm_Eor; 3491 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3492 ir_node *res; 3493 backend_info_t *info; 3494 int arity = 2; 3495 ir_node *in[2]; 3496 int n_res = 1; 3497 ir_mode *mode = mode_Iu; 3498 static const arch_register_req_t *in_reqs[] = 3499 { 3500 & arm_requirements_gp_gp, 3501 & arm_requirements_gp_gp, 3502 }; 3503 3504 /* construct in array */ 3505 in[0] = left; 3506 in[1] = right; 3507 3508 /* flags */ 3509 irn_flags_ |= arch_irn_flags_rematerializable; 3510 3511 /* create node */ 3512 assert(op != NULL); 3513 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3514 3515 /* init node attributes */ 3516 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3517 3518 init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate); 3519 info = be_get_info(res); 3520 (void) info; /* avoid potential warning */ 3521 info->out_infos[0].req = &arm_requirements_gp_gp; 3522 3523 3524 /* optimize node */ 3525 res = optimize_node(res); 3526 irn_verify_irg(res, irg); 3527 3528 return res; 3529} 3530 3531/** 3532 * construct Eor node 3533 */ 3534ir_node *new_bd_arm_Eor_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right) 3535{ 3536 ir_graph *irg = get_irn_irg(block); 3537 ir_op *op = op_arm_Eor; 3538 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3539 ir_node *res; 3540 backend_info_t *info; 3541 int arity = 2; 3542 ir_node *in[2]; 3543 int n_res = 1; 3544 ir_mode *mode = mode_Iu; 3545 static const arch_register_req_t *in_reqs[] = 3546 { 3547 & arm_requirements_gp_gp, 3548 & arm_requirements_gp_gp, 3549 }; 3550 3551 /* construct in array */ 3552 in[0] = left; 3553 in[1] = right; 3554 3555 /* flags */ 3556 irn_flags_ |= arch_irn_flags_rematerializable; 3557 3558 /* create node */ 3559 assert(op != NULL); 3560 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3561 3562 /* init node attributes */ 3563 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3564 3565 init_arm_shifter_operand(res, 0, ARM_SHF_REG, 0); 3566 info = be_get_info(res); 3567 (void) info; /* avoid potential warning */ 3568 info->out_infos[0].req = &arm_requirements_gp_gp; 3569 3570 3571 /* optimize node */ 3572 res = optimize_node(res); 3573 irn_verify_irg(res, irg); 3574 3575 return res; 3576} 3577 3578/** 3579 * construct Eor node 3580 */ 3581ir_node *new_bd_arm_Eor_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier) 3582{ 3583 ir_graph *irg = get_irn_irg(block); 3584 ir_op *op = op_arm_Eor; 3585 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3586 ir_node *res; 3587 backend_info_t *info; 3588 int arity = 3; 3589 ir_node *in[3]; 3590 int n_res = 1; 3591 ir_mode *mode = mode_Iu; 3592 static const arch_register_req_t *in_reqs[] = 3593 { 3594 & arm_requirements_gp_gp, 3595 & arm_requirements_gp_gp, 3596 & arm_requirements_gp_gp, 3597 }; 3598 3599 /* construct in array */ 3600 in[0] = left; 3601 in[1] = right; 3602 in[2] = shift; 3603 3604 /* flags */ 3605 irn_flags_ |= arch_irn_flags_rematerializable; 3606 3607 /* create node */ 3608 assert(op != NULL); 3609 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3610 3611 /* init node attributes */ 3612 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3613 3614 init_arm_shifter_operand(res, 0, shift_modifier, 0); 3615 info = be_get_info(res); 3616 (void) info; /* avoid potential warning */ 3617 info->out_infos[0].req = &arm_requirements_gp_gp; 3618 3619 3620 /* optimize node */ 3621 res = optimize_node(res); 3622 irn_verify_irg(res, irg); 3623 3624 return res; 3625} 3626 3627/** 3628 * construct Jmp node 3629 */ 3630ir_node *new_bd_arm_Jmp(dbg_info *dbgi, ir_node *block) 3631{ 3632 ir_graph *irg = get_irn_irg(block); 3633 ir_op *op = op_arm_Jmp; 3634 arch_irn_flags_t irn_flags_ = arch_irn_flags_none; 3635 ir_node *res; 3636 backend_info_t *info; 3637 int arity = 0; 3638 ir_node **in = NULL; 3639 int n_res = 1; 3640 ir_mode *mode = mode_X; 3641 static const arch_register_req_t **in_reqs = NULL; 3642 3643 /* flags */ 3644 irn_flags_ |= arch_irn_flags_simple_jump; 3645 3646 /* create node */ 3647 assert(op != NULL); 3648 res = new_ir_node(dbgi, irg, block, op, mode, arity, in); 3649 3650 /* init node attributes */ 3651 init_arm_attributes(res, irn_flags_, in_reqs, n_res); 3652 3653 info = be_get_info(res); 3654 (void) info; /* avoid potential warning */ 3655 info->out_infos[0].req = &arm_requirements__none; 3656 3657 3658 /* optimize node */ 3659 res = optimize_node(res); 3660 irn_verify_irg(res, irg); 3661 3662 return res; 3663} 3664 3665 3666 3667/** 3668 * Creates the arm specific Firm machine operations 3669 * needed for the assembler irgs. 3670 */ 3671void arm_create_opcodes(const arch_irn_ops_t *be_ops) 3672{ 3673 ir_op *op; 3674 int cur_opcode = get_next_ir_opcodes(iro_arm_last); 3675 3676 arm_opcode_start = cur_opcode; 3677 op = new_ir_op(cur_opcode + iro_arm_fConst, "arm_fConst", op_pin_state_floats, irop_flag_constlike, oparity_zero, 0, sizeof(arm_fConst_attr_t)); 3678 op->ops.be_ops = be_ops; 3679 op->ops.dump_node = arm_dump_node; 3680 op->ops.node_cmp_attr = cmp_attr_arm_fConst; 3681 op->ops.copy_attr = arm_copy_attr; 3682 set_op_tag(op, arm_op_tag); 3683 op_arm_fConst = op; 3684 op = new_ir_op(cur_opcode + iro_arm_Mvf, "arm_Mvf", op_pin_state_floats, irop_flag_none, oparity_unary, 0, sizeof(arm_farith_attr_t)); 3685 op->ops.be_ops = be_ops; 3686 op->ops.dump_node = arm_dump_node; 3687 op->ops.node_cmp_attr = cmp_attr_arm_farith; 3688 op->ops.copy_attr = arm_copy_attr; 3689 set_op_tag(op, arm_op_tag); 3690 op_arm_Mvf = op; 3691 op = new_ir_op(cur_opcode + iro_arm_Ldr, "arm_Ldr", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_binary, 0, sizeof(arm_load_store_attr_t)); 3692 op->ops.be_ops = be_ops; 3693 op->ops.dump_node = arm_dump_node; 3694 op->ops.node_cmp_attr = cmp_attr_arm_load_store; 3695 op->ops.copy_attr = arm_copy_attr; 3696 set_op_tag(op, arm_op_tag); 3697 op_arm_Ldr = op; 3698 op = new_ir_op(cur_opcode + iro_arm_Rsb, "arm_Rsb", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_shifter_operand_t)); 3699 op->ops.be_ops = be_ops; 3700 op->ops.dump_node = arm_dump_node; 3701 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3702 op->ops.copy_attr = arm_copy_attr; 3703 set_op_tag(op, arm_op_tag); 3704 op_arm_Rsb = op; 3705 op = new_ir_op(cur_opcode + iro_arm_Mla, "arm_Mla", op_pin_state_floats, irop_flag_none, oparity_trinary, 0, sizeof(arm_attr_t)); 3706 op->ops.be_ops = be_ops; 3707 op->ops.dump_node = arm_dump_node; 3708 op->ops.node_cmp_attr = cmp_attr_arm; 3709 op->ops.copy_attr = arm_copy_attr; 3710 set_op_tag(op, arm_op_tag); 3711 op_arm_Mla = op; 3712 op = new_ir_op(cur_opcode + iro_arm_LinkMovPC, "arm_LinkMovPC", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, 0, sizeof(arm_shifter_operand_t)); 3713 op->ops.be_ops = be_ops; 3714 op->ops.dump_node = arm_dump_node; 3715 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3716 op->ops.copy_attr = arm_copy_attr; 3717 set_op_tag(op, arm_op_tag); 3718 op_arm_LinkMovPC = op; 3719 op = new_ir_op(cur_opcode + iro_arm_Mov, "arm_Mov", op_pin_state_floats, irop_flag_none, oparity_variable, 0, sizeof(arm_shifter_operand_t)); 3720 op->ops.be_ops = be_ops; 3721 op->ops.dump_node = arm_dump_node; 3722 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3723 op->ops.copy_attr = arm_copy_attr; 3724 set_op_tag(op, arm_op_tag); 3725 op_arm_Mov = op; 3726 op = new_ir_op(cur_opcode + iro_arm_FltX, "arm_FltX", op_pin_state_floats, irop_flag_none, oparity_unary, 0, sizeof(arm_farith_attr_t)); 3727 op->ops.be_ops = be_ops; 3728 op->ops.dump_node = arm_dump_node; 3729 op->ops.node_cmp_attr = cmp_attr_arm_farith; 3730 op->ops.copy_attr = arm_copy_attr; 3731 set_op_tag(op, arm_op_tag); 3732 op_arm_FltX = op; 3733 op = new_ir_op(cur_opcode + iro_arm_Or, "arm_Or", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_shifter_operand_t)); 3734 op->ops.be_ops = be_ops; 3735 op->ops.dump_node = arm_dump_node; 3736 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3737 op->ops.copy_attr = arm_copy_attr; 3738 set_op_tag(op, arm_op_tag); 3739 op_arm_Or = op; 3740 op = new_ir_op(cur_opcode + iro_arm_EmptyReg, "arm_EmptyReg", op_pin_state_floats, irop_flag_constlike, oparity_zero, 0, sizeof(arm_attr_t)); 3741 op->ops.be_ops = be_ops; 3742 op->ops.dump_node = arm_dump_node; 3743 op->ops.node_cmp_attr = cmp_attr_arm_EmptyReg; 3744 op->ops.copy_attr = arm_copy_attr; 3745 set_op_tag(op, arm_op_tag); 3746 op_arm_EmptyReg = op; 3747 op = new_ir_op(cur_opcode + iro_arm_Cmp, "arm_Cmp", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_cmp_attr_t)); 3748 op->ops.be_ops = be_ops; 3749 op->ops.dump_node = arm_dump_node; 3750 op->ops.node_cmp_attr = cmp_attr_arm_cmp; 3751 op->ops.copy_attr = arm_copy_attr; 3752 set_op_tag(op, arm_op_tag); 3753 op_arm_Cmp = op; 3754 op = new_ir_op(cur_opcode + iro_arm_Smull, "arm_Smull", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_attr_t)); 3755 op->ops.be_ops = be_ops; 3756 op->ops.dump_node = arm_dump_node; 3757 op->ops.node_cmp_attr = cmp_attr_arm; 3758 op->ops.copy_attr = arm_copy_attr; 3759 set_op_tag(op, arm_op_tag); 3760 op_arm_Smull = op; 3761 op = new_ir_op(cur_opcode + iro_arm_Add, "arm_Add", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_shifter_operand_t)); 3762 op->ops.be_ops = be_ops; 3763 op->ops.dump_node = arm_dump_node; 3764 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3765 op->ops.copy_attr = arm_copy_attr; 3766 set_op_tag(op, arm_op_tag); 3767 op_arm_Add = op; 3768 op = new_ir_op(cur_opcode + iro_arm_LinkLdrPC, "arm_LinkLdrPC", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, 0, sizeof(arm_load_store_attr_t)); 3769 op->ops.be_ops = be_ops; 3770 op->ops.dump_node = arm_dump_node; 3771 op->ops.node_cmp_attr = cmp_attr_arm_load_store; 3772 op->ops.copy_attr = arm_copy_attr; 3773 set_op_tag(op, arm_op_tag); 3774 op_arm_LinkLdrPC = op; 3775 op = new_ir_op(cur_opcode + iro_arm_Ldf, "arm_Ldf", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_binary, 0, sizeof(arm_load_store_attr_t)); 3776 op->ops.be_ops = be_ops; 3777 op->ops.dump_node = arm_dump_node; 3778 op->ops.node_cmp_attr = cmp_attr_arm_load_store; 3779 op->ops.copy_attr = arm_copy_attr; 3780 set_op_tag(op, arm_op_tag); 3781 op_arm_Ldf = op; 3782 op = new_ir_op(cur_opcode + iro_arm_Mvn, "arm_Mvn", op_pin_state_floats, irop_flag_none, oparity_variable, 0, sizeof(arm_shifter_operand_t)); 3783 op->ops.be_ops = be_ops; 3784 op->ops.dump_node = arm_dump_node; 3785 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3786 op->ops.copy_attr = arm_copy_attr; 3787 set_op_tag(op, arm_op_tag); 3788 op_arm_Mvn = op; 3789 op = new_ir_op(cur_opcode + iro_arm_B, "arm_B", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_unary, 0, sizeof(arm_CondJmp_attr_t)); 3790 op->ops.be_ops = be_ops; 3791 op->ops.dump_node = arm_dump_node; 3792 op->ops.node_cmp_attr = cmp_attr_arm_CondJmp; 3793 op->ops.copy_attr = arm_copy_attr; 3794 set_op_tag(op, arm_op_tag); 3795 op_arm_B = op; 3796 op = new_ir_op(cur_opcode + iro_arm_LoadStackM3Epilogue, "arm_LoadStackM3Epilogue", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_binary, 0, sizeof(arm_attr_t)); 3797 op->ops.be_ops = be_ops; 3798 op->ops.dump_node = arm_dump_node; 3799 op->ops.node_cmp_attr = cmp_attr_arm; 3800 op->ops.copy_attr = arm_copy_attr; 3801 set_op_tag(op, arm_op_tag); 3802 op_arm_LoadStackM3Epilogue = op; 3803 op = new_ir_op(cur_opcode + iro_arm_Tst, "arm_Tst", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_cmp_attr_t)); 3804 op->ops.be_ops = be_ops; 3805 op->ops.dump_node = arm_dump_node; 3806 op->ops.node_cmp_attr = cmp_attr_arm_cmp; 3807 op->ops.copy_attr = arm_copy_attr; 3808 set_op_tag(op, arm_op_tag); 3809 op_arm_Tst = op; 3810 op = new_ir_op(cur_opcode + iro_arm_Umull, "arm_Umull", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_attr_t)); 3811 op->ops.be_ops = be_ops; 3812 op->ops.dump_node = arm_dump_node; 3813 op->ops.node_cmp_attr = cmp_attr_arm; 3814 op->ops.copy_attr = arm_copy_attr; 3815 set_op_tag(op, arm_op_tag); 3816 op_arm_Umull = op; 3817 op = new_ir_op(cur_opcode + iro_arm_Bic, "arm_Bic", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_shifter_operand_t)); 3818 op->ops.be_ops = be_ops; 3819 op->ops.dump_node = arm_dump_node; 3820 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3821 op->ops.copy_attr = arm_copy_attr; 3822 set_op_tag(op, arm_op_tag); 3823 op_arm_Bic = op; 3824 op = new_ir_op(cur_opcode + iro_arm_Sub, "arm_Sub", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_shifter_operand_t)); 3825 op->ops.be_ops = be_ops; 3826 op->ops.dump_node = arm_dump_node; 3827 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3828 op->ops.copy_attr = arm_copy_attr; 3829 set_op_tag(op, arm_op_tag); 3830 op_arm_Sub = op; 3831 op = new_ir_op(cur_opcode + iro_arm_Mul, "arm_Mul", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_attr_t)); 3832 op->ops.be_ops = be_ops; 3833 op->ops.dump_node = arm_dump_node; 3834 op->ops.node_cmp_attr = cmp_attr_arm; 3835 op->ops.copy_attr = arm_copy_attr; 3836 set_op_tag(op, arm_op_tag); 3837 op_arm_Mul = op; 3838 op = new_ir_op(cur_opcode + iro_arm_Adf, "arm_Adf", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_farith_attr_t)); 3839 op->ops.be_ops = be_ops; 3840 op->ops.dump_node = arm_dump_node; 3841 op->ops.node_cmp_attr = cmp_attr_arm_farith; 3842 op->ops.copy_attr = arm_copy_attr; 3843 set_op_tag(op, arm_op_tag); 3844 op_arm_Adf = op; 3845 op = new_ir_op(cur_opcode + iro_arm_Bl, "arm_Bl", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, 0, sizeof(arm_SymConst_attr_t)); 3846 op->ops.be_ops = be_ops; 3847 op->ops.dump_node = arm_dump_node; 3848 op->ops.node_cmp_attr = cmp_attr_arm_SymConst; 3849 op->ops.copy_attr = arm_copy_attr; 3850 set_op_tag(op, arm_op_tag); 3851 op_arm_Bl = op; 3852 op = new_ir_op(cur_opcode + iro_arm_Stf, "arm_Stf", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_trinary, 0, sizeof(arm_load_store_attr_t)); 3853 op->ops.be_ops = be_ops; 3854 op->ops.dump_node = arm_dump_node; 3855 op->ops.node_cmp_attr = cmp_attr_arm_load_store; 3856 op->ops.copy_attr = arm_copy_attr; 3857 set_op_tag(op, arm_op_tag); 3858 op_arm_Stf = op; 3859 op = new_ir_op(cur_opcode + iro_arm_Clz, "arm_Clz", op_pin_state_floats, irop_flag_none, oparity_unary, 0, sizeof(arm_attr_t)); 3860 op->ops.be_ops = be_ops; 3861 op->ops.dump_node = arm_dump_node; 3862 op->ops.node_cmp_attr = cmp_attr_arm; 3863 op->ops.copy_attr = arm_copy_attr; 3864 set_op_tag(op, arm_op_tag); 3865 op_arm_Clz = op; 3866 op = new_ir_op(cur_opcode + iro_arm_Suf, "arm_Suf", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_farith_attr_t)); 3867 op->ops.be_ops = be_ops; 3868 op->ops.dump_node = arm_dump_node; 3869 op->ops.node_cmp_attr = cmp_attr_arm_farith; 3870 op->ops.copy_attr = arm_copy_attr; 3871 set_op_tag(op, arm_op_tag); 3872 op_arm_Suf = op; 3873 op = new_ir_op(cur_opcode + iro_arm_Cmfe, "arm_Cmfe", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_cmp_attr_t)); 3874 op->ops.be_ops = be_ops; 3875 op->ops.dump_node = arm_dump_node; 3876 op->ops.node_cmp_attr = cmp_attr_arm_cmp; 3877 op->ops.copy_attr = arm_copy_attr; 3878 set_op_tag(op, arm_op_tag); 3879 op_arm_Cmfe = op; 3880 op = new_ir_op(cur_opcode + iro_arm_CopyB, "arm_CopyB", op_pin_state_pinned, irop_flag_none, oparity_any, 0, sizeof(arm_CopyB_attr_t)); 3881 op->ops.be_ops = be_ops; 3882 op->ops.dump_node = arm_dump_node; 3883 op->ops.node_cmp_attr = cmp_attr_arm_CopyB; 3884 op->ops.copy_attr = arm_copy_attr; 3885 set_op_tag(op, arm_op_tag); 3886 op_arm_CopyB = op; 3887 op = new_ir_op(cur_opcode + iro_arm_FrameAddr, "arm_FrameAddr", op_pin_state_floats, irop_flag_constlike, oparity_unary, 0, sizeof(arm_SymConst_attr_t)); 3888 op->ops.be_ops = be_ops; 3889 op->ops.dump_node = arm_dump_node; 3890 op->ops.node_cmp_attr = cmp_attr_arm_SymConst; 3891 op->ops.copy_attr = arm_copy_attr; 3892 set_op_tag(op, arm_op_tag); 3893 op_arm_FrameAddr = op; 3894 op = new_ir_op(cur_opcode + iro_arm_And, "arm_And", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_shifter_operand_t)); 3895 op->ops.be_ops = be_ops; 3896 op->ops.dump_node = arm_dump_node; 3897 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3898 op->ops.copy_attr = arm_copy_attr; 3899 set_op_tag(op, arm_op_tag); 3900 op_arm_And = op; 3901 op = new_ir_op(cur_opcode + iro_arm_Str, "arm_Str", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_trinary, 0, sizeof(arm_load_store_attr_t)); 3902 op->ops.be_ops = be_ops; 3903 op->ops.dump_node = arm_dump_node; 3904 op->ops.node_cmp_attr = cmp_attr_arm_load_store; 3905 op->ops.copy_attr = arm_copy_attr; 3906 set_op_tag(op, arm_op_tag); 3907 op_arm_Str = op; 3908 op = new_ir_op(cur_opcode + iro_arm_Dvf, "arm_Dvf", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_farith_attr_t)); 3909 op->ops.be_ops = be_ops; 3910 op->ops.dump_node = arm_dump_node; 3911 op->ops.node_cmp_attr = cmp_attr_arm_farith; 3912 op->ops.copy_attr = arm_copy_attr; 3913 set_op_tag(op, arm_op_tag); 3914 op_arm_Dvf = op; 3915 op = new_ir_op(cur_opcode + iro_arm_SwitchJmp, "arm_SwitchJmp", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_unary, 0, sizeof(arm_SwitchJmp_attr_t)); 3916 op->ops.be_ops = be_ops; 3917 op->ops.dump_node = arm_dump_node; 3918 op->ops.node_cmp_attr = cmp_attr_arm_SwitchJmp; 3919 op->ops.copy_attr = arm_copy_attr; 3920 set_op_tag(op, arm_op_tag); 3921 op_arm_SwitchJmp = op; 3922 op = new_ir_op(cur_opcode + iro_arm_StoreStackM4Inc, "arm_StoreStackM4Inc", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, 0, sizeof(arm_attr_t)); 3923 op->ops.be_ops = be_ops; 3924 op->ops.dump_node = arm_dump_node; 3925 op->ops.node_cmp_attr = cmp_attr_arm; 3926 op->ops.copy_attr = arm_copy_attr; 3927 set_op_tag(op, arm_op_tag); 3928 op_arm_StoreStackM4Inc = op; 3929 op = new_ir_op(cur_opcode + iro_arm_Muf, "arm_Muf", op_pin_state_floats, irop_flag_none, oparity_binary, 0, sizeof(arm_farith_attr_t)); 3930 op->ops.be_ops = be_ops; 3931 op->ops.dump_node = arm_dump_node; 3932 op->ops.node_cmp_attr = cmp_attr_arm_farith; 3933 op->ops.copy_attr = arm_copy_attr; 3934 set_op_tag(op, arm_op_tag); 3935 op_arm_Muf = op; 3936 op = new_ir_op(cur_opcode + iro_arm_SymConst, "arm_SymConst", op_pin_state_floats, irop_flag_constlike, oparity_zero, 0, sizeof(arm_SymConst_attr_t)); 3937 op->ops.be_ops = be_ops; 3938 op->ops.dump_node = arm_dump_node; 3939 op->ops.node_cmp_attr = cmp_attr_arm_SymConst; 3940 op->ops.copy_attr = arm_copy_attr; 3941 set_op_tag(op, arm_op_tag); 3942 op_arm_SymConst = op; 3943 op = new_ir_op(cur_opcode + iro_arm_Eor, "arm_Eor", op_pin_state_floats, irop_flag_none, oparity_zero, 0, sizeof(arm_shifter_operand_t)); 3944 op->ops.be_ops = be_ops; 3945 op->ops.dump_node = arm_dump_node; 3946 op->ops.node_cmp_attr = cmp_attr_arm_shifter_operand; 3947 op->ops.copy_attr = arm_copy_attr; 3948 set_op_tag(op, arm_op_tag); 3949 op_arm_Eor = op; 3950 op = new_ir_op(cur_opcode + iro_arm_Jmp, "arm_Jmp", op_pin_state_pinned, irop_flag_cfopcode, oparity_zero, 0, sizeof(arm_attr_t)); 3951 op->ops.be_ops = be_ops; 3952 op->ops.dump_node = arm_dump_node; 3953 op->ops.node_cmp_attr = cmp_attr_arm; 3954 op->ops.copy_attr = arm_copy_attr; 3955 set_op_tag(op, arm_op_tag); 3956 op_arm_Jmp = op; 3957 3958 arm_opcode_end = cur_opcode + iro_arm_last; 3959} 3960 3961void arm_free_opcodes(void) 3962{ 3963 free_ir_op(op_arm_fConst); op_arm_fConst = NULL; 3964 free_ir_op(op_arm_Mvf); op_arm_Mvf = NULL; 3965 free_ir_op(op_arm_Ldr); op_arm_Ldr = NULL; 3966 free_ir_op(op_arm_Rsb); op_arm_Rsb = NULL; 3967 free_ir_op(op_arm_Mla); op_arm_Mla = NULL; 3968 free_ir_op(op_arm_LinkMovPC); op_arm_LinkMovPC = NULL; 3969 free_ir_op(op_arm_Mov); op_arm_Mov = NULL; 3970 free_ir_op(op_arm_FltX); op_arm_FltX = NULL; 3971 free_ir_op(op_arm_Or); op_arm_Or = NULL; 3972 free_ir_op(op_arm_EmptyReg); op_arm_EmptyReg = NULL; 3973 free_ir_op(op_arm_Cmp); op_arm_Cmp = NULL; 3974 free_ir_op(op_arm_Smull); op_arm_Smull = NULL; 3975 free_ir_op(op_arm_Add); op_arm_Add = NULL; 3976 free_ir_op(op_arm_LinkLdrPC); op_arm_LinkLdrPC = NULL; 3977 free_ir_op(op_arm_Ldf); op_arm_Ldf = NULL; 3978 free_ir_op(op_arm_Mvn); op_arm_Mvn = NULL; 3979 free_ir_op(op_arm_B); op_arm_B = NULL; 3980 free_ir_op(op_arm_LoadStackM3Epilogue); op_arm_LoadStackM3Epilogue = NULL; 3981 free_ir_op(op_arm_Tst); op_arm_Tst = NULL; 3982 free_ir_op(op_arm_Umull); op_arm_Umull = NULL; 3983 free_ir_op(op_arm_Bic); op_arm_Bic = NULL; 3984 free_ir_op(op_arm_Sub); op_arm_Sub = NULL; 3985 free_ir_op(op_arm_Mul); op_arm_Mul = NULL; 3986 free_ir_op(op_arm_Adf); op_arm_Adf = NULL; 3987 free_ir_op(op_arm_Bl); op_arm_Bl = NULL; 3988 free_ir_op(op_arm_Stf); op_arm_Stf = NULL; 3989 free_ir_op(op_arm_Clz); op_arm_Clz = NULL; 3990 free_ir_op(op_arm_Suf); op_arm_Suf = NULL; 3991 free_ir_op(op_arm_Cmfe); op_arm_Cmfe = NULL; 3992 free_ir_op(op_arm_CopyB); op_arm_CopyB = NULL; 3993 free_ir_op(op_arm_FrameAddr); op_arm_FrameAddr = NULL; 3994 free_ir_op(op_arm_And); op_arm_And = NULL; 3995 free_ir_op(op_arm_Str); op_arm_Str = NULL; 3996 free_ir_op(op_arm_Dvf); op_arm_Dvf = NULL; 3997 free_ir_op(op_arm_SwitchJmp); op_arm_SwitchJmp = NULL; 3998 free_ir_op(op_arm_StoreStackM4Inc); op_arm_StoreStackM4Inc = NULL; 3999 free_ir_op(op_arm_Muf); op_arm_Muf = NULL; 4000 free_ir_op(op_arm_SymConst); op_arm_SymConst = NULL; 4001 free_ir_op(op_arm_Eor); op_arm_Eor = NULL; 4002 free_ir_op(op_arm_Jmp); op_arm_Jmp = NULL; 4003} 4004