1 /* $NetBSD: nouveau_chan.c,v 1.7 2021/12/18 23:45:32 riastradh Exp $ */
2
3 /*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: nouveau_chan.c,v 1.7 2021/12/18 23:45:32 riastradh Exp $");
29
30 #include <nvif/os.h>
31 #include <nvif/class.h>
32 #include <nvif/cl0002.h>
33 #include <nvif/cl006b.h>
34 #include <nvif/cl506f.h>
35 #include <nvif/cl906f.h>
36 #include <nvif/cla06f.h>
37 #include <nvif/clc36f.h>
38 #include <nvif/ioctl.h>
39
40 /*XXX*/
41 #include <core/client.h>
42
43 #include "nouveau_drv.h"
44 #include "nouveau_dma.h"
45 #include "nouveau_bo.h"
46 #include "nouveau_chan.h"
47 #include "nouveau_fence.h"
48 #include "nouveau_abi16.h"
49 #include "nouveau_vmm.h"
50 #include "nouveau_svm.h"
51
52 MODULE_PARM_DESC(vram_pushbuf, "Create DMA push buffers in VRAM");
53 int nouveau_vram_pushbuf;
54 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
55
56 static int
nouveau_channel_killed(struct nvif_notify * ntfy)57 nouveau_channel_killed(struct nvif_notify *ntfy)
58 {
59 struct nouveau_channel *chan = container_of(ntfy, typeof(*chan), kill);
60 struct nouveau_cli *cli = (void *)chan->user.client;
61 NV_PRINTK(warn, cli, "channel %d killed!\n", chan->chid);
62 atomic_set(&chan->killed, 1);
63 if (chan->fence)
64 nouveau_fence_context_kill(chan->fence, -ENODEV);
65 return NVIF_NOTIFY_DROP;
66 }
67
68 int
nouveau_channel_idle(struct nouveau_channel * chan)69 nouveau_channel_idle(struct nouveau_channel *chan)
70 {
71 if (likely(chan && chan->fence && !atomic_read(&chan->killed))) {
72 struct nouveau_cli *cli = (void *)chan->user.client;
73 struct nouveau_fence *fence = NULL;
74 int ret;
75
76 ret = nouveau_fence_new(chan, false, &fence);
77 if (!ret) {
78 ret = nouveau_fence_wait(fence, false, false);
79 nouveau_fence_unref(&fence);
80 }
81
82 if (ret) {
83 NV_PRINTK(err, cli, "failed to idle channel %d [%s]\n",
84 chan->chid, nvxx_client(&cli->base)->name);
85 return ret;
86 }
87 }
88 return 0;
89 }
90
91 void
nouveau_channel_del(struct nouveau_channel ** pchan)92 nouveau_channel_del(struct nouveau_channel **pchan)
93 {
94 struct nouveau_channel *chan = *pchan;
95 if (chan) {
96 struct nouveau_cli *cli = (void *)chan->user.client;
97 bool super;
98
99 if (cli) {
100 super = cli->base.super;
101 cli->base.super = true;
102 }
103
104 if (chan->fence)
105 nouveau_fence(chan->drm)->context_del(chan);
106
107 if (cli)
108 nouveau_svmm_part(chan->vmm->svmm, chan->inst);
109
110 nvif_object_fini(&chan->nvsw);
111 nvif_object_fini(&chan->gart);
112 nvif_object_fini(&chan->vram);
113 nvif_notify_fini(&chan->kill);
114 nvif_object_fini(&chan->user);
115 nvif_object_fini(&chan->push.ctxdma);
116 nouveau_vma_del(&chan->push.vma);
117 nouveau_bo_unmap(chan->push.buffer);
118 if (chan->push.buffer && chan->push.buffer->pin_refcnt)
119 nouveau_bo_unpin(chan->push.buffer);
120 nouveau_bo_ref(NULL, &chan->push.buffer);
121 kfree(chan);
122
123 if (cli)
124 cli->base.super = super;
125 }
126 *pchan = NULL;
127 }
128
129 static int
nouveau_channel_prep(struct nouveau_drm * drm,struct nvif_device * device,u32 size,struct nouveau_channel ** pchan)130 nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
131 u32 size, struct nouveau_channel **pchan)
132 {
133 struct nouveau_cli *cli = (void *)device->object.client;
134 struct nv_dma_v0 args = {};
135 struct nouveau_channel *chan;
136 u32 target;
137 int ret;
138
139 chan = *pchan = kzalloc(sizeof(*chan), GFP_KERNEL);
140 if (!chan)
141 return -ENOMEM;
142
143 chan->device = device;
144 chan->drm = drm;
145 chan->vmm = cli->svm.cli ? &cli->svm : &cli->vmm;
146 atomic_set(&chan->killed, 0);
147
148 /* allocate memory for dma push buffer */
149 target = TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED;
150 if (nouveau_vram_pushbuf)
151 target = TTM_PL_FLAG_VRAM;
152
153 ret = nouveau_bo_new(cli, size, 0, target, 0, 0, NULL, NULL,
154 &chan->push.buffer);
155 if (ret == 0) {
156 ret = nouveau_bo_pin(chan->push.buffer, target, false);
157 if (ret == 0)
158 ret = nouveau_bo_map(chan->push.buffer);
159 }
160
161 if (ret) {
162 nouveau_channel_del(pchan);
163 return ret;
164 }
165
166 /* create dma object covering the *entire* memory space that the
167 * pushbuf lives in, this is because the GEM code requires that
168 * we be able to call out to other (indirect) push buffers
169 */
170 chan->push.addr = chan->push.buffer->bo.offset;
171
172 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
173 ret = nouveau_vma_new(chan->push.buffer, chan->vmm,
174 &chan->push.vma);
175 if (ret) {
176 nouveau_channel_del(pchan);
177 return ret;
178 }
179
180 chan->push.addr = chan->push.vma->addr;
181
182 if (device->info.family >= NV_DEVICE_INFO_V0_FERMI)
183 return 0;
184
185 args.target = NV_DMA_V0_TARGET_VM;
186 args.access = NV_DMA_V0_ACCESS_VM;
187 args.start = 0;
188 args.limit = chan->vmm->vmm.limit - 1;
189 } else
190 if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) {
191 if (device->info.family == NV_DEVICE_INFO_V0_TNT) {
192 /* nv04 vram pushbuf hack, retarget to its location in
193 * the framebuffer bar rather than direct vram access..
194 * nfi why this exists, it came from the -nv ddx.
195 */
196 args.target = NV_DMA_V0_TARGET_PCI;
197 args.access = NV_DMA_V0_ACCESS_RDWR;
198 args.start = nvxx_device(device)->func->
199 resource_addr(nvxx_device(device), 1);
200 args.limit = args.start + device->info.ram_user - 1;
201 } else {
202 args.target = NV_DMA_V0_TARGET_VRAM;
203 args.access = NV_DMA_V0_ACCESS_RDWR;
204 args.start = 0;
205 args.limit = device->info.ram_user - 1;
206 }
207 } else {
208 if (chan->drm->agp.bridge) {
209 args.target = NV_DMA_V0_TARGET_AGP;
210 args.access = NV_DMA_V0_ACCESS_RDWR;
211 args.start = chan->drm->agp.base;
212 args.limit = chan->drm->agp.base +
213 chan->drm->agp.size - 1;
214 } else {
215 args.target = NV_DMA_V0_TARGET_VM;
216 args.access = NV_DMA_V0_ACCESS_RDWR;
217 args.start = 0;
218 args.limit = chan->vmm->vmm.limit - 1;
219 }
220 }
221
222 ret = nvif_object_init(&device->object, 0, NV_DMA_FROM_MEMORY,
223 &args, sizeof(args), &chan->push.ctxdma);
224 if (ret) {
225 nouveau_channel_del(pchan);
226 return ret;
227 }
228
229 return 0;
230 }
231
232 static int
nouveau_channel_ind(struct nouveau_drm * drm,struct nvif_device * device,u64 runlist,bool priv,struct nouveau_channel ** pchan)233 nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
234 u64 runlist, bool priv, struct nouveau_channel **pchan)
235 {
236 static const u16 oclasses[] = { TURING_CHANNEL_GPFIFO_A,
237 VOLTA_CHANNEL_GPFIFO_A,
238 PASCAL_CHANNEL_GPFIFO_A,
239 MAXWELL_CHANNEL_GPFIFO_A,
240 KEPLER_CHANNEL_GPFIFO_B,
241 KEPLER_CHANNEL_GPFIFO_A,
242 FERMI_CHANNEL_GPFIFO,
243 G82_CHANNEL_GPFIFO,
244 NV50_CHANNEL_GPFIFO,
245 0 };
246 const u16 *oclass = oclasses;
247 union {
248 struct nv50_channel_gpfifo_v0 nv50;
249 struct fermi_channel_gpfifo_v0 fermi;
250 struct kepler_channel_gpfifo_a_v0 kepler;
251 struct volta_channel_gpfifo_a_v0 volta;
252 } args;
253 struct nouveau_channel *chan;
254 u32 size;
255 int ret;
256
257 /* allocate dma push buffer */
258 ret = nouveau_channel_prep(drm, device, 0x12000, &chan);
259 *pchan = chan;
260 if (ret)
261 return ret;
262
263 /* create channel object */
264 do {
265 if (oclass[0] >= VOLTA_CHANNEL_GPFIFO_A) {
266 args.volta.version = 0;
267 args.volta.ilength = 0x02000;
268 args.volta.ioffset = 0x10000 + chan->push.addr;
269 args.volta.runlist = runlist;
270 args.volta.vmm = nvif_handle(&chan->vmm->vmm.object);
271 args.volta.priv = priv;
272 size = sizeof(args.volta);
273 } else
274 if (oclass[0] >= KEPLER_CHANNEL_GPFIFO_A) {
275 args.kepler.version = 0;
276 args.kepler.ilength = 0x02000;
277 args.kepler.ioffset = 0x10000 + chan->push.addr;
278 args.kepler.runlist = runlist;
279 args.kepler.vmm = nvif_handle(&chan->vmm->vmm.object);
280 args.kepler.priv = priv;
281 size = sizeof(args.kepler);
282 } else
283 if (oclass[0] >= FERMI_CHANNEL_GPFIFO) {
284 args.fermi.version = 0;
285 args.fermi.ilength = 0x02000;
286 args.fermi.ioffset = 0x10000 + chan->push.addr;
287 args.fermi.vmm = nvif_handle(&chan->vmm->vmm.object);
288 size = sizeof(args.fermi);
289 } else {
290 args.nv50.version = 0;
291 args.nv50.ilength = 0x02000;
292 args.nv50.ioffset = 0x10000 + chan->push.addr;
293 args.nv50.pushbuf = nvif_handle(&chan->push.ctxdma);
294 args.nv50.vmm = nvif_handle(&chan->vmm->vmm.object);
295 size = sizeof(args.nv50);
296 }
297
298 ret = nvif_object_init(&device->object, 0, *oclass++,
299 &args, size, &chan->user);
300 if (ret == 0) {
301 if (chan->user.oclass >= VOLTA_CHANNEL_GPFIFO_A) {
302 chan->chid = args.volta.chid;
303 chan->inst = args.volta.inst;
304 chan->token = args.volta.token;
305 } else
306 if (chan->user.oclass >= KEPLER_CHANNEL_GPFIFO_A) {
307 chan->chid = args.kepler.chid;
308 chan->inst = args.kepler.inst;
309 } else
310 if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO) {
311 chan->chid = args.fermi.chid;
312 } else {
313 chan->chid = args.nv50.chid;
314 }
315 return ret;
316 }
317 } while (*oclass);
318
319 nouveau_channel_del(pchan);
320 return ret;
321 }
322
323 static int
nouveau_channel_dma(struct nouveau_drm * drm,struct nvif_device * device,struct nouveau_channel ** pchan)324 nouveau_channel_dma(struct nouveau_drm *drm, struct nvif_device *device,
325 struct nouveau_channel **pchan)
326 {
327 static const u16 oclasses[] = { NV40_CHANNEL_DMA,
328 NV17_CHANNEL_DMA,
329 NV10_CHANNEL_DMA,
330 NV03_CHANNEL_DMA,
331 0 };
332 const u16 *oclass = oclasses;
333 struct nv03_channel_dma_v0 args;
334 struct nouveau_channel *chan;
335 int ret;
336
337 /* allocate dma push buffer */
338 ret = nouveau_channel_prep(drm, device, 0x10000, &chan);
339 *pchan = chan;
340 if (ret)
341 return ret;
342
343 /* create channel object */
344 args.version = 0;
345 args.pushbuf = nvif_handle(&chan->push.ctxdma);
346 args.offset = chan->push.addr;
347
348 do {
349 ret = nvif_object_init(&device->object, 0, *oclass++,
350 &args, sizeof(args), &chan->user);
351 if (ret == 0) {
352 chan->chid = args.chid;
353 return ret;
354 }
355 } while (ret && *oclass);
356
357 nouveau_channel_del(pchan);
358 return ret;
359 }
360
361 static int
nouveau_channel_init(struct nouveau_channel * chan,u32 vram,u32 gart)362 nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
363 {
364 struct nvif_device *device = chan->device;
365 struct nouveau_drm *drm = chan->drm;
366 struct nv_dma_v0 args = {};
367 int ret, i;
368
369 nvif_object_map(&chan->user, NULL, 0);
370
371 if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO) {
372 ret = nvif_notify_init(&chan->user, nouveau_channel_killed,
373 true, NV906F_V0_NTFY_KILLED,
374 NULL, 0, 0, &chan->kill);
375 if (ret == 0)
376 ret = nvif_notify_get(&chan->kill);
377 if (ret) {
378 NV_ERROR(drm, "Failed to request channel kill "
379 "notification: %d\n", ret);
380 return ret;
381 }
382 }
383
384 /* allocate dma objects to cover all allowed vram, and gart */
385 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
386 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
387 args.target = NV_DMA_V0_TARGET_VM;
388 args.access = NV_DMA_V0_ACCESS_VM;
389 args.start = 0;
390 args.limit = chan->vmm->vmm.limit - 1;
391 } else {
392 args.target = NV_DMA_V0_TARGET_VRAM;
393 args.access = NV_DMA_V0_ACCESS_RDWR;
394 args.start = 0;
395 args.limit = device->info.ram_user - 1;
396 }
397
398 ret = nvif_object_init(&chan->user, vram, NV_DMA_IN_MEMORY,
399 &args, sizeof(args), &chan->vram);
400 if (ret)
401 return ret;
402
403 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
404 args.target = NV_DMA_V0_TARGET_VM;
405 args.access = NV_DMA_V0_ACCESS_VM;
406 args.start = 0;
407 args.limit = chan->vmm->vmm.limit - 1;
408 } else
409 if (chan->drm->agp.bridge) {
410 args.target = NV_DMA_V0_TARGET_AGP;
411 args.access = NV_DMA_V0_ACCESS_RDWR;
412 args.start = chan->drm->agp.base;
413 args.limit = chan->drm->agp.base +
414 chan->drm->agp.size - 1;
415 } else {
416 args.target = NV_DMA_V0_TARGET_VM;
417 args.access = NV_DMA_V0_ACCESS_RDWR;
418 args.start = 0;
419 args.limit = chan->vmm->vmm.limit - 1;
420 }
421
422 ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY,
423 &args, sizeof(args), &chan->gart);
424 if (ret)
425 return ret;
426 }
427
428 /* initialise dma tracking parameters */
429 switch (chan->user.oclass & 0x00ff) {
430 case 0x006b:
431 case 0x006e:
432 chan->user_put = 0x40;
433 chan->user_get = 0x44;
434 chan->dma.max = (0x10000 / 4) - 2;
435 break;
436 default:
437 chan->user_put = 0x40;
438 chan->user_get = 0x44;
439 chan->user_get_hi = 0x60;
440 chan->dma.ib_base = 0x10000 / 4;
441 chan->dma.ib_max = (0x02000 / 8) - 1;
442 chan->dma.ib_put = 0;
443 chan->dma.ib_free = chan->dma.ib_max - chan->dma.ib_put;
444 chan->dma.max = chan->dma.ib_base;
445 break;
446 }
447
448 chan->dma.put = 0;
449 chan->dma.cur = chan->dma.put;
450 chan->dma.free = chan->dma.max - chan->dma.cur;
451
452 ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
453 if (ret)
454 return ret;
455
456 for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
457 OUT_RING(chan, 0x00000000);
458
459 /* allocate software object class (used for fences on <= nv05) */
460 if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) {
461 ret = nvif_object_init(&chan->user, 0x006e,
462 NVIF_CLASS_SW_NV04,
463 NULL, 0, &chan->nvsw);
464 if (ret)
465 return ret;
466
467 ret = RING_SPACE(chan, 2);
468 if (ret)
469 return ret;
470
471 BEGIN_NV04(chan, NvSubSw, 0x0000, 1);
472 OUT_RING (chan, chan->nvsw.handle);
473 FIRE_RING (chan);
474 }
475
476 /* initialise synchronisation */
477 return nouveau_fence(chan->drm)->context_new(chan);
478 }
479
480 int
nouveau_channel_new(struct nouveau_drm * drm,struct nvif_device * device,u32 arg0,u32 arg1,bool priv,struct nouveau_channel ** pchan)481 nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device,
482 u32 arg0, u32 arg1, bool priv,
483 struct nouveau_channel **pchan)
484 {
485 struct nouveau_cli *cli = (void *)device->object.client;
486 bool super;
487 int ret;
488
489 /* hack until fencenv50 is fixed, and agp access relaxed */
490 super = cli->base.super;
491 cli->base.super = true;
492
493 ret = nouveau_channel_ind(drm, device, arg0, priv, pchan);
494 if (ret) {
495 NV_PRINTK(dbg, cli, "ib channel create, %d\n", ret);
496 ret = nouveau_channel_dma(drm, device, pchan);
497 if (ret) {
498 NV_PRINTK(dbg, cli, "dma channel create, %d\n", ret);
499 goto done;
500 }
501 }
502
503 ret = nouveau_channel_init(*pchan, arg0, arg1);
504 if (ret) {
505 NV_PRINTK(err, cli, "channel failed to initialise, %d\n", ret);
506 nouveau_channel_del(pchan);
507 }
508
509 ret = nouveau_svmm_join((*pchan)->vmm->svmm, (*pchan)->inst);
510 if (ret)
511 nouveau_channel_del(pchan);
512
513 done:
514 cli->base.super = super;
515 return ret;
516 }
517
518 int
nouveau_channels_init(struct nouveau_drm * drm)519 nouveau_channels_init(struct nouveau_drm *drm)
520 {
521 struct {
522 struct nv_device_info_v1 m;
523 struct {
524 struct nv_device_info_v1_data channels;
525 } v;
526 } args = {
527 .m.version = 1,
528 .m.count = sizeof(args.v) / sizeof(args.v.channels),
529 .v.channels.mthd = NV_DEVICE_FIFO_CHANNELS,
530 };
531 struct nvif_object *device = &drm->client.device.object;
532 int ret;
533
534 ret = nvif_object_mthd(device, NV_DEVICE_V0_INFO, &args, sizeof(args));
535 if (ret || args.v.channels.mthd == NV_DEVICE_INFO_INVALID)
536 return -ENODEV;
537
538 drm->chan.nr = args.v.channels.data;
539 drm->chan.context_base = dma_fence_context_alloc(drm->chan.nr);
540 return 0;
541 }
542