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Searched defs:opc (Results 101 – 125 of 3049) sorted by relevance

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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/ppc/translate/
H A Dfp-ops.inc.c53 #define GEN_LDF(name, ldop, opc, type) \ argument
55 #define GEN_LDUF(name, ldop, opc, type) \ argument
57 #define GEN_LDUXF(name, ldop, opc, type) \ argument
74 #define GEN_STF(name, stop, opc, type) \ argument
76 #define GEN_STUF(name, stop, opc, type) \ argument
78 #define GEN_STUXF(name, stop, opc, type) \ argument
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/ppc/translate/
H A Dfp-ops.inc.c53 #define GEN_LDF(name, ldop, opc, type) \ argument
55 #define GEN_LDUF(name, ldop, opc, type) \ argument
57 #define GEN_LDUXF(name, ldop, opc, type) \ argument
74 #define GEN_STF(name, stop, opc, type) \ argument
76 #define GEN_STUF(name, stop, opc, type) \ argument
78 #define GEN_STUXF(name, stop, opc, type) \ argument
/dports/deskutils/treesheets/treesheets-1.0.2/lobster/src/
H A Dtonative.cpp22 int ParseOpAndGetArity(int opc, const int *&ip) { in ParseOpAndGetArity()
84 int opc = *ip++; in ToNative() local
94 int opc = *ip++; in ToNative() local
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/bfd/
H A Dxtensa-isa.c167 int opc, insn_size, prev_num_opcodes, new_num_opcodes, this_module; in xtensa_add_isa() local
326 int n, opc; in xtensa_decode_insn() local
339 xtensa_encode_insn (xtensa_isa isa, xtensa_opcode opc, xtensa_insnbuf insn) in xtensa_encode_insn()
360 xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc) in xtensa_opcode_name()
368 xtensa_insn_length (xtensa_isa isa, xtensa_opcode opc) in xtensa_insn_length()
385 xtensa_num_operands (xtensa_isa isa, xtensa_opcode opc) in xtensa_num_operands()
393 xtensa_get_operand (xtensa_isa isa, xtensa_opcode opc, int opnd) in xtensa_get_operand()
529 xtensa_opcode opc; in xtensa_insnbuf_to_chars() local
/dports/java/openjdk17/jdk17u-jdk-17.0.1-12-1/src/hotspot/share/opto/
H A Dvectornode.cpp257 bool VectorNode::implemented(int opc, uint vlen, BasicType bt) { in implemented()
339 bool VectorNode::is_shift_opcode(int opc) { in is_shift_opcode()
514 VectorNode* VectorNode::make(int opc, Node* n1, Node* n2, uint vlen, BasicType bt) { in make()
570 VectorNode* VectorNode::shift_count(int opc, Node* cnt, uint vlen, BasicType bt) { in shift_count()
590 bool VectorNode::is_vector_shift(int opc) { in is_vector_shift()
611 bool VectorNode::is_vector_shift_count(int opc) { in is_vector_shift_count()
717 LoadVectorNode* LoadVectorNode::make(int opc, Node* ctl, Node* mem, in make()
726 StoreVectorNode* StoreVectorNode::make(int opc, Node* ctl, Node* mem, in make()
806 int ReductionNode::opcode(int opc, BasicType bt) { in opcode()
1052 Node* ReductionNode::make_reduction_input(PhaseGVN& gvn, int opc, BasicType bt) { in make_reduction_input()
[all …]
/dports/math/libpgmath/flang-d07daf3/tools/flang2/flang2exe/
H A Diliutil.cpp723 ILI_OP opc; in ad_func() member
1456 ILI_OP opc; in ad_free() local
1651 ILI_OP opc; in insert_argrsrv() local
7265 ILI_OP opc; in red_iadd() local
7367 ILI_OP opc; in red_kadd() local
8639 ILI_OP opc; in compl_br() local
8837 ILI_OP opc; in new_ili() local
9026 ILI_OP opc; in mark_ilitree() local
9136 ILI_OP opc; in _find_ili() local
9467 ILI_OP opc; in rewr_() local
[all …]
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dnds32-dis.c227 nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED, in nds32_parse_opcode()
552 nds32_filter_unknown_insn (uint32_t insn, struct nds32_opcode **opc) in nds32_filter_unknown_insn()
618 struct nds32_opcode *opc; in print_insn32() local
631 struct nds32_opcode *opc; in print_insn16() local
923 nds32_special_opcode (uint32_t insn, struct nds32_opcode **opc) in nds32_special_opcode()
1011 struct nds32_opcode *opc; in print_insn_nds32() local
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dnds32-dis.c227 nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED, in nds32_parse_opcode()
552 nds32_filter_unknown_insn (uint32_t insn, struct nds32_opcode **opc) in nds32_filter_unknown_insn()
618 struct nds32_opcode *opc; in print_insn32() local
631 struct nds32_opcode *opc; in print_insn16() local
923 nds32_special_opcode (uint32_t insn, struct nds32_opcode **opc) in nds32_special_opcode()
1011 struct nds32_opcode *opc; in print_insn_nds32() local
/dports/net/hostapd-devel/hostap-14ab4a816/tests/
H A Dtest-milenage.c14 static int milenage_opc(const u8 *op, const u8 *k, u8 *opc) in milenage_opc()
29 u8 opc[16]; member
258 u8 opc[16]; member
698 u8 buf[16], buf2[16], buf3[16], buf4[16], buf5[16], opc[16]; in main() local
/dports/security/wpa_supplicant-devel/hostap-14ab4a816/tests/
H A Dtest-milenage.c14 static int milenage_opc(const u8 *op, const u8 *k, u8 *opc) in milenage_opc()
29 u8 opc[16]; member
258 u8 opc[16]; member
698 u8 buf[16], buf2[16], buf3[16], buf4[16], buf5[16], opc[16]; in main() local
/dports/emulators/qemu-utils/qemu-4.2.1/tcg/
H A Dtcg-op.h45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) in tcg_gen_op1_i32()
50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) in tcg_gen_op1_i64()
55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) in tcg_gen_op1i()
70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) in tcg_gen_op2i_i32()
80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) in tcg_gen_op2ii()
85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3_i32()
91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3_i64()
97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3i_i32()
103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3i_i64()
109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, in tcg_gen_ldst_op_i32()
[all …]
/dports/emulators/qemu/qemu-6.2.0/include/tcg/
H A Dtcg-op.h45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) in tcg_gen_op1_i32()
50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) in tcg_gen_op1_i64()
55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) in tcg_gen_op1i()
70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) in tcg_gen_op2i_i32()
80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) in tcg_gen_op2ii()
85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3_i32()
91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3_i64()
97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3i_i32()
103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3i_i64()
109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, in tcg_gen_ldst_op_i32()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/include/tcg/
H A Dtcg-op.h45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) in tcg_gen_op1_i32()
50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) in tcg_gen_op1_i64()
55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) in tcg_gen_op1i()
70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) in tcg_gen_op2i_i32()
80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) in tcg_gen_op2ii()
85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3_i32()
91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3_i64()
97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3i_i32()
103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3i_i64()
109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, in tcg_gen_ldst_op_i32()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/tcg/
H A Dtcg-op.h45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) in tcg_gen_op1_i32()
50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) in tcg_gen_op1_i64()
55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) in tcg_gen_op1i()
70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) in tcg_gen_op2i_i32()
80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) in tcg_gen_op2ii()
85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3_i32()
91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3_i64()
97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3i_i32()
103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3i_i64()
109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, in tcg_gen_ldst_op_i32()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/tcg/
H A Dtcg-op.h45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) in tcg_gen_op1_i32()
50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) in tcg_gen_op1_i64()
55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) in tcg_gen_op1i()
70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) in tcg_gen_op2i_i32()
80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) in tcg_gen_op2ii()
85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3_i32()
91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3_i64()
97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3i_i32()
103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3i_i64()
109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, in tcg_gen_ldst_op_i32()
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/tcg/
H A Dtcg-op.h45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) in tcg_gen_op1_i32()
50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) in tcg_gen_op1_i64()
55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) in tcg_gen_op1i()
70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) in tcg_gen_op2i_i32()
80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) in tcg_gen_op2ii()
85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3_i32()
91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3_i64()
97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3i_i32()
103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, in tcg_gen_op3i_i64()
109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, in tcg_gen_ldst_op_i32()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/tcg/riscv/
H A Dtcg-target.inc.c382 static void tcg_out_opc_reg(TCGContext *s, RISCVInsn opc, in tcg_out_opc_reg()
388 static void tcg_out_opc_imm(TCGContext *s, RISCVInsn opc, in tcg_out_opc_imm()
394 static void tcg_out_opc_store(TCGContext *s, RISCVInsn opc, in tcg_out_opc_store()
406 static void tcg_out_opc_upper(TCGContext *s, RISCVInsn opc, in tcg_out_opc_upper()
412 static void tcg_out_opc_jump(TCGContext *s, RISCVInsn opc, in tcg_out_opc_jump()
973 MemOp opc = get_memop(oi); in tcg_out_tlb_load() local
1047 MemOp opc = get_memop(oi); in tcg_out_qemu_ld_slow_path() local
1080 MemOp opc = get_memop(oi); in tcg_out_qemu_st_slow_path() local
1175 MemOp opc; in tcg_out_qemu_ld() local
1246 MemOp opc; in tcg_out_qemu_st() local
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/riscv/
H A Dtcg-target.inc.c382 static void tcg_out_opc_reg(TCGContext *s, RISCVInsn opc, in tcg_out_opc_reg()
388 static void tcg_out_opc_imm(TCGContext *s, RISCVInsn opc, in tcg_out_opc_imm()
394 static void tcg_out_opc_store(TCGContext *s, RISCVInsn opc, in tcg_out_opc_store()
406 static void tcg_out_opc_upper(TCGContext *s, RISCVInsn opc, in tcg_out_opc_upper()
412 static void tcg_out_opc_jump(TCGContext *s, RISCVInsn opc, in tcg_out_opc_jump()
973 MemOp opc = get_memop(oi); in tcg_out_tlb_load() local
1047 MemOp opc = get_memop(oi); in tcg_out_qemu_ld_slow_path() local
1080 MemOp opc = get_memop(oi); in tcg_out_qemu_st_slow_path() local
1175 MemOp opc; in tcg_out_qemu_ld() local
1246 MemOp opc; in tcg_out_qemu_st() local
[all …]
/dports/emulators/qemu42/qemu-4.2.1/tcg/riscv/
H A Dtcg-target.inc.c382 static void tcg_out_opc_reg(TCGContext *s, RISCVInsn opc, in tcg_out_opc_reg()
388 static void tcg_out_opc_imm(TCGContext *s, RISCVInsn opc, in tcg_out_opc_imm()
394 static void tcg_out_opc_store(TCGContext *s, RISCVInsn opc, in tcg_out_opc_store()
406 static void tcg_out_opc_upper(TCGContext *s, RISCVInsn opc, in tcg_out_opc_upper()
412 static void tcg_out_opc_jump(TCGContext *s, RISCVInsn opc, in tcg_out_opc_jump()
973 MemOp opc = get_memop(oi); in tcg_out_tlb_load() local
1047 MemOp opc = get_memop(oi); in tcg_out_qemu_ld_slow_path() local
1080 MemOp opc = get_memop(oi); in tcg_out_qemu_st_slow_path() local
1175 MemOp opc; in tcg_out_qemu_ld() local
1246 MemOp opc; in tcg_out_qemu_st() local
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/riscv/
H A Dtcg-target.inc.c382 static void tcg_out_opc_reg(TCGContext *s, RISCVInsn opc, in tcg_out_opc_reg()
388 static void tcg_out_opc_imm(TCGContext *s, RISCVInsn opc, in tcg_out_opc_imm()
394 static void tcg_out_opc_store(TCGContext *s, RISCVInsn opc, in tcg_out_opc_store()
406 static void tcg_out_opc_upper(TCGContext *s, RISCVInsn opc, in tcg_out_opc_upper()
412 static void tcg_out_opc_jump(TCGContext *s, RISCVInsn opc, in tcg_out_opc_jump()
973 MemOp opc = get_memop(oi); in tcg_out_tlb_load() local
1047 MemOp opc = get_memop(oi); in tcg_out_qemu_ld_slow_path() local
1080 MemOp opc = get_memop(oi); in tcg_out_qemu_st_slow_path() local
1175 MemOp opc; in tcg_out_qemu_ld() local
1246 MemOp opc; in tcg_out_qemu_st() local
[all …]
/dports/devel/py-xdis/xdis-5.0.13/test_unit/
H A Dtest_dis.py13 from xdis.opcodes import opcode_36 as opc unknown
15 from xdis.opcodes import opcode_27 as opc unknown
/dports/irc/irssi/irssi-1.2.3/src/otr/
H A Dotr.c104 struct otr_peer_context *opc; in add_peer_context_cb() local
448 struct otr_peer_context *opc; in otr_trust() local
523 struct otr_peer_context *opc; in otr_auth() local
597 static enum otr_msg_status enqueue_otr_fragment(const char *msg, struct otr_peer_context *opc, char… in enqueue_otr_fragment()
697 struct otr_peer_context *opc; in otr_receive() local
861 struct otr_peer_context *opc; in otr_forget() local
910 struct otr_peer_context *opc; in otr_distrust() local
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/freedreno/ir3/
H A Dinstr-a3xx.h589 is_sat_compatible(opc_t opc) in is_sat_compatible()
612 is_mad(opc_t opc) in is_mad()
628 is_madsh(opc_t opc) in is_madsh()
640 is_local_atomic(opc_t opc) in is_local_atomic()
661 is_global_a3xx_atomic(opc_t opc) in is_global_a3xx_atomic()
703 is_bindless_atomic(opc_t opc) in is_bindless_atomic()
724 is_atomic(opc_t opc) in is_atomic()
731 is_ssbo(opc_t opc) in is_ssbo()
746 is_isam(opc_t opc) in is_isam()
759 is_cat2_float(opc_t opc) in is_cat2_float()
[all …]
/dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/src/cpu/aarch64/xbyak_aarch64/src/
H A Dxbyak_aarch64_impl.h936 uint32_t opc = 3; in PfLiteralEnc() local
963 uint32_t opc = (rt1.getBit() == 32) ? 0 : 2; in LdStNoAllocPair() local
1129 uint32_t opc = 2; in PfRegUnsImm() local
1286 uint32_t opc = 2; in PfExt() local
1301 uint32_t opc = 2; in PfExt() local
1398 uint32_t opc = 2; in PfRegImm() local
2500 uint32_t opc = 2 | (genSize(zd) & 0x1); in SveAddressGen() local
2514 uint32_t opc = (mod == SXTW) ? 0 : 1; in SveAddressGen() local
2800 uint32_t opc = (op << 2) | o2; in SveIntCompVec() local
2806 uint32_t opc = (op << 2) | 2 | o2; in SveIntCompWideElem() local
[all …]
/dports/math/onednn/oneDNN-2.5.1/src/cpu/aarch64/xbyak_aarch64/src/
H A Dxbyak_aarch64_impl.h936 uint32_t opc = 3; in PfLiteralEnc() local
963 uint32_t opc = (rt1.getBit() == 32) ? 0 : 2; in LdStNoAllocPair() local
1129 uint32_t opc = 2; in PfRegUnsImm() local
1286 uint32_t opc = 2; in PfExt() local
1301 uint32_t opc = 2; in PfExt() local
1398 uint32_t opc = 2; in PfRegImm() local
2500 uint32_t opc = 2 | (genSize(zd) & 0x1); in SveAddressGen() local
2514 uint32_t opc = (mod == SXTW) ? 0 : 1; in SveAddressGen() local
2800 uint32_t opc = (op << 2) | o2; in SveIntCompVec() local
2806 uint32_t opc = (op << 2) | 2 | o2; in SveIntCompWideElem() local
[all …]

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