xref: /freebsd/sys/dev/qlnx/qlnxe/ecore_dcbx.c (revision 685dc743)
1 /*
2  * Copyright (c) 2017-2018 Cavium, Inc.
3  * All rights reserved.
4  *
5  *  Redistribution and use in source and binary forms, with or without
6  *  modification, are permitted provided that the following conditions
7  *  are met:
8  *
9  *  1. Redistributions of source code must retain the above copyright
10  *     notice, this list of conditions and the following disclaimer.
11  *  2. Redistributions in binary form must reproduce the above copyright
12  *     notice, this list of conditions and the following disclaimer in the
13  *     documentation and/or other materials provided with the distribution.
14  *
15  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  *  POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * File : ecore_dcbx.c
30  */
31 #include <sys/cdefs.h>
32 #include "bcm_osal.h"
33 #include "ecore.h"
34 #include "ecore_sp_commands.h"
35 #include "ecore_dcbx.h"
36 #include "ecore_cxt.h"
37 #include "ecore_gtt_reg_addr.h"
38 #include "ecore_iro.h"
39 #ifdef CONFIG_ECORE_ROCE
40 #include "ecore_rdma.h"
41 #endif
42 #include "ecore_iov_api.h"
43 
44 #define ECORE_DCBX_MAX_MIB_READ_TRY	(100)
45 #define ECORE_ETH_TYPE_DEFAULT		(0)
46 #define ECORE_ETH_TYPE_ROCE		(0x8915)
47 #define ECORE_UDP_PORT_TYPE_ROCE_V2	(0x12B7)
48 #define ECORE_ETH_TYPE_FCOE		(0x8906)
49 #define ECORE_TCP_PORT_ISCSI		(0xCBC)
50 
51 #define ECORE_DCBX_INVALID_PRIORITY	0xFF
52 
53 /* Get Traffic Class from priority traffic class table, 4 bits represent
54  * the traffic class corresponding to the priority.
55  */
56 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
57 		((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
58 
ecore_dcbx_app_ethtype(u32 app_info_bitmap)59 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
60 {
61 	return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
62 		  DCBX_APP_SF_ETHTYPE);
63 }
64 
ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)65 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
66 {
67 	u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
68 
69 	/* Old MFW */
70 	if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
71 		return ecore_dcbx_app_ethtype(app_info_bitmap);
72 
73 	return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
74 }
75 
ecore_dcbx_app_port(u32 app_info_bitmap)76 static bool ecore_dcbx_app_port(u32 app_info_bitmap)
77 {
78 	return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
79 		  DCBX_APP_SF_PORT);
80 }
81 
ecore_dcbx_ieee_app_port(u32 app_info_bitmap,u8 type)82 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
83 {
84 	u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
85 
86 	/* Old MFW */
87 	if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
88 		return ecore_dcbx_app_port(app_info_bitmap);
89 
90 	return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
91 }
92 
ecore_dcbx_default_tlv(u32 app_info_bitmap,u16 proto_id,bool ieee)93 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
94 {
95 	bool ethtype;
96 
97 	if (ieee)
98 		ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
99 	else
100 		ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
101 
102 	return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
103 }
104 
ecore_dcbx_iscsi_tlv(u32 app_info_bitmap,u16 proto_id,bool ieee)105 static bool ecore_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
106 {
107 	bool port;
108 
109 	if (ieee)
110 		port = ecore_dcbx_ieee_app_port(app_info_bitmap,
111 						DCBX_APP_SF_IEEE_TCP_PORT);
112 	else
113 		port = ecore_dcbx_app_port(app_info_bitmap);
114 
115 	return !!(port && (proto_id == ECORE_TCP_PORT_ISCSI));
116 }
117 
ecore_dcbx_fcoe_tlv(u32 app_info_bitmap,u16 proto_id,bool ieee)118 static bool ecore_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
119 {
120 	bool ethtype;
121 
122 	if (ieee)
123 		ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
124 	else
125 		ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
126 
127 	return !!(ethtype && (proto_id == ECORE_ETH_TYPE_FCOE));
128 }
129 
ecore_dcbx_roce_tlv(u32 app_info_bitmap,u16 proto_id,bool ieee)130 static bool ecore_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
131 {
132 	bool ethtype;
133 
134 	if (ieee)
135 		ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
136 	else
137 		ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
138 
139 	return !!(ethtype && (proto_id == ECORE_ETH_TYPE_ROCE));
140 }
141 
ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap,u16 proto_id,bool ieee)142 static bool ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
143 {
144 	bool port;
145 
146 	if (ieee)
147 		port = ecore_dcbx_ieee_app_port(app_info_bitmap,
148 						DCBX_APP_SF_IEEE_UDP_PORT);
149 	else
150 		port = ecore_dcbx_app_port(app_info_bitmap);
151 
152 	return !!(port && (proto_id == ECORE_UDP_PORT_TYPE_ROCE_V2));
153 }
154 
ecore_dcbx_iwarp_tlv(struct ecore_hwfn * p_hwfn,u32 app_info_bitmap,u16 proto_id,bool ieee)155 static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,
156 				 u16 proto_id, bool ieee)
157 {
158 	bool port;
159 
160 	if (!p_hwfn->p_dcbx_info->iwarp_port)
161 		return false;
162 
163 	if (ieee)
164 		port = ecore_dcbx_ieee_app_port(app_info_bitmap,
165 						DCBX_APP_SF_IEEE_TCP_PORT);
166 	else
167 		port = ecore_dcbx_app_port(app_info_bitmap);
168 
169 	return !!(port && (proto_id == p_hwfn->p_dcbx_info->iwarp_port));
170 }
171 
172 static void
ecore_dcbx_dp_protocol(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_results * p_data)173 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
174 		       struct ecore_dcbx_results *p_data)
175 {
176 	enum dcbx_protocol_type id;
177 	int i;
178 
179 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
180 		   p_data->dcbx_enabled);
181 
182 	for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
183 		id = ecore_dcbx_app_update[i].id;
184 
185 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
186 			   "%s info: update %d, enable %d, prio %d, tc %d, num_active_tc %d dscp_enable = %d dscp_val = %d\n",
187 			   ecore_dcbx_app_update[i].name, p_data->arr[id].update,
188 			   p_data->arr[id].enable, p_data->arr[id].priority,
189 			   p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
190 			   p_data->arr[id].dscp_enable,
191 			   p_data->arr[id].dscp_val);
192 	}
193 }
194 
ecore_dcbx_get_dscp_value(struct ecore_hwfn * p_hwfn,u8 pri)195 u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 pri)
196 {
197 	struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
198 	u8 i;
199 
200 	if (!dscp->enabled)
201 		return ECORE_DCBX_DSCP_DISABLED;
202 
203 	for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
204 		if (pri == dscp->dscp_pri_map[i])
205 			return i;
206 
207 	return ECORE_DCBX_DSCP_DISABLED;
208 }
209 
210 static void
ecore_dcbx_set_params(struct ecore_dcbx_results * p_data,struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool enable,u8 prio,u8 tc,enum dcbx_protocol_type type,enum ecore_pci_personality personality)211 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
212 		      struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
213 		      bool enable, u8 prio, u8 tc,
214 		      enum dcbx_protocol_type type,
215 		      enum ecore_pci_personality personality)
216 {
217 	/* PF update ramrod data */
218 	p_data->arr[type].enable = enable;
219 	p_data->arr[type].priority = prio;
220 	p_data->arr[type].tc = tc;
221 	p_data->arr[type].dscp_val = ecore_dcbx_get_dscp_value(p_hwfn, prio);
222 	if (p_data->arr[type].dscp_val == ECORE_DCBX_DSCP_DISABLED) {
223 		p_data->arr[type].dscp_enable = false;
224 		p_data->arr[type].dscp_val = 0;
225 	} else
226 		p_data->arr[type].dscp_enable = enable;
227 
228 	p_data->arr[type].update = UPDATE_DCB_DSCP;
229 
230 	/* Do not add valn tag 0 when DCB is enabled and port is in UFP mode */
231 	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits))
232 		p_data->arr[type].dont_add_vlan0 = true;
233 
234 	/* QM reconf data */
235 	if (p_hwfn->hw_info.personality == personality)
236 		p_hwfn->hw_info.offload_tc = tc;
237 
238 	/* Configure dcbx vlan priority in doorbell block for roce EDPM */
239 	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits) &&
240 	    (type == DCBX_PROTOCOL_ROCE)) {
241 		ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
242 		ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);
243 	}
244 }
245 
246 /* Update app protocol data and hw_info fields with the TLV info */
247 static void
ecore_dcbx_update_app_info(struct ecore_dcbx_results * p_data,struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,bool enable,u8 prio,u8 tc,enum dcbx_protocol_type type)248 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
249 			   struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
250 			   bool enable, u8 prio, u8 tc,
251 			   enum dcbx_protocol_type type)
252 {
253 	enum ecore_pci_personality personality;
254 	enum dcbx_protocol_type id;
255 	int i;
256 
257 	for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
258 		id = ecore_dcbx_app_update[i].id;
259 
260 		if (type != id)
261 			continue;
262 
263 		personality = ecore_dcbx_app_update[i].personality;
264 
265 		ecore_dcbx_set_params(p_data, p_hwfn, p_ptt, enable,
266 				      prio, tc, type, personality);
267 	}
268 }
269 
270 static enum _ecore_status_t
ecore_dcbx_get_app_priority(u8 pri_bitmap,u8 * priority)271 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
272 {
273 	u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
274 	u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
275 	enum _ecore_status_t rc = ECORE_SUCCESS;
276 
277 	/* Bitmap 1 corresponds to priority 0, return priority 0 */
278 	if (pri_bitmap == 1) {
279 		*priority = 0;
280 		return rc;
281 	}
282 
283 	/* Choose the highest priority */
284 	while ((ECORE_MAX_PFC_PRIORITIES == pri) && index) {
285 		pri_mask = 1 << index;
286 		if (pri_bitmap & pri_mask)
287 			pri = index;
288 		index--;
289 	}
290 
291 	if (pri < ECORE_MAX_PFC_PRIORITIES)
292 		*priority = (u8)pri;
293 	else
294 		rc = ECORE_INVAL;
295 
296 	return rc;
297 }
298 
299 static bool
ecore_dcbx_get_app_protocol_type(struct ecore_hwfn * p_hwfn,u32 app_prio_bitmap,u16 id,enum dcbx_protocol_type * type,bool ieee)300 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
301 				 u32 app_prio_bitmap, u16 id,
302 				 enum dcbx_protocol_type *type, bool ieee)
303 {
304 	if (ecore_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
305 		*type = DCBX_PROTOCOL_FCOE;
306 	} else if (ecore_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
307 		*type = DCBX_PROTOCOL_ROCE;
308 	} else if (ecore_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
309 		*type = DCBX_PROTOCOL_ISCSI;
310 	} else if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
311 		*type = DCBX_PROTOCOL_ETH;
312 	} else if (ecore_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
313 		*type = DCBX_PROTOCOL_ROCE_V2;
314 	} else if (ecore_dcbx_iwarp_tlv(p_hwfn, app_prio_bitmap, id, ieee)) {
315 		*type = DCBX_PROTOCOL_IWARP;
316 	} else {
317 		*type = DCBX_MAX_PROTOCOL_TYPE;
318 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
319 			   "No action required, App TLV entry = 0x%x\n",
320 			   app_prio_bitmap);
321 		return false;
322 	}
323 
324 	return true;
325 }
326 
327 /* Parse app TLV's to update TC information in hw_info structure for
328  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
329  */
330 static enum _ecore_status_t
ecore_dcbx_process_tlv(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct ecore_dcbx_results * p_data,struct dcbx_app_priority_entry * p_tbl,u32 pri_tc_tbl,int count,u8 dcbx_version)331 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
332 		       struct ecore_dcbx_results *p_data,
333 		       struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
334 		       int count, u8 dcbx_version)
335 {
336 	enum dcbx_protocol_type type;
337 	bool enable, ieee, eth_tlv;
338 	u8 tc, priority_map;
339 	u16 protocol_id;
340 	u8 priority;
341 	enum _ecore_status_t rc = ECORE_SUCCESS;
342 	int i;
343 
344 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
345 		   "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
346 		   count, pri_tc_tbl, dcbx_version);
347 
348 	ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
349 	eth_tlv = false;
350 	/* Parse APP TLV */
351 	for (i = 0; i < count; i++) {
352 		protocol_id = GET_MFW_FIELD(p_tbl[i].entry,
353 					    DCBX_APP_PROTOCOL_ID);
354 		priority_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
355 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
356 			   protocol_id, priority_map);
357 		rc = ecore_dcbx_get_app_priority(priority_map, &priority);
358 		if (rc == ECORE_INVAL) {
359 			DP_ERR(p_hwfn, "Invalid priority\n");
360 			return ECORE_INVAL;
361 		}
362 
363 		tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
364 		if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
365 						     protocol_id, &type,
366 						     ieee)) {
367 			/* ETH always have the enable bit reset, as it gets
368 			 * vlan information per packet. For other protocols,
369 			 * should be set according to the dcbx_enabled
370 			 * indication, but we only got here if there was an
371 			 * app tlv for the protocol, so dcbx must be enabled.
372 			 */
373 			if (type == DCBX_PROTOCOL_ETH) {
374 				enable = false;
375 				eth_tlv = true;
376 			} else
377 				enable = true;
378 
379 			ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt,
380 						   enable, priority, tc, type);
381 		}
382 	}
383 
384 	/* If Eth TLV is not detected, use UFP TC as default TC */
385 	if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC,
386 			  &p_hwfn->p_dev->mf_bits) && !eth_tlv)
387 		p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc;
388 
389 	/* Update ramrod protocol data and hw_info fields
390 	 * with default info when corresponding APP TLV's are not detected.
391 	 * The enabled field has a different logic for ethernet as only for
392 	 * ethernet dcb should disabled by default, as the information arrives
393 	 * from the OS (unless an explicit app tlv was present).
394 	 */
395 	tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
396 	priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
397 	for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
398 		if (p_data->arr[type].update)
399 			continue;
400 
401 		/* if no app tlv was present, don't override in FW */
402 		ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, false,
403 					   priority, tc, type);
404 	}
405 
406 	return ECORE_SUCCESS;
407 }
408 
409 /* Parse app TLV's to update TC information in hw_info structure for
410  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
411  */
412 static enum _ecore_status_t
ecore_dcbx_process_mib_info(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)413 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
414 {
415 	struct dcbx_app_priority_feature *p_app;
416 	struct dcbx_app_priority_entry *p_tbl;
417 	struct ecore_dcbx_results data = { 0 };
418 	struct dcbx_ets_feature *p_ets;
419 	struct ecore_hw_info *p_info;
420 	u32 pri_tc_tbl, flags;
421 	u8 dcbx_version;
422 	int num_entries;
423 	enum _ecore_status_t rc = ECORE_SUCCESS;
424 
425 	flags = p_hwfn->p_dcbx_info->operational.flags;
426 	dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION);
427 
428 	p_app = &p_hwfn->p_dcbx_info->operational.features.app;
429 	p_tbl = p_app->app_pri_tbl;
430 
431 	p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
432 	pri_tc_tbl = p_ets->pri_tc_tbl[0];
433 
434 	p_info = &p_hwfn->hw_info;
435 	num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
436 
437 	rc = ecore_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,
438 				    num_entries, dcbx_version);
439 	if (rc != ECORE_SUCCESS)
440 		return rc;
441 
442 	p_info->num_active_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
443 	p_hwfn->qm_info.ooo_tc = GET_MFW_FIELD(p_ets->flags, DCBX_OOO_TC);
444 	data.pf_id = p_hwfn->rel_pf_id;
445 	data.dcbx_enabled = !!dcbx_version;
446 
447 	ecore_dcbx_dp_protocol(p_hwfn, &data);
448 
449 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
450 		    sizeof(struct ecore_dcbx_results));
451 
452 	return ECORE_SUCCESS;
453 }
454 
455 static enum _ecore_status_t
ecore_dcbx_copy_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct ecore_dcbx_mib_meta_data * p_data,enum ecore_mib_read_type type)456 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
457 		    struct ecore_ptt *p_ptt,
458 		    struct ecore_dcbx_mib_meta_data *p_data,
459 		    enum ecore_mib_read_type type)
460 {
461 	u32 prefix_seq_num, suffix_seq_num;
462 	int read_count = 0;
463 	enum _ecore_status_t rc = ECORE_SUCCESS;
464 
465 	/* The data is considered to be valid only if both sequence numbers are
466 	 * the same.
467 	 */
468 	do {
469 		if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
470 			ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
471 					  p_data->addr, p_data->size);
472 			prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
473 			suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
474 		} else if (type == ECORE_DCBX_LLDP_TLVS) {
475 			ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_tlvs,
476 					  p_data->addr, p_data->size);
477 			prefix_seq_num = p_data->lldp_tlvs->prefix_seq_num;
478 			suffix_seq_num = p_data->lldp_tlvs->suffix_seq_num;
479 
480 		} else {
481 			ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
482 					  p_data->addr, p_data->size);
483 			prefix_seq_num = p_data->mib->prefix_seq_num;
484 			suffix_seq_num = p_data->mib->suffix_seq_num;
485 		}
486 		read_count++;
487 
488 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
489 			   "mib type = %d, try count = %d prefix seq num  = %d suffix seq num = %d\n",
490 			   type, read_count, prefix_seq_num, suffix_seq_num);
491 	} while ((prefix_seq_num != suffix_seq_num) &&
492 		 (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
493 
494 	if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
495 		DP_ERR(p_hwfn,
496 		       "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
497 		       type, read_count, prefix_seq_num, suffix_seq_num);
498 		rc = ECORE_IO;
499 	}
500 
501 	return rc;
502 }
503 
504 static void
ecore_dcbx_get_priority_info(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_app_prio * p_prio,struct ecore_dcbx_results * p_results)505 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
506 			     struct ecore_dcbx_app_prio *p_prio,
507 			     struct ecore_dcbx_results *p_results)
508 {
509 	u8 val;
510 
511 	p_prio->roce = ECORE_DCBX_INVALID_PRIORITY;
512 	p_prio->roce_v2 = ECORE_DCBX_INVALID_PRIORITY;
513 	p_prio->iscsi = ECORE_DCBX_INVALID_PRIORITY;
514 	p_prio->fcoe = ECORE_DCBX_INVALID_PRIORITY;
515 
516 	if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
517 	    p_results->arr[DCBX_PROTOCOL_ROCE].enable)
518 		p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
519 
520 	if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
521 	    p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
522 		val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
523 		p_prio->roce_v2 = val;
524 	}
525 
526 	if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
527 	    p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
528 		p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
529 
530 	if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
531 	    p_results->arr[DCBX_PROTOCOL_FCOE].enable)
532 		p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
533 
534 	if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
535 	    p_results->arr[DCBX_PROTOCOL_ETH].enable)
536 		p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
537 
538 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
539 		   "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
540 		   p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
541 		   p_prio->eth);
542 }
543 
544 static void
ecore_dcbx_get_app_data(struct ecore_hwfn * p_hwfn,struct dcbx_app_priority_feature * p_app,struct dcbx_app_priority_entry * p_tbl,struct ecore_dcbx_params * p_params,bool ieee)545 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
546 			struct dcbx_app_priority_feature *p_app,
547 			struct dcbx_app_priority_entry *p_tbl,
548 			struct ecore_dcbx_params *p_params, bool ieee)
549 {
550 	struct ecore_app_entry *entry;
551 	u8 pri_map;
552 	int i;
553 
554 	p_params->app_willing = GET_MFW_FIELD(p_app->flags, DCBX_APP_WILLING);
555 	p_params->app_valid = GET_MFW_FIELD(p_app->flags, DCBX_APP_ENABLED);
556 	p_params->app_error = GET_MFW_FIELD(p_app->flags, DCBX_APP_ERROR);
557 	p_params->num_app_entries = GET_MFW_FIELD(p_app->flags,
558 						  DCBX_APP_NUM_ENTRIES);
559 	for (i = 0; i < p_params->num_app_entries; i++) {
560 		entry = &p_params->app_entry[i];
561 		if (ieee) {
562 			u8 sf_ieee;
563 			u32 val;
564 
565 			sf_ieee = GET_MFW_FIELD(p_tbl[i].entry,
566 						DCBX_APP_SF_IEEE);
567 			switch (sf_ieee) {
568 			case DCBX_APP_SF_IEEE_RESERVED:
569 				/* Old MFW */
570 				val = GET_MFW_FIELD(p_tbl[i].entry,
571 						    DCBX_APP_SF);
572 				entry->sf_ieee = val ?
573 					ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
574 					ECORE_DCBX_SF_IEEE_ETHTYPE;
575 				break;
576 			case DCBX_APP_SF_IEEE_ETHTYPE:
577 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
578 				break;
579 			case DCBX_APP_SF_IEEE_TCP_PORT:
580 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
581 				break;
582 			case DCBX_APP_SF_IEEE_UDP_PORT:
583 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
584 				break;
585 			case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
586 				entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
587 				break;
588 			}
589 		} else {
590 			entry->ethtype = !(GET_MFW_FIELD(p_tbl[i].entry,
591 							 DCBX_APP_SF));
592 		}
593 
594 		pri_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
595 		ecore_dcbx_get_app_priority(pri_map, &entry->prio);
596 		entry->proto_id = GET_MFW_FIELD(p_tbl[i].entry,
597 						DCBX_APP_PROTOCOL_ID);
598 		ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
599 						 entry->proto_id,
600 						 &entry->proto_type, ieee);
601 	}
602 
603 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
604 		   "APP params: willing %d, valid %d error = %d\n",
605 		   p_params->app_willing, p_params->app_valid,
606 		   p_params->app_error);
607 }
608 
609 static void
ecore_dcbx_get_pfc_data(struct ecore_hwfn * p_hwfn,u32 pfc,struct ecore_dcbx_params * p_params)610 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
611 			u32 pfc, struct ecore_dcbx_params *p_params)
612 {
613 	u8 pfc_map;
614 
615 	p_params->pfc.willing = GET_MFW_FIELD(pfc, DCBX_PFC_WILLING);
616 	p_params->pfc.max_tc = GET_MFW_FIELD(pfc, DCBX_PFC_CAPS);
617 	p_params->pfc.enabled = GET_MFW_FIELD(pfc, DCBX_PFC_ENABLED);
618 	pfc_map = GET_MFW_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
619 	p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
620 	p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
621 	p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
622 	p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
623 	p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
624 	p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
625 	p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
626 	p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
627 
628 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
629 		   "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
630 		   p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
631 		   p_params->pfc.enabled);
632 }
633 
634 static void
ecore_dcbx_get_ets_data(struct ecore_hwfn * p_hwfn,struct dcbx_ets_feature * p_ets,struct ecore_dcbx_params * p_params)635 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
636 			struct dcbx_ets_feature *p_ets,
637 			struct ecore_dcbx_params *p_params)
638 {
639 	u32 bw_map[2], tsa_map[2], pri_map;
640 	int i;
641 
642 	p_params->ets_willing = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_WILLING);
643 	p_params->ets_enabled = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_ENABLED);
644 	p_params->ets_cbs = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_CBS);
645 	p_params->max_ets_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
646 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
647 		   "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
648 		   p_params->ets_willing, p_params->ets_enabled,
649 		   p_params->ets_cbs, p_ets->pri_tc_tbl[0],
650 		   p_params->max_ets_tc);
651 	if (p_params->ets_enabled && !p_params->max_ets_tc)
652 	{
653 		p_params->max_ets_tc = ECORE_MAX_PFC_PRIORITIES;
654 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
655 			   "ETS params: max_ets_tc is forced to %d\n",
656 		   p_params->max_ets_tc);
657 	}
658 	/* 8 bit tsa and bw data corresponding to each of the 8 TC's are
659 	 * encoded in a type u32 array of size 2.
660 	 */
661 	bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
662 	bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
663 	tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
664 	tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
665 	pri_map = p_ets->pri_tc_tbl[0];
666 	for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
667 		p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
668 		p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
669 		p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
670 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
671 			   "elem %d  bw_tbl %x tsa_tbl %x\n",
672 			   i, p_params->ets_tc_bw_tbl[i],
673 			   p_params->ets_tc_tsa_tbl[i]);
674 	}
675 }
676 
677 static void
ecore_dcbx_get_common_params(struct ecore_hwfn * p_hwfn,struct dcbx_app_priority_feature * p_app,struct dcbx_app_priority_entry * p_tbl,struct dcbx_ets_feature * p_ets,u32 pfc,struct ecore_dcbx_params * p_params,bool ieee)678 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
679 			     struct dcbx_app_priority_feature *p_app,
680 			     struct dcbx_app_priority_entry *p_tbl,
681 			     struct dcbx_ets_feature *p_ets,
682 			     u32 pfc, struct ecore_dcbx_params *p_params,
683 			     bool ieee)
684 {
685 	ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
686 	ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
687 	ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
688 }
689 
690 static void
ecore_dcbx_get_local_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * params)691 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
692 			    struct ecore_dcbx_get *params)
693 {
694 	struct dcbx_features *p_feat;
695 
696 	p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
697 	ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
698 				     p_feat->app.app_pri_tbl, &p_feat->ets,
699 				     p_feat->pfc, &params->local.params, false);
700 	params->local.valid = true;
701 }
702 
703 static void
ecore_dcbx_get_remote_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * params)704 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
705 			     struct ecore_dcbx_get *params)
706 {
707 	struct dcbx_features *p_feat;
708 
709 	p_feat = &p_hwfn->p_dcbx_info->remote.features;
710 	ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
711 				     p_feat->app.app_pri_tbl, &p_feat->ets,
712 				     p_feat->pfc, &params->remote.params,
713 				     false);
714 	params->remote.valid = true;
715 }
716 
ecore_dcbx_get_dscp_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * params)717 static void  ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
718 					struct ecore_dcbx_get *params)
719 {
720 	struct ecore_dcbx_dscp_params *p_dscp;
721 	struct dcb_dscp_map *p_dscp_map;
722 	int i, j, entry;
723 	u32 pri_map;
724 
725 	p_dscp = &params->dscp;
726 	p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
727 	p_dscp->enabled = GET_MFW_FIELD(p_dscp_map->flags, DCB_DSCP_ENABLE);
728 
729 	/* MFW encodes 64 dscp entries into 8 element array of u32 entries,
730 	 * where each entry holds the 4bit priority map for 8 dscp entries.
731 	 */
732 	for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
733 		pri_map = p_dscp_map->dscp_pri_map[i];
734 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
735 			   entry, pri_map);
736 		for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
737 			p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
738 							   (j * 4)) & 0xf;
739 	}
740 }
741 
742 static void
ecore_dcbx_get_operational_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * params)743 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
744 				  struct ecore_dcbx_get *params)
745 {
746 	struct ecore_dcbx_operational_params *p_operational;
747 	struct ecore_dcbx_results *p_results;
748 	struct dcbx_features *p_feat;
749 	bool enabled, err;
750 	u32 flags;
751 	bool val;
752 
753 	flags = p_hwfn->p_dcbx_info->operational.flags;
754 
755 	/* If DCBx version is non zero, then negotiation
756 	 * was successfuly performed
757 	 */
758 	p_operational = &params->operational;
759 	enabled = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) !=
760 		     DCBX_CONFIG_VERSION_DISABLED);
761 	if (!enabled) {
762 		p_operational->enabled = enabled;
763 		p_operational->valid = false;
764 		DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
765 		return;
766 	}
767 
768 	p_feat = &p_hwfn->p_dcbx_info->operational.features;
769 	p_results = &p_hwfn->p_dcbx_info->results;
770 
771 	val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
772 		 DCBX_CONFIG_VERSION_IEEE);
773 	p_operational->ieee = val;
774 
775 	val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
776 		 DCBX_CONFIG_VERSION_CEE);
777 	p_operational->cee = val;
778 
779 	val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
780 		 DCBX_CONFIG_VERSION_STATIC);
781 	p_operational->local = val;
782 
783 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
784 		   "Version support: ieee %d, cee %d, static %d\n",
785 		   p_operational->ieee, p_operational->cee,
786 		   p_operational->local);
787 
788 	ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
789 				     p_feat->app.app_pri_tbl, &p_feat->ets,
790 				     p_feat->pfc, &params->operational.params,
791 				     p_operational->ieee);
792 	ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
793 				     p_results);
794 	err = GET_MFW_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
795 	p_operational->err = err;
796 	p_operational->enabled = enabled;
797 	p_operational->valid = true;
798 }
799 
ecore_dcbx_get_local_lldp_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * params)800 static void ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
801 					     struct ecore_dcbx_get *params)
802 {
803 	struct lldp_config_params_s *p_local;
804 
805 	p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
806 
807 	OSAL_MEMCPY(params->lldp_local.local_chassis_id,
808 		    p_local->local_chassis_id,
809 		    sizeof(params->lldp_local.local_chassis_id));
810 	OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
811 		    sizeof(params->lldp_local.local_port_id));
812 }
813 
ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * params)814 static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
815 					      struct ecore_dcbx_get *params)
816 {
817 	struct lldp_status_params_s *p_remote;
818 
819 	p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
820 
821 	OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
822 		    p_remote->peer_chassis_id,
823 		    sizeof(params->lldp_remote.peer_chassis_id));
824 	OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
825 		    sizeof(params->lldp_remote.peer_port_id));
826 }
827 
828 static enum _ecore_status_t
ecore_dcbx_get_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * p_params,enum ecore_mib_read_type type)829 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn,
830 		      struct ecore_dcbx_get *p_params,
831 		      enum ecore_mib_read_type type)
832 {
833 	switch (type) {
834 	case ECORE_DCBX_REMOTE_MIB:
835 		ecore_dcbx_get_remote_params(p_hwfn, p_params);
836 		break;
837 	case ECORE_DCBX_LOCAL_MIB:
838 		ecore_dcbx_get_local_params(p_hwfn, p_params);
839 		break;
840 	case ECORE_DCBX_OPERATIONAL_MIB:
841 		ecore_dcbx_get_operational_params(p_hwfn, p_params);
842 		break;
843 	case ECORE_DCBX_REMOTE_LLDP_MIB:
844 		ecore_dcbx_get_remote_lldp_params(p_hwfn, p_params);
845 		break;
846 	case ECORE_DCBX_LOCAL_LLDP_MIB:
847 		ecore_dcbx_get_local_lldp_params(p_hwfn, p_params);
848 		break;
849 	default:
850 		DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
851 		return ECORE_INVAL;
852 	}
853 
854 	return ECORE_SUCCESS;
855 }
856 
857 static enum _ecore_status_t
ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)858 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
859 			       struct ecore_ptt *p_ptt)
860 {
861 	struct ecore_dcbx_mib_meta_data data;
862 	enum _ecore_status_t rc = ECORE_SUCCESS;
863 
864 	OSAL_MEM_ZERO(&data, sizeof(data));
865 	data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
866 							   lldp_config_params);
867 	data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
868 	data.size = sizeof(struct lldp_config_params_s);
869 	ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
870 
871 	return rc;
872 }
873 
874 static enum _ecore_status_t
ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum ecore_mib_read_type type)875 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
876 				struct ecore_ptt *p_ptt,
877 				enum ecore_mib_read_type type)
878 {
879 	struct ecore_dcbx_mib_meta_data data;
880 	enum _ecore_status_t rc = ECORE_SUCCESS;
881 
882 	OSAL_MEM_ZERO(&data, sizeof(data));
883 	data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
884 							   lldp_status_params);
885 	data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
886 	data.size = sizeof(struct lldp_status_params_s);
887 	rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
888 
889 	return rc;
890 }
891 
892 static enum _ecore_status_t
ecore_dcbx_read_operational_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum ecore_mib_read_type type)893 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
894 				struct ecore_ptt *p_ptt,
895 				enum ecore_mib_read_type type)
896 {
897 	struct ecore_dcbx_mib_meta_data data;
898 	enum _ecore_status_t rc = ECORE_SUCCESS;
899 
900 	OSAL_MEM_ZERO(&data, sizeof(data));
901 	data.addr = p_hwfn->mcp_info->port_addr +
902 		    offsetof(struct public_port, operational_dcbx_mib);
903 	data.mib = &p_hwfn->p_dcbx_info->operational;
904 	data.size = sizeof(struct dcbx_mib);
905 	rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
906 
907 	return rc;
908 }
909 
910 static enum _ecore_status_t
ecore_dcbx_read_remote_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum ecore_mib_read_type type)911 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
912 			   struct ecore_ptt *p_ptt,
913 			   enum ecore_mib_read_type type)
914 {
915 	struct ecore_dcbx_mib_meta_data data;
916 	enum _ecore_status_t rc = ECORE_SUCCESS;
917 
918 	OSAL_MEM_ZERO(&data, sizeof(data));
919 	data.addr = p_hwfn->mcp_info->port_addr +
920 		    offsetof(struct public_port, remote_dcbx_mib);
921 	data.mib = &p_hwfn->p_dcbx_info->remote;
922 	data.size = sizeof(struct dcbx_mib);
923 	rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
924 
925 	return rc;
926 }
927 
928 static enum _ecore_status_t
ecore_dcbx_read_local_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)929 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
930 {
931 	struct ecore_dcbx_mib_meta_data data;
932 	enum _ecore_status_t rc = ECORE_SUCCESS;
933 
934 	OSAL_MEM_ZERO(&data, sizeof(data));
935 	data.addr = p_hwfn->mcp_info->port_addr +
936 			offsetof(struct public_port, local_admin_dcbx_mib);
937 	data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
938 	data.size = sizeof(struct dcbx_local_params);
939 	ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
940 			  data.addr, data.size);
941 
942 	return rc;
943 }
944 
945 static void
ecore_dcbx_read_dscp_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)946 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
947 {
948 	struct ecore_dcbx_mib_meta_data data;
949 
950 	data.addr = p_hwfn->mcp_info->port_addr +
951 			offsetof(struct public_port, dcb_dscp_map);
952 	data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
953 	data.size = sizeof(struct dcb_dscp_map);
954 	ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
955 }
956 
ecore_dcbx_read_mib(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum ecore_mib_read_type type)957 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
958 						struct ecore_ptt *p_ptt,
959 						enum ecore_mib_read_type type)
960 {
961 	enum _ecore_status_t rc = ECORE_INVAL;
962 
963 	switch (type) {
964 	case ECORE_DCBX_OPERATIONAL_MIB:
965 		ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
966 		rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
967 		break;
968 	case ECORE_DCBX_REMOTE_MIB:
969 		rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
970 		break;
971 	case ECORE_DCBX_LOCAL_MIB:
972 		rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
973 		break;
974 	case ECORE_DCBX_REMOTE_LLDP_MIB:
975 		rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
976 		break;
977 	case ECORE_DCBX_LOCAL_LLDP_MIB:
978 		rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
979 		break;
980 	default:
981 		DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
982 	}
983 
984 	return rc;
985 }
986 
987 /*
988  * Read updated MIB.
989  * Reconfigure QM and invoke PF update ramrod command if operational MIB
990  * change is detected.
991  */
992 enum _ecore_status_t
ecore_dcbx_mib_update_event(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum ecore_mib_read_type type)993 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
994 			    enum ecore_mib_read_type type)
995 {
996 	enum _ecore_status_t rc = ECORE_SUCCESS;
997 
998 	rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
999 	if (rc)
1000 		return rc;
1001 
1002 	if (type == ECORE_DCBX_OPERATIONAL_MIB) {
1003 		ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get);
1004 
1005 		rc = ecore_dcbx_process_mib_info(p_hwfn, p_ptt);
1006 		if (!rc) {
1007 			/* reconfigure tcs of QM queues according
1008 			 * to negotiation results
1009 			 */
1010 			ecore_qm_reconf(p_hwfn, p_ptt);
1011 
1012 			/* update storm FW with negotiation results */
1013 			ecore_sp_pf_update_dcbx(p_hwfn);
1014 
1015 #ifdef CONFIG_ECORE_ROCE
1016 			/* for roce PFs, we may want to enable/disable DPM
1017 			 * when DCBx change occurs
1018 			 */
1019 			if (ECORE_IS_ROCE_PERSONALITY(p_hwfn))
1020 				ecore_roce_dpm_dcbx(p_hwfn, p_ptt);
1021 #endif
1022 		}
1023 	}
1024 
1025 	ecore_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
1026 
1027 	if (type == ECORE_DCBX_OPERATIONAL_MIB) {
1028 		struct ecore_dcbx_results *p_data;
1029 		u16 val;
1030 
1031 		/* Update the DSCP to TC mapping enable bit if required */
1032 		if (p_hwfn->p_dcbx_info->dscp_nig_update) {
1033 			u8 val = !!p_hwfn->p_dcbx_info->get.dscp.enabled;
1034 			u32 addr = NIG_REG_DSCP_TO_TC_MAP_ENABLE;
1035 
1036 			rc = ecore_all_ppfids_wr(p_hwfn, p_ptt, addr, val);
1037 			if (rc != ECORE_SUCCESS) {
1038 				DP_NOTICE(p_hwfn, false,
1039 					  "Failed to update the DSCP to TC mapping enable bit\n");
1040 				return rc;
1041 			}
1042 
1043 			p_hwfn->p_dcbx_info->dscp_nig_update = false;
1044 		}
1045 
1046 		/* Configure in NIG which protocols support EDPM and should
1047 		 * honor PFC.
1048 		 */
1049 		p_data = &p_hwfn->p_dcbx_info->results;
1050 		val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
1051 			(0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
1052 		val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
1053 		val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
1054 		ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
1055 	}
1056 
1057 	OSAL_DCBX_AEN(p_hwfn, type);
1058 
1059 	return rc;
1060 }
1061 
ecore_dcbx_info_alloc(struct ecore_hwfn * p_hwfn)1062 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
1063 {
1064 #ifndef __EXTRACT__LINUX__
1065 	OSAL_BUILD_BUG_ON(ECORE_LLDP_CHASSIS_ID_STAT_LEN !=
1066 			  LLDP_CHASSIS_ID_STAT_LEN);
1067 	OSAL_BUILD_BUG_ON(ECORE_LLDP_PORT_ID_STAT_LEN !=
1068 			  LLDP_PORT_ID_STAT_LEN);
1069 	OSAL_BUILD_BUG_ON(ECORE_DCBX_MAX_APP_PROTOCOL !=
1070 			  DCBX_MAX_APP_PROTOCOL);
1071 #endif
1072 
1073 	p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
1074 					  sizeof(*p_hwfn->p_dcbx_info));
1075 	if (!p_hwfn->p_dcbx_info) {
1076 		DP_NOTICE(p_hwfn, false,
1077 			  "Failed to allocate `struct ecore_dcbx_info'");
1078 		return ECORE_NOMEM;
1079 	}
1080 
1081 	p_hwfn->p_dcbx_info->iwarp_port =
1082 		p_hwfn->pf_params.rdma_pf_params.iwarp_port;
1083 
1084 	return ECORE_SUCCESS;
1085 }
1086 
ecore_dcbx_info_free(struct ecore_hwfn * p_hwfn)1087 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn)
1088 {
1089 	OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
1090 	p_hwfn->p_dcbx_info = OSAL_NULL;
1091 }
1092 
ecore_dcbx_update_protocol_data(struct protocol_dcb_data * p_data,struct ecore_dcbx_results * p_src,enum dcbx_protocol_type type)1093 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
1094 					    struct ecore_dcbx_results *p_src,
1095 					    enum dcbx_protocol_type type)
1096 {
1097 	p_data->dcb_enable_flag = p_src->arr[type].enable;
1098 	p_data->dcb_priority = p_src->arr[type].priority;
1099 	p_data->dcb_tc = p_src->arr[type].tc;
1100 	p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
1101 	p_data->dscp_val = p_src->arr[type].dscp_val;
1102 	p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0;
1103 }
1104 
1105 /* Set pf update ramrod command params */
ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results * p_src,struct pf_update_ramrod_data * p_dest)1106 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
1107 				     struct pf_update_ramrod_data *p_dest)
1108 {
1109 	struct protocol_dcb_data *p_dcb_data;
1110 	u8 update_flag;
1111 
1112 	update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
1113 	p_dest->update_fcoe_dcb_data_mode = update_flag;
1114 
1115 	update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
1116 	p_dest->update_roce_dcb_data_mode = update_flag;
1117 
1118 	update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
1119 	p_dest->update_rroce_dcb_data_mode = update_flag;
1120 
1121 	update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
1122 	p_dest->update_iscsi_dcb_data_mode = update_flag;
1123 	update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
1124 	p_dest->update_eth_dcb_data_mode = update_flag;
1125 	update_flag = p_src->arr[DCBX_PROTOCOL_IWARP].update;
1126 	p_dest->update_iwarp_dcb_data_mode = update_flag;
1127 
1128 	p_dcb_data = &p_dest->fcoe_dcb_data;
1129 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
1130 	p_dcb_data = &p_dest->roce_dcb_data;
1131 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE);
1132 	p_dcb_data = &p_dest->rroce_dcb_data;
1133 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src,
1134 					DCBX_PROTOCOL_ROCE_V2);
1135 	p_dcb_data = &p_dest->iscsi_dcb_data;
1136 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
1137 	p_dcb_data = &p_dest->eth_dcb_data;
1138 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
1139 	p_dcb_data = &p_dest->iwarp_dcb_data;
1140 	ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_IWARP);
1141 }
1142 
ecore_dcbx_query_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_get * p_get,enum ecore_mib_read_type type)1143 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
1144 					     struct ecore_dcbx_get *p_get,
1145 					     enum ecore_mib_read_type type)
1146 {
1147 	struct ecore_ptt *p_ptt;
1148 	enum _ecore_status_t rc;
1149 
1150 	if (IS_VF(p_hwfn->p_dev))
1151 		return ECORE_INVAL;
1152 
1153 	p_ptt = ecore_ptt_acquire(p_hwfn);
1154 	if (!p_ptt)
1155 		return ECORE_TIMEOUT;
1156 
1157 	rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
1158 	if (rc != ECORE_SUCCESS)
1159 		goto out;
1160 
1161 	ecore_dcbx_get_dscp_params(p_hwfn, p_get);
1162 
1163 	rc = ecore_dcbx_get_params(p_hwfn, p_get, type);
1164 
1165 out:
1166 	ecore_ptt_release(p_hwfn, p_ptt);
1167 	return rc;
1168 }
1169 
1170 static void
ecore_dcbx_set_pfc_data(struct ecore_hwfn * p_hwfn,u32 * pfc,struct ecore_dcbx_params * p_params)1171 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
1172 			u32 *pfc, struct ecore_dcbx_params *p_params)
1173 {
1174 	u8 pfc_map = 0;
1175 	int i;
1176 
1177 	*pfc &= ~DCBX_PFC_ERROR_MASK;
1178 
1179 	if (p_params->pfc.willing)
1180 		*pfc |= DCBX_PFC_WILLING_MASK;
1181 	else
1182 		*pfc &= ~DCBX_PFC_WILLING_MASK;
1183 
1184 	if (p_params->pfc.enabled)
1185 		*pfc |= DCBX_PFC_ENABLED_MASK;
1186 	else
1187 		*pfc &= ~DCBX_PFC_ENABLED_MASK;
1188 
1189 	*pfc &= ~DCBX_PFC_CAPS_MASK;
1190 	*pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_OFFSET;
1191 
1192 	for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
1193 		if (p_params->pfc.prio[i])
1194 			pfc_map |= (1 << i);
1195 	*pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
1196 	*pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_OFFSET);
1197 
1198 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1199 }
1200 
1201 static void
ecore_dcbx_set_ets_data(struct ecore_hwfn * p_hwfn,struct dcbx_ets_feature * p_ets,struct ecore_dcbx_params * p_params)1202 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1203 			struct dcbx_ets_feature *p_ets,
1204 			struct ecore_dcbx_params *p_params)
1205 {
1206 	u8 *bw_map, *tsa_map;
1207 	u32 val;
1208 	int i;
1209 
1210 	if (p_params->ets_willing)
1211 		p_ets->flags |= DCBX_ETS_WILLING_MASK;
1212 	else
1213 		p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1214 
1215 	if (p_params->ets_cbs)
1216 		p_ets->flags |= DCBX_ETS_CBS_MASK;
1217 	else
1218 		p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1219 
1220 	if (p_params->ets_enabled)
1221 		p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1222 	else
1223 		p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1224 
1225 	p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1226 	p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_OFFSET;
1227 
1228 	bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1229 	tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1230 	p_ets->pri_tc_tbl[0] = 0;
1231 	for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1232 		bw_map[i] = p_params->ets_tc_bw_tbl[i];
1233 		tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1234 		/* Copy the priority value to the corresponding 4 bits in the
1235 		 * traffic class table.
1236 		 */
1237 		val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1238 		p_ets->pri_tc_tbl[0] |= val;
1239 	}
1240 	for (i = 0; i < 2; i++) {
1241 		p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1242 		p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1243 	}
1244 
1245 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1246 		   "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
1247 		   p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
1248 		   p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
1249 		   p_ets->tc_tsa_tbl[1]);
1250 }
1251 
1252 static void
ecore_dcbx_set_app_data(struct ecore_hwfn * p_hwfn,struct dcbx_app_priority_feature * p_app,struct ecore_dcbx_params * p_params,bool ieee)1253 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1254 			struct dcbx_app_priority_feature *p_app,
1255 			struct ecore_dcbx_params *p_params, bool ieee)
1256 {
1257 	u32 *entry;
1258 	int i;
1259 
1260 	if (p_params->app_willing)
1261 		p_app->flags |= DCBX_APP_WILLING_MASK;
1262 	else
1263 		p_app->flags &= ~DCBX_APP_WILLING_MASK;
1264 
1265 	if (p_params->app_valid)
1266 		p_app->flags |= DCBX_APP_ENABLED_MASK;
1267 	else
1268 		p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1269 
1270 	p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1271 	p_app->flags |= (u32)p_params->num_app_entries <<
1272 			DCBX_APP_NUM_ENTRIES_OFFSET;
1273 
1274 	for (i = 0; i < p_params->num_app_entries; i++) {
1275 		entry = &p_app->app_pri_tbl[i].entry;
1276 		*entry = 0;
1277 		if (ieee) {
1278 			*entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1279 			switch (p_params->app_entry[i].sf_ieee) {
1280 			case ECORE_DCBX_SF_IEEE_ETHTYPE:
1281 				*entry  |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1282 					    DCBX_APP_SF_IEEE_OFFSET);
1283 				*entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1284 					    DCBX_APP_SF_OFFSET);
1285 				break;
1286 			case ECORE_DCBX_SF_IEEE_TCP_PORT:
1287 				*entry  |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1288 					    DCBX_APP_SF_IEEE_OFFSET);
1289 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1290 					    DCBX_APP_SF_OFFSET);
1291 				break;
1292 			case ECORE_DCBX_SF_IEEE_UDP_PORT:
1293 				*entry  |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1294 					    DCBX_APP_SF_IEEE_OFFSET);
1295 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1296 					    DCBX_APP_SF_OFFSET);
1297 				break;
1298 			case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1299 				*entry  |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1300 					    DCBX_APP_SF_IEEE_OFFSET;
1301 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1302 					    DCBX_APP_SF_OFFSET);
1303 				break;
1304 			}
1305 		} else {
1306 			*entry &= ~DCBX_APP_SF_MASK;
1307 			if (p_params->app_entry[i].ethtype)
1308 				*entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1309 					    DCBX_APP_SF_OFFSET);
1310 			else
1311 				*entry  |= ((u32)DCBX_APP_SF_PORT <<
1312 					    DCBX_APP_SF_OFFSET);
1313 		}
1314 		*entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1315 		*entry |= ((u32)p_params->app_entry[i].proto_id <<
1316 			   DCBX_APP_PROTOCOL_ID_OFFSET);
1317 		*entry &= ~DCBX_APP_PRI_MAP_MASK;
1318 		*entry |= ((u32)(1 << p_params->app_entry[i].prio) <<
1319 			   DCBX_APP_PRI_MAP_OFFSET);
1320 	}
1321 
1322 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
1323 }
1324 
1325 static void
ecore_dcbx_set_local_params(struct ecore_hwfn * p_hwfn,struct dcbx_local_params * local_admin,struct ecore_dcbx_set * params)1326 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1327 			    struct dcbx_local_params *local_admin,
1328 			    struct ecore_dcbx_set *params)
1329 {
1330 	bool ieee = false;
1331 
1332 	local_admin->flags = 0;
1333 	OSAL_MEMCPY(&local_admin->features,
1334 		    &p_hwfn->p_dcbx_info->operational.features,
1335 		    sizeof(local_admin->features));
1336 
1337 	if (params->enabled) {
1338 		local_admin->config = params->ver_num;
1339 		ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1340 	} else
1341 		local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1342 
1343 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx version = %d\n",
1344 		   local_admin->config);
1345 
1346 	if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1347 		ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1348 					&params->config.params);
1349 
1350 	if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1351 		ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1352 					&params->config.params);
1353 
1354 	if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1355 		ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1356 					&params->config.params, ieee);
1357 }
1358 
1359 static enum _ecore_status_t
ecore_dcbx_set_dscp_params(struct ecore_hwfn * p_hwfn,struct dcb_dscp_map * p_dscp_map,struct ecore_dcbx_set * p_params)1360 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1361 			   struct dcb_dscp_map *p_dscp_map,
1362 			   struct ecore_dcbx_set *p_params)
1363 {
1364 	int entry, i, j;
1365 	u32 val;
1366 
1367 	OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1368 		    sizeof(*p_dscp_map));
1369 
1370 	p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1371 	if (p_params->dscp.enabled)
1372 		p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1373 
1374 	for (i = 0, entry = 0; i < 8; i++) {
1375 		val = 0;
1376 		for (j = 0; j < 8; j++, entry++)
1377 			val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1378 				(j * 4));
1379 
1380 		p_dscp_map->dscp_pri_map[i] = val;
1381 	}
1382 
1383 	p_hwfn->p_dcbx_info->dscp_nig_update = true;
1384 
1385 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
1386 	DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1387 		   "pri_map[] = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
1388 		   p_dscp_map->dscp_pri_map[0], p_dscp_map->dscp_pri_map[1],
1389 		   p_dscp_map->dscp_pri_map[2], p_dscp_map->dscp_pri_map[3],
1390 		   p_dscp_map->dscp_pri_map[4], p_dscp_map->dscp_pri_map[5],
1391 		   p_dscp_map->dscp_pri_map[6], p_dscp_map->dscp_pri_map[7]);
1392 
1393 	return ECORE_SUCCESS;
1394 }
1395 
ecore_dcbx_config_params(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct ecore_dcbx_set * params,bool hw_commit)1396 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1397 					      struct ecore_ptt *p_ptt,
1398 					      struct ecore_dcbx_set *params,
1399 					      bool hw_commit)
1400 {
1401 	struct dcbx_local_params local_admin;
1402 	struct ecore_dcbx_mib_meta_data data;
1403 	struct dcb_dscp_map dscp_map;
1404 	u32 resp = 0, param = 0;
1405 	enum _ecore_status_t rc = ECORE_SUCCESS;
1406 
1407 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1408 		    sizeof(p_hwfn->p_dcbx_info->set));
1409 	if (!hw_commit)
1410 		return ECORE_SUCCESS;
1411 
1412 	OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1413 	ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1414 
1415 	data.addr = p_hwfn->mcp_info->port_addr +
1416 			offsetof(struct public_port, local_admin_dcbx_mib);
1417 	data.local_admin = &local_admin;
1418 	data.size = sizeof(struct dcbx_local_params);
1419 	ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1420 
1421 	if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1422 		OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1423 		ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1424 
1425 		data.addr = p_hwfn->mcp_info->port_addr +
1426 				offsetof(struct public_port, dcb_dscp_map);
1427 		data.dscp_map = &dscp_map;
1428 		data.size = sizeof(struct dcb_dscp_map);
1429 		ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1430 				data.size);
1431 	}
1432 
1433 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1434 			   1 << DRV_MB_PARAM_LLDP_SEND_OFFSET, &resp, &param);
1435 	if (rc != ECORE_SUCCESS)
1436 		DP_NOTICE(p_hwfn, false,
1437 			  "Failed to send DCBX update request\n");
1438 
1439 	return rc;
1440 }
1441 
ecore_dcbx_get_config_params(struct ecore_hwfn * p_hwfn,struct ecore_dcbx_set * params)1442 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1443 						  struct ecore_dcbx_set *params)
1444 {
1445 	struct ecore_dcbx_get *dcbx_info;
1446 	enum _ecore_status_t rc;
1447 
1448 	if (p_hwfn->p_dcbx_info->set.config.valid) {
1449 		OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1450 			    sizeof(struct ecore_dcbx_set));
1451 		return ECORE_SUCCESS;
1452 	}
1453 
1454 	dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1455 			       sizeof(*dcbx_info));
1456 	if (!dcbx_info)
1457 		return ECORE_NOMEM;
1458 
1459 	OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
1460 	rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1461 				     ECORE_DCBX_OPERATIONAL_MIB);
1462 	if (rc) {
1463 		OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1464 		return rc;
1465 	}
1466 	p_hwfn->p_dcbx_info->set.override_flags = 0;
1467 
1468 	p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1469 	if (dcbx_info->operational.cee)
1470 		p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1471 	if (dcbx_info->operational.ieee)
1472 		p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1473 	if (dcbx_info->operational.local)
1474 		p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1475 
1476 	p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1477 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.dscp,
1478 		    &p_hwfn->p_dcbx_info->get.dscp,
1479 		    sizeof(struct ecore_dcbx_dscp_params));
1480 	OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1481 		    &dcbx_info->operational.params,
1482 		    sizeof(p_hwfn->p_dcbx_info->set.config.params));
1483 	p_hwfn->p_dcbx_info->set.config.valid = true;
1484 
1485 	OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1486 		    sizeof(struct ecore_dcbx_set));
1487 
1488 	OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1489 
1490 	return ECORE_SUCCESS;
1491 }
1492 
ecore_lldp_register_tlv(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,enum ecore_lldp_agent agent,u8 tlv_type)1493 enum _ecore_status_t ecore_lldp_register_tlv(struct ecore_hwfn *p_hwfn,
1494 					     struct ecore_ptt *p_ptt,
1495 					     enum ecore_lldp_agent agent,
1496 					     u8 tlv_type)
1497 {
1498 	u32 mb_param = 0, mcp_resp = 0, mcp_param = 0, val = 0;
1499 	enum _ecore_status_t rc = ECORE_SUCCESS;
1500 
1501 	switch (agent) {
1502 	case ECORE_LLDP_NEAREST_BRIDGE:
1503 		val = LLDP_NEAREST_BRIDGE;
1504 		break;
1505 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1506 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1507 		break;
1508 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1509 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1510 		break;
1511 	default:
1512 		DP_ERR(p_hwfn, "Invalid agent type %d\n", agent);
1513 		return ECORE_INVAL;
1514 	}
1515 
1516 	SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val);
1517 	SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_TLV_RX_TYPE, tlv_type);
1518 
1519 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_REGISTER_LLDP_TLVS_RX,
1520 			   mb_param, &mcp_resp, &mcp_param);
1521 	if (rc != ECORE_SUCCESS)
1522 		DP_NOTICE(p_hwfn, false, "Failed to register TLV\n");
1523 
1524 	return rc;
1525 }
1526 
1527 enum _ecore_status_t
ecore_lldp_mib_update_event(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt)1528 ecore_lldp_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
1529 {
1530 	struct ecore_dcbx_mib_meta_data data;
1531 	enum _ecore_status_t rc = ECORE_SUCCESS;
1532 	struct lldp_received_tlvs_s tlvs;
1533 	int i;
1534 
1535 	for (i = 0; i < LLDP_MAX_LLDP_AGENTS; i++) {
1536 		OSAL_MEM_ZERO(&data, sizeof(data));
1537 		data.addr = p_hwfn->mcp_info->port_addr +
1538 			    offsetof(struct public_port, lldp_received_tlvs[i]);
1539 		data.lldp_tlvs = &tlvs;
1540 		data.size = sizeof(tlvs);
1541 		rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data,
1542 					 ECORE_DCBX_LLDP_TLVS);
1543 		if (rc != ECORE_SUCCESS) {
1544 			DP_NOTICE(p_hwfn, false, "Failed to read lldp TLVs\n");
1545 			return rc;
1546 		}
1547 
1548 		if (!tlvs.length)
1549 			continue;
1550 
1551 		for (i = 0; i < MAX_TLV_BUFFER; i++)
1552 			tlvs.tlvs_buffer[i] =
1553 				OSAL_CPU_TO_BE32(tlvs.tlvs_buffer[i]);
1554 
1555 		OSAL_LLDP_RX_TLVS(p_hwfn, tlvs.tlvs_buffer, tlvs.length);
1556 	}
1557 
1558 	return rc;
1559 }
1560 
1561 enum _ecore_status_t
ecore_lldp_get_params(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct ecore_lldp_config_params * p_params)1562 ecore_lldp_get_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1563 		      struct ecore_lldp_config_params *p_params)
1564 {
1565 	struct lldp_config_params_s lldp_params;
1566 	u32 addr, val;
1567 	int i;
1568 
1569 	switch (p_params->agent) {
1570 	case ECORE_LLDP_NEAREST_BRIDGE:
1571 		val = LLDP_NEAREST_BRIDGE;
1572 		break;
1573 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1574 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1575 		break;
1576 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1577 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1578 		break;
1579 	default:
1580 		DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent);
1581 		return ECORE_INVAL;
1582 	}
1583 
1584 	addr = p_hwfn->mcp_info->port_addr +
1585 			offsetof(struct public_port, lldp_config_params[val]);
1586 
1587 	ecore_memcpy_from(p_hwfn, p_ptt, &lldp_params, addr,
1588 			  sizeof(lldp_params));
1589 
1590 	p_params->tx_interval = GET_MFW_FIELD(lldp_params.config,
1591 					      LLDP_CONFIG_TX_INTERVAL);
1592 	p_params->tx_hold = GET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_HOLD);
1593 	p_params->tx_credit = GET_MFW_FIELD(lldp_params.config,
1594 					    LLDP_CONFIG_MAX_CREDIT);
1595 	p_params->rx_enable = GET_MFW_FIELD(lldp_params.config,
1596 					    LLDP_CONFIG_ENABLE_RX);
1597 	p_params->tx_enable = GET_MFW_FIELD(lldp_params.config,
1598 					    LLDP_CONFIG_ENABLE_TX);
1599 
1600 	OSAL_MEMCPY(p_params->chassis_id_tlv, lldp_params.local_chassis_id,
1601 		    sizeof(p_params->chassis_id_tlv));
1602 	for (i = 0; i < ECORE_LLDP_CHASSIS_ID_STAT_LEN; i++)
1603 		p_params->chassis_id_tlv[i] =
1604 				OSAL_BE32_TO_CPU(p_params->chassis_id_tlv[i]);
1605 
1606 	OSAL_MEMCPY(p_params->port_id_tlv, lldp_params.local_port_id,
1607 		    sizeof(p_params->port_id_tlv));
1608 	for (i = 0; i < ECORE_LLDP_PORT_ID_STAT_LEN; i++)
1609 		p_params->port_id_tlv[i] =
1610 				OSAL_BE32_TO_CPU(p_params->port_id_tlv[i]);
1611 
1612 	return ECORE_SUCCESS;
1613 }
1614 
1615 enum _ecore_status_t
ecore_lldp_set_params(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct ecore_lldp_config_params * p_params)1616 ecore_lldp_set_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1617 		      struct ecore_lldp_config_params *p_params)
1618 {
1619 	u32 mb_param = 0, mcp_resp = 0, mcp_param = 0;
1620 	struct lldp_config_params_s lldp_params;
1621 	enum _ecore_status_t rc = ECORE_SUCCESS;
1622 	u32 addr, val;
1623 	int i;
1624 
1625 	switch (p_params->agent) {
1626 	case ECORE_LLDP_NEAREST_BRIDGE:
1627 		val = LLDP_NEAREST_BRIDGE;
1628 		break;
1629 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1630 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1631 		break;
1632 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1633 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1634 		break;
1635 	default:
1636 		DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent);
1637 		return ECORE_INVAL;
1638 	}
1639 
1640 	SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val);
1641 	addr = p_hwfn->mcp_info->port_addr +
1642 			offsetof(struct public_port, lldp_config_params[val]);
1643 
1644 	OSAL_MEMSET(&lldp_params, 0, sizeof(lldp_params));
1645 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_TX_INTERVAL,
1646 		      p_params->tx_interval);
1647 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_HOLD, p_params->tx_hold);
1648 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_MAX_CREDIT,
1649 		      p_params->tx_credit);
1650 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_ENABLE_RX,
1651 		      !!p_params->rx_enable);
1652 	SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_ENABLE_TX,
1653 		      !!p_params->tx_enable);
1654 
1655 	for (i = 0; i < ECORE_LLDP_CHASSIS_ID_STAT_LEN; i++)
1656 		p_params->chassis_id_tlv[i] =
1657 				OSAL_CPU_TO_BE32(p_params->chassis_id_tlv[i]);
1658 	OSAL_MEMCPY(lldp_params.local_chassis_id, p_params->chassis_id_tlv,
1659 		    sizeof(lldp_params.local_chassis_id));
1660 
1661 	for (i = 0; i < ECORE_LLDP_PORT_ID_STAT_LEN; i++)
1662 		p_params->port_id_tlv[i] =
1663 				OSAL_CPU_TO_BE32(p_params->port_id_tlv[i]);
1664 	OSAL_MEMCPY(lldp_params.local_port_id, p_params->port_id_tlv,
1665 		    sizeof(lldp_params.local_port_id));
1666 
1667 	ecore_memcpy_to(p_hwfn, p_ptt, addr, &lldp_params, sizeof(lldp_params));
1668 
1669 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LLDP,
1670 			   mb_param, &mcp_resp, &mcp_param);
1671 	if (rc != ECORE_SUCCESS)
1672 		DP_NOTICE(p_hwfn, false, "SET_LLDP failed, error = %d\n", rc);
1673 
1674 	return rc;
1675 }
1676 
1677 enum _ecore_status_t
ecore_lldp_set_system_tlvs(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct ecore_lldp_sys_tlvs * p_params)1678 ecore_lldp_set_system_tlvs(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1679 			   struct ecore_lldp_sys_tlvs *p_params)
1680 {
1681 	u32 mb_param = 0, mcp_resp = 0, mcp_param = 0;
1682 	enum _ecore_status_t rc = ECORE_SUCCESS;
1683 	struct lldp_system_tlvs_buffer_s lld_tlv_buf;
1684 	u32 addr, *p_val;
1685 	u8 len;
1686 	int i;
1687 
1688 	p_val = (u32 *)p_params->buf;
1689 	for (i = 0; i < ECORE_LLDP_SYS_TLV_SIZE / 4; i++)
1690 		p_val[i] = OSAL_CPU_TO_BE32(p_val[i]);
1691 
1692 	OSAL_MEMSET(&lld_tlv_buf, 0, sizeof(lld_tlv_buf));
1693 	SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_VALID, 1);
1694 	SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_MANDATORY,
1695 		      !!p_params->discard_mandatory_tlv);
1696 	SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_LENGTH,
1697 		      p_params->buf_size);
1698 	len = ECORE_LLDP_SYS_TLV_SIZE / 2;
1699 	OSAL_MEMCPY(lld_tlv_buf.data, p_params->buf, len);
1700 
1701 	addr = p_hwfn->mcp_info->port_addr +
1702 		offsetof(struct public_port, system_lldp_tlvs_buf);
1703 	ecore_memcpy_to(p_hwfn, p_ptt, addr, &lld_tlv_buf, sizeof(lld_tlv_buf));
1704 
1705 	if  (p_params->buf_size > len) {
1706 		addr = p_hwfn->mcp_info->port_addr +
1707 			offsetof(struct public_port, system_lldp_tlvs_buf2);
1708 		ecore_memcpy_to(p_hwfn, p_ptt, addr, &p_params->buf[len],
1709 				ECORE_LLDP_SYS_TLV_SIZE / 2);
1710 	}
1711 
1712 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LLDP,
1713 			   mb_param, &mcp_resp, &mcp_param);
1714 	if (rc != ECORE_SUCCESS)
1715 		DP_NOTICE(p_hwfn, false, "SET_LLDP failed, error = %d\n", rc);
1716 
1717 	return rc;
1718 }
1719 
1720 enum _ecore_status_t
ecore_dcbx_get_dscp_priority(struct ecore_hwfn * p_hwfn,u8 dscp_index,u8 * p_dscp_pri)1721 ecore_dcbx_get_dscp_priority(struct ecore_hwfn *p_hwfn,
1722 			     u8 dscp_index, u8 *p_dscp_pri)
1723 {
1724 	struct ecore_dcbx_get *p_dcbx_info;
1725 	enum _ecore_status_t rc;
1726 
1727 	if (dscp_index >= ECORE_DCBX_DSCP_SIZE) {
1728 		DP_ERR(p_hwfn, "Invalid dscp index %d\n", dscp_index);
1729 		return ECORE_INVAL;
1730 	}
1731 
1732 	p_dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1733 				 sizeof(*p_dcbx_info));
1734 	if (!p_dcbx_info)
1735 		return ECORE_NOMEM;
1736 
1737 	OSAL_MEMSET(p_dcbx_info, 0, sizeof(*p_dcbx_info));
1738 	rc = ecore_dcbx_query_params(p_hwfn, p_dcbx_info,
1739 				     ECORE_DCBX_OPERATIONAL_MIB);
1740 	if (rc) {
1741 		OSAL_FREE(p_hwfn->p_dev, p_dcbx_info);
1742 		return rc;
1743 	}
1744 
1745 	*p_dscp_pri = p_dcbx_info->dscp.dscp_pri_map[dscp_index];
1746 	OSAL_FREE(p_hwfn->p_dev, p_dcbx_info);
1747 
1748 	return ECORE_SUCCESS;
1749 }
1750 
1751 enum _ecore_status_t
ecore_dcbx_set_dscp_priority(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,u8 dscp_index,u8 pri_val)1752 ecore_dcbx_set_dscp_priority(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1753 			     u8 dscp_index, u8 pri_val)
1754 {
1755 	struct ecore_dcbx_set dcbx_set;
1756 	enum _ecore_status_t rc;
1757 
1758 	if (dscp_index >= ECORE_DCBX_DSCP_SIZE ||
1759 	    pri_val >= ECORE_MAX_PFC_PRIORITIES) {
1760 		DP_ERR(p_hwfn, "Invalid dscp params: index = %d pri = %d\n",
1761 		       dscp_index, pri_val);
1762 		return ECORE_INVAL;
1763 	}
1764 
1765 	OSAL_MEMSET(&dcbx_set, 0, sizeof(dcbx_set));
1766 	rc = ecore_dcbx_get_config_params(p_hwfn, &dcbx_set);
1767 	if (rc)
1768 		return rc;
1769 
1770 	dcbx_set.override_flags = ECORE_DCBX_OVERRIDE_DSCP_CFG;
1771 	dcbx_set.dscp.dscp_pri_map[dscp_index] = pri_val;
1772 
1773 	return ecore_dcbx_config_params(p_hwfn, p_ptt, &dcbx_set, 1);
1774 }
1775 
1776 enum _ecore_status_t
ecore_lldp_get_stats(struct ecore_hwfn * p_hwfn,struct ecore_ptt * p_ptt,struct ecore_lldp_stats * p_params)1777 ecore_lldp_get_stats(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
1778 		     struct ecore_lldp_stats *p_params)
1779 {
1780 	u32 mcp_resp = 0, mcp_param = 0, addr, val;
1781 	struct lldp_stats_stc lldp_stats;
1782 	enum _ecore_status_t rc;
1783 
1784 	switch (p_params->agent) {
1785 	case ECORE_LLDP_NEAREST_BRIDGE:
1786 		val = LLDP_NEAREST_BRIDGE;
1787 		break;
1788 	case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE:
1789 		val = LLDP_NEAREST_NON_TPMR_BRIDGE;
1790 		break;
1791 	case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE:
1792 		val = LLDP_NEAREST_CUSTOMER_BRIDGE;
1793 		break;
1794 	default:
1795 		DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent);
1796 		return ECORE_INVAL;
1797 	}
1798 
1799 	rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_GET_LLDP_STATS,
1800 			   val << DRV_MB_PARAM_LLDP_STATS_AGENT_OFFSET,
1801 			   &mcp_resp, &mcp_param);
1802 	if (rc != ECORE_SUCCESS) {
1803 		DP_ERR(p_hwfn, "GET_LLDP_STATS failed, error = %d\n", rc);
1804 		return rc;
1805 	}
1806 
1807 	addr = p_hwfn->mcp_info->drv_mb_addr +
1808 		OFFSETOF(struct public_drv_mb, union_data);
1809 
1810 	ecore_memcpy_from(p_hwfn, p_ptt, &lldp_stats, addr, sizeof(lldp_stats));
1811 
1812 	p_params->tx_frames = lldp_stats.tx_frames_total;
1813 	p_params->rx_frames = lldp_stats.rx_frames_total;
1814 	p_params->rx_discards = lldp_stats.rx_frames_discarded;
1815 	p_params->rx_age_outs = lldp_stats.rx_age_outs;
1816 
1817 	return ECORE_SUCCESS;
1818 }
1819