1 /*- 2 * Copyright (c) 1986 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Computer Consoles Inc. 7 * 8 * %sccs.include.redist.c% 9 * 10 * @(#)align.h 7.1 (Berkeley) 12/06/90 11 */ 12 13 #ifndef LOCORE 14 /* 15 * Some special registers definitions. 16 */ 17 18 #ifndef SLR 19 #define SLR 1 20 #define P0LR 3 21 #define P1LR 5 22 #define P2LR 7 23 #endif 24 25 #include "defs.h" 26 /* 27 * Definitions about the stack frame as seen by the routine 28 * 'alignment' in the kernel. If you ever wondered what's the 29 * meaning of 'machine dependent code', look here :-) 30 * This structure is partly set up by locore.s, for 'alignment', 31 * and partly by the allocation of local variables in 'alignment.c' 32 * itself. 33 * All these things are passed between procedures on the 34 * (current process' kernel) stack. The alternative (static 35 * variables) is a little bit more elegant but it works fine 36 * for one process only. Will not work for multiple processes 37 * with alignment processing or for MP models of HW. 38 * 39 * WARNING : due to the intimate relationships involved, don't 40 * change the process_info structure unless you also 41 * change the alignment trap code in locore.s AND the 42 * allocation of local variables in 'alignment.c' !! 43 */ 44 typedef struct { 45 long Saved_sp; /* For exceptions */ 46 long Saved_pc; 47 long Last_operand; /* Last operand # processed */ 48 long Opcode; /* 'offending' opcode */ 49 struct oprnd Decoded[4]; 50 long REG0; 51 long REG1; 52 long REG2; 53 long REG3; 54 long REG4; 55 long REG5; 56 long REG6; 57 long REG7; 58 long REG8; 59 long REG9; 60 long REG10; 61 long REG11; 62 long REG12; 63 long return_pc; /* Points into locore.s */ 64 long mask_restored; 65 long REG13; /* Original, from the process */ 66 long Sp; /* Alias R14 */ 67 long ret_code; 68 long ret_addr; 69 long ret_exception; /* To tell locore.s about problems */ 70 long Ach; 71 long Acl; 72 unsigned unused:30; 73 unsigned pcb_acc_pnt:1; 74 unsigned acc_dbl:1; 75 long Pc; /* Alias R15 */ 76 long Psl; 77 } process_info; 78 79 #define saved_pc (infop->Saved_pc) 80 #define saved_sp (infop->Saved_sp) 81 #define last_operand (infop->Last_operand) 82 #define opCODE (infop->Opcode) 83 #define decoded (infop->Decoded) 84 #define r0 (infop->REG0) 85 #define r1 (infop->REG1) 86 #define r2 (infop->REG2) 87 #define r3 (infop->REG3) 88 #define r4 (infop->REG4) 89 #define r5 (infop->REG5) 90 #define r6 (infop->REG6) 91 #define r7 (infop->REG7) 92 #define r8 (infop->REG8) 93 #define r9 (infop->REG9) 94 #define r10 (infop->REG10) 95 #define r11 (infop->REG11) 96 #define r12 (infop->REG12) 97 #define r13 (infop->REG13) 98 #define fp (infop->REG13) 99 #define sp (infop->Sp) 100 #define acc_high (infop->Ach) 101 #define acc_low (infop->Acl) 102 #define pc (infop->Pc) 103 #define psl (infop->Psl) 104 105 #define PCOUNTER 15 106 #define SPOINTER 14 107 108 109 /* 110 * Setting new condition codes for the process. 111 #define Set_psl(z) asm(" movl z,r6"); \ 112 asm(" andl2 $15,r6"); \ 113 asm(" mnegl $1,r7"); \ 114 asm(" xorl2 r6,r7"); \ 115 asm(" andl2 $15,r7"); \ 116 asm(" bicpsw r7"); \ 117 asm(" bispsw r6") 118 */ 119 #define Set_psl(z) asm(" andl2 $15,z"); \ 120 asm(" mnegl $1,r6"); \ 121 asm(" xorl2 z,r6"); \ 122 asm(" andl2 $15,r6"); \ 123 asm(" bicpsw r6"); \ 124 asm(" bispsw z") 125 #define New_cc(x) (x) &= PSL_ALLCC; psl = psl & ~PSL_ALLCC | (x) 126 127 #endif 128 129 /* 130 * Definitions for ret_code. NOTE : DON"T USE 0 !! locore.s knows that 131 * 0 means OK, no problems ! 132 */ 133 134 #define ILL_ADDRMOD 1 135 #define ILL_ACCESS 2 136 #define ILL_OPRND 3 137 #define ARITHMETIC 4 138 #define ALIGNMENT 5 139 140 /* 141 * For use in u.u_eosys as a flag. 142 */ 143 #define EMULATEALIGN 0x80 144