xref: /netbsd/sys/arch/powerpc/ibm4xx/pci/pchb.c (revision beecddb6)
1 /*	$NetBSD: pchb.c,v 1.16 2021/08/07 16:19:03 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: pchb.c,v 1.16 2021/08/07 16:19:03 thorpej Exp $");
34 
35 #include "pci.h"
36 
37 #ifdef _KERNEL_OPT
38 #include "opt_pci.h"
39 #endif
40 
41 #include <sys/types.h>
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/device.h>
45 #include <sys/malloc.h>
46 
47 #define _IBM4XX_BUS_DMA_PRIVATE
48 
49 #include <powerpc/ibm4xx/ibm405gp.h>
50 #include <powerpc/ibm4xx/pci_machdep.h>
51 #include <powerpc/ibm4xx/dev/plbvar.h>
52 
53 #include <dev/pci/pcivar.h>
54 #include <dev/pci/pcireg.h>
55 #include <dev/pci/pcidevs.h>
56 #include <dev/pci/pciconf.h>
57 
58 static int	pchbmatch(device_t, cfdata_t, void *);
59 static void	pchbattach(device_t, device_t, void *);
60 static int	pchbprint(void *, const char *);
61 
62 CFATTACH_DECL_NEW(pchb, 0,
63     pchbmatch, pchbattach, NULL, NULL);
64 
65 static int pcifound = 0;
66 
67 /* IO window located @ e8000000 and maps to 0-0xffff */
68 static struct powerpc_bus_space pchb_io_tag = {
69 	_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE,
70 	IBM405GP_PLB_PCI_IO_START,		/* offset */
71 	IBM405GP_PCI_PCI_IO_START,		/* extent base */
72 	IBM405GP_PCI_PCI_IO_START + 0xffff,	/* extent limit */
73 };
74 
75 /* PCI memory window is directly mapped */
76 static struct powerpc_bus_space pchb_mem_tag = {
77 	_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
78 	0x00000000,					/* offset */
79 	IBM405GP_PCI_MEM_START,			/* extent base */
80 	IBM405GP_PCI_MEM_START + 0x1fffffff,	/* extent limit */
81 };
82 
83 
84 static int
pchbmatch(device_t parent,cfdata_t cf,void * aux)85 pchbmatch(device_t parent, cfdata_t cf, void *aux)
86 {
87 	struct plb_attach_args *paa = aux;
88 	/* XXX chipset tag unused by walnut, so just pass 0 */
89 	pci_chipset_tag_t pc = ibm4xx_get_pci_chipset_tag();
90 	pcitag_t tag;
91 	int class, id;
92 
93 	/* match only pchb devices */
94 	if (strcmp(paa->plb_name, cf->cf_name) != 0)
95 		return 0;
96 
97 	ibm4xx_pci_machdep_init();
98 	tag = pci_make_tag(pc, 0, 0, 0);
99 
100 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
101 	id = pci_conf_read(pc, tag, PCI_ID_REG);
102 
103 	/*
104 	 * Match all known PCI host chipsets.
105 	 */
106 	if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
107 	    PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) {
108 		switch (PCI_VENDOR(id)) {
109 		case PCI_VENDOR_IBM:
110 			switch (PCI_PRODUCT(id)) {
111 			case PCI_PRODUCT_IBM_405GP:
112 				return (!pcifound);
113 			}
114 			break;
115 		}
116 	}
117 	return (0);
118 }
119 
120 static void
pchbattach(device_t parent,device_t self,void * aux)121 pchbattach(device_t parent, device_t self, void *aux)
122 {
123 	struct plb_attach_args *paa = aux;
124 	struct pcibus_attach_args pba;
125 	char devinfo[256];
126 #ifdef PCI_CONFIGURE_VERBOSE
127 	extern int pci_conf_debug;
128 
129 	pci_conf_debug = 1;
130 #endif
131 	pci_chipset_tag_t pc = ibm4xx_get_pci_chipset_tag();
132 	pcitag_t tag;
133 	int class, id;
134 
135 	ibm4xx_pci_machdep_init();
136 	tag = pci_make_tag(pc, 0, 0, 0);
137 
138 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
139 	id = pci_conf_read(pc, tag, PCI_ID_REG);
140 
141 	aprint_normal("\n");
142 	pcifound++;
143 	/*
144 	 * All we do is print out a description.  Eventually, we
145 	 * might want to add code that does something that's
146 	 * possibly chipset-specific.
147 	 */
148 
149 	pci_devinfo(id, class, 0, devinfo, sizeof(devinfo));
150 	aprint_normal_dev(self, "%s (rev. 0x%02x)\n", devinfo,
151 	    PCI_REVISION(class));
152 
153 	ibm4xx_pci_machdep_init(); /* Redundant... */
154 	ibm4xx_setup_pci();
155 #ifdef PCI_CONFIGURE_VERBOSE
156 	ibm4xx_show_pci_map();
157 #endif
158 
159 	if (bus_space_init(&pchb_io_tag, "pchbio", NULL, 0))
160 		panic("pchbattach: can't init IO tag");
161 	if (bus_space_init(&pchb_mem_tag, "pchbmem", NULL, 0))
162 		panic("pchbattach: can't init MEM tag");
163 
164 #ifdef PCI_NETBSD_CONFIGURE
165 	struct pciconf_resources *pcires = pciconf_resource_init();
166 
167 	pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
168 	    IBM405GP_PCI_PCI_IO_START, 0x10000);
169 	pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
170 	    IBM405GP_PCI_MEM_START, 0x20000000);
171 
172 	pci_configure_bus(pc, pcires, 0, 32);
173 	pciconf_resource_fini(pcires);
174 #endif /* PCI_NETBSD_CONFIGURE */
175 
176 #ifdef PCI_CONFIGURE_VERBOSE
177 	printf("running config_found PCI\n");
178 #endif
179 	/* IO window located @ e8000000 and maps to 0-0xffff */
180 	pba.pba_iot = &pchb_io_tag;
181 	/* PCI memory window is directly mapped */
182 	pba.pba_memt = &pchb_mem_tag;
183 	pba.pba_dmat = paa->plb_dmat;
184 	pba.pba_dmat64 = NULL;
185 	pba.pba_pc = pc;
186 	pba.pba_bus = 0;
187 	pba.pba_bridgetag = NULL;
188 	pba.pba_flags = PCI_FLAGS_MEM_OKAY | PCI_FLAGS_IO_OKAY;
189 	config_found(self, &pba, pchbprint, CFARGS_NONE);
190 }
191 
192 
193 static int
pchbprint(void * aux,const char * p)194 pchbprint(void *aux, const char *p)
195 {
196 
197 	if (p == NULL)
198 		return (UNCONF);
199 	return (QUIET);
200 }
201 
202 #if 0
203 static void
204 scan_pci_bus(void)
205 {
206 	pci_chipset_tag_t pc = ibm4xx_get_pci_chipset_tag();
207 	pcitag_t tag;
208 	int i, x;
209 
210 	for (i=0;i<32;i++){
211 		tag = pci_make_tag(pc, 0, i, 0);
212 		x = pci_conf_read(pc, tag, 0);
213 		printf("%d tag=%08x : %08x\n", i, tag, x);
214 #if 0
215 		if (PCI_VENDOR(x) == PCI_VENDOR_INTEL
216 		    && PCI_PRODUCT(x) == PCI_PRODUCT_INTEL_80960_RP) {
217 			/* Do not configure PCI bus analyzer */
218 			continue;
219 		}
220 		x = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
221 		x |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
222 		pci_conf_write(0, tag, PCI_COMMAND_STATUS_REG, x);
223 #endif
224 	}
225 }
226 #endif
227