1 // SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
2 /* Copyright 2013-2019 IBM Corp. */
3
4 #ifndef __SKIBOOT_H
5 #define __SKIBOOT_H
6
7 #include <compiler.h>
8 #include <stdint.h>
9 #include <stdbool.h>
10 #include <string.h>
11 #include <stdlib.h>
12 #include <stdio.h>
13 #include <assert.h>
14 #include <errno.h>
15 #include <bitutils.h>
16 #include <types.h>
17
18 #include <ccan/container_of/container_of.h>
19 #include <ccan/list/list.h>
20 #include <ccan/short_types/short_types.h>
21 #include <ccan/build_assert/build_assert.h>
22 #include <ccan/array_size/array_size.h>
23 #include <ccan/endian/endian.h>
24 #include <ccan/str/str.h>
25
26 #include <libflash/blocklevel.h>
27
28 #include <mem-map.h>
29 #include <op-panel.h>
30 #include <platform.h>
31
32 /* Special ELF sections */
33 #define __force_data __section(".force.data")
34
35 struct mem_region;
36 extern struct mem_region *mem_region_next(struct mem_region *region);
37
38 /* Misc linker script symbols */
39 extern char _start[];
40 extern char _head_end[];
41 extern char _stext[];
42 extern char _etext[];
43 extern char __sym_map_end[];
44 extern char _romem_end[];
45
46 #ifndef __TESTING__
47 /* Readonly section start and end. */
48 extern char __rodata_start[], __rodata_end[];
49
is_rodata(const void * p)50 static inline bool is_rodata(const void *p)
51 {
52 return ((const char *)p >= __rodata_start && (const char *)p < __rodata_end);
53 }
54 #else
is_rodata(const void * p)55 static inline bool is_rodata(const void *p)
56 {
57 return false;
58 }
59 #endif
60
61 /* Console logging
62 * Update console_get_level() if you add here
63 */
64 #define PR_EMERG 0
65 #define PR_ALERT 1
66 #define PR_CRIT 2
67 #define PR_ERR 3
68 #define PR_WARNING 4
69 #define PR_NOTICE 5
70 #define PR_PRINTF PR_NOTICE
71 #define PR_INFO 6
72 #define PR_DEBUG 7
73 #define PR_TRACE 8
74 #define PR_INSANE 9
75
76 #ifndef pr_fmt
77 #define pr_fmt(fmt) fmt
78 #endif
79
80 void _prlog(int log_level, const char* fmt, ...) __attribute__((format (printf, 2, 3)));
81 #define prlog(l, f, ...) do { _prlog(l, pr_fmt(f), ##__VA_ARGS__); } while(0)
82 #define prerror(fmt...) do { prlog(PR_ERR, fmt); } while(0)
83 #define prlog_once(arg, ...) \
84 ({ \
85 static bool __prlog_once = false; \
86 if (!__prlog_once) { \
87 __prlog_once = true; \
88 prlog(arg, ##__VA_ARGS__); \
89 } \
90 })
91
92 /* Location codes -- at most 80 chars with null termination */
93 #define LOC_CODE_SIZE 80
94
95 /* Processor generation */
96 enum proc_gen {
97 proc_gen_unknown,
98 proc_gen_p8,
99 proc_gen_p9,
100 proc_gen_p10,
101 };
102 extern enum proc_gen proc_gen;
103
104 extern unsigned int pcie_max_link_speed;
105
106 /* Convert a 4-bit number to a hex char */
107 extern char __attrconst tohex(uint8_t nibble);
108
109 #ifndef __TEST__
110 /* Bit position of the most significant 1-bit (LSB=0, MSB=63) */
ilog2(unsigned long val)111 static inline int ilog2(unsigned long val)
112 {
113 int left_zeros;
114
115 asm volatile ("cntlzd %0,%1" : "=r" (left_zeros) : "r" (val));
116
117 return 63 - left_zeros;
118 }
119
is_pow2(unsigned long val)120 static inline bool is_pow2(unsigned long val)
121 {
122 return val == (1ul << ilog2(val));
123 }
124 #endif
125
126 #define lo32(x) ((x) & 0xffffffff)
127 #define hi32(x) (((x) >> 32) & 0xffffffff)
128
129 /* WARNING: _a *MUST* be a power of two */
130 #define ALIGN_UP(_v, _a) (((_v) + (_a) - 1) & ~((_a) - 1))
131 #define ALIGN_DOWN(_v, _a) ((_v) & ~((_a) - 1))
132
133 /* TCE alignment */
134 #define TCE_SHIFT 12
135 #define TCE_PSIZE (1ul << 12)
136 #define TCE_MASK (TCE_PSIZE - 1)
137
138 /* Not the greatest variants but will do for now ... */
139 #define MIN(a, b) ((a) < (b) ? (a) : (b))
140 #define MAX(a, b) ((a) > (b) ? (a) : (b))
141
142 /* PCI Geographical Addressing */
143 #define PCI_BUS_NUM(bdfn) (((bdfn) >> 8) & 0xff)
144 #define PCI_DEV(bdfn) (((bdfn) >> 3) & 0x1f)
145 #define PCI_FUNC(bdfn) ((bdfn) & 0x07)
146
147 /*
148 * To help the FSP to distinguish between physical address and TCE mapped address.
149 * Also to help hostboot to distinguish physical and relative address.
150 */
151 #define HRMOR_BIT (1ul << 63)
152
153 /* Clean the stray high bit which the FSP inserts: we only have 52 bits real */
cleanup_addr(u64 addr)154 static inline u64 cleanup_addr(u64 addr)
155 {
156 return addr & ((1ULL << 52) - 1);
157 }
158
159 /* Start the kernel */
160 extern void start_kernel(uint64_t entry, void* fdt,
161 uint64_t mem_top) __noreturn;
162 extern void start_kernel32(uint64_t entry, void* fdt,
163 uint64_t mem_top) __noreturn;
164 extern void start_kernel_secondary(uint64_t entry) __noreturn;
165
166 /* Get description of machine from HDAT and create device-tree */
167 extern int parse_hdat(bool is_opal);
168
169 struct dt_node;
170
171 /* Add /cpus/features node for boot environment that passes an fdt */
172 extern void dt_add_cpufeatures(struct dt_node *root);
173
174 /* Root of device tree. */
175 extern struct dt_node *dt_root;
176
177 /* Full skiboot version number (possibly includes gitid). */
178 extern const char version[];
179
180 /* Debug support */
181 extern char __sym_map_start[];
182 extern char __sym_map_end[];
183 extern size_t snprintf_symbol(char *buf, size_t len, uint64_t addr);
184
185 /* Direct controls */
186 extern void direct_controls_init(void);
187 extern int64_t opal_signal_system_reset(int cpu_nr);
188
189 /* Fast reboot support */
190 extern void disable_fast_reboot(const char *reason);
191 extern void add_fast_reboot_dt_entries(void);
192 extern void fast_reboot(void);
193 extern void __noreturn __secondary_cpu_entry(void);
194 extern void __noreturn load_and_boot_kernel(bool is_reboot);
195 extern void cleanup_local_tlb(void);
196 extern void cleanup_global_tlb(void);
197 extern void init_shared_sprs(void);
198 extern void init_replicated_sprs(void);
199 extern bool start_preload_kernel(void);
200 extern void copy_exception_vectors(void);
201 extern void copy_sreset_vector(void);
202 extern void copy_sreset_vector_fast_reboot(void);
203 extern void patch_traps(bool enable);
204
205 /* Various probe routines, to replace with an initcall system */
206 extern void probe_phb3(void);
207 extern void probe_phb4(void);
208 extern int preload_capp_ucode(void);
209 extern void preload_io_vpd(void);
210 extern void probe_npu(void);
211 extern void probe_npu2(void);
212 extern void probe_npu3(void);
213 extern void uart_init(void);
214 extern void mbox_init(void);
215 extern void early_uart_init(void);
216 extern void homer_init(void);
217 extern void slw_init(void);
218 extern void add_cpu_idle_state_properties(void);
219 extern void lpc_rtc_init(void);
220
221 /* flash support */
222 struct flash_chip;
223 extern int flash_register(struct blocklevel_device *bl);
224 extern int flash_start_preload_resource(enum resource_id id, uint32_t subid,
225 void *buf, size_t *len);
226 extern int flash_resource_loaded(enum resource_id id, uint32_t idx);
227 extern bool flash_reserve(void);
228 extern void flash_release(void);
229 extern bool flash_unregister(void);
230 #define FLASH_SUBPART_ALIGNMENT 0x1000
231 #define FLASH_SUBPART_HEADER_SIZE FLASH_SUBPART_ALIGNMENT
232 extern int flash_subpart_info(void *part_header, uint32_t header_len,
233 uint32_t part_size, uint32_t *part_actual,
234 uint32_t subid, uint32_t *offset,
235 uint32_t *size);
236 extern void flash_fw_version_preload(void);
237 extern void flash_dt_add_fw_version(void);
238 extern const char *flash_map_resource_name(enum resource_id id);
239 extern int flash_secboot_info(uint32_t *total_size);
240 extern int flash_secboot_read(void *dst, uint32_t src, uint32_t len);
241 extern int flash_secboot_write(uint32_t dst, void *src, uint32_t len);
242
243 /*
244 * Decompression routines
245 *
246 * The below structure members are needed for the xz library routines,
247 * src: Source address (The compressed binary)
248 * src_size: Source size
249 * dst: Destination address (The memory area where the `src` will be
250 * decompressed)
251 * dst_size: Destination size
252 */
253 struct xz_decompress {
254 void *dst;
255 void *src;
256 size_t dst_size;
257 size_t src_size;
258 /* The status of the decompress process:
259 - OPAL_PARTIAL: if the job is in progress
260 - OPAL_SUCCESS: if the job is successful
261 - OPAL_NO_MEM: memory allocation failure
262 - OPAL_PARAMETER: If any of the above (src, dst..) are invalid or
263 if xz decompress fails. In which case the caller should check the
264 xz_error for failure reason.
265 */
266 int status;
267 int xz_error;
268 /* The decompression job, this will be freed if the caller uses
269 * `wait_xz_decompression` function, in any other case its the
270 * responsibility of caller to free the allocation job. */
271 struct cpu_job *job;
272 };
273
274 extern void xz_start_decompress(struct xz_decompress *);
275 extern void wait_xz_decompress(struct xz_decompress *);
276
277 /* NVRAM support */
278 extern void nvram_init(void);
279 extern void nvram_read_complete(bool success);
280
281 /* UART stuff */
282 enum {
283 UART_CONSOLE_OPAL,
284 UART_CONSOLE_OS
285 };
286 extern void uart_set_console_policy(int policy);
287 extern bool uart_enabled(void);
288
289 /* PRD */
290 extern void prd_psi_interrupt(uint32_t proc);
291 extern void prd_tmgt_interrupt(uint32_t proc);
292 extern void prd_occ_reset(uint32_t proc);
293 extern void prd_sbe_passthrough(uint32_t proc);
294 extern void prd_init(void);
295 extern void prd_register_reserved_memory(void);
296 extern void prd_fsp_occ_reset(uint32_t proc);
297 extern void prd_fsp_occ_load_start(u32 proc);
298 extern void prd_fw_resp_fsp_response(int status);
299 extern int prd_hbrt_fsp_msg_notify(void *data, u32 dsize);
300
301 /* Flatten device-tree */
302 extern void *create_dtb(const struct dt_node *root, bool exclusive);
303
304 /* Track failure in Wakup engine */
305 enum wakeup_engine_states {
306 WAKEUP_ENGINE_NOT_PRESENT,
307 WAKEUP_ENGINE_PRESENT,
308 WAKEUP_ENGINE_FAILED
309 };
310 extern enum wakeup_engine_states wakeup_engine_state;
311 extern bool has_deep_states;
312 extern void nx_p9_rng_late_init(void);
313
314
315
316 /* SLW reinit function for switching core settings */
317 extern int64_t slw_reinit(uint64_t flags);
318
319 /* Patch SPR in SLW image */
320 extern int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
321
322 extern void fast_sleep_exit(void);
323
324 /* Fallback fake RTC */
325 extern void fake_rtc_init(void);
326
327 /* Exceptions */
328 struct stack_frame;
329 extern void exception_entry(struct stack_frame *stack);
330 extern void exception_entry_pm_sreset(void);
331 extern void __noreturn exception_entry_pm_mce(void);
332
333 /* Assembly in head.S */
334 extern void disable_machine_check(void);
335 extern void enable_machine_check(void);
336 extern unsigned int enter_p8_pm_state(bool winkle);
337 extern unsigned int enter_p9_pm_state(uint64_t psscr);
338 extern void enter_p9_pm_lite_state(uint64_t psscr);
339 extern uint32_t reset_patch_start;
340 extern uint32_t reset_patch_end;
341 extern uint32_t reset_fast_reboot_patch_start;
342 extern uint32_t reset_fast_reboot_patch_end;
343
344 /* Fallback fake NVRAM */
345 extern int fake_nvram_info(uint32_t *total_size);
346 extern int fake_nvram_start_read(void *dst, uint32_t src, uint32_t len);
347 extern int fake_nvram_write(uint32_t offset, void *src, uint32_t size);
348
349 #endif /* __SKIBOOT_H */
350