1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2017-2019, Linaro Ltd.
5 */
6
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/random.h>
12 #include <linux/slab.h>
13 #include <linux/soc/qcom/smem.h>
14 #include <linux/soc/qcom/socinfo.h>
15 #include <linux/string.h>
16 #include <linux/stringify.h>
17 #include <linux/sys_soc.h>
18 #include <linux/types.h>
19
20 #include <asm/unaligned.h>
21
22 #include <dt-bindings/arm/qcom,ids.h>
23
24 /*
25 * SoC version type with major number in the upper 16 bits and minor
26 * number in the lower 16 bits.
27 */
28 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
29 #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
30 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
31
32 /* Helper macros to create soc_id table */
33 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id)
34 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name)
35
36 #ifdef CONFIG_DEBUG_FS
37 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
38 #define SMEM_IMAGE_VERSION_SIZE 4096
39 #define SMEM_IMAGE_VERSION_NAME_SIZE 75
40 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20
41 #define SMEM_IMAGE_VERSION_OEM_SIZE 32
42
43 /*
44 * SMEM Image table indices
45 */
46 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0
47 #define SMEM_IMAGE_TABLE_TZ_INDEX 1
48 #define SMEM_IMAGE_TABLE_RPM_INDEX 3
49 #define SMEM_IMAGE_TABLE_APPS_INDEX 10
50 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11
51 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12
52 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13
53 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14
54 #define SMEM_IMAGE_TABLE_DSPS_INDEX 15
55 #define SMEM_IMAGE_TABLE_CDSP_INDEX 16
56 #define SMEM_IMAGE_TABLE_CDSP1_INDEX 19
57 #define SMEM_IMAGE_TABLE_GPDSP_INDEX 20
58 #define SMEM_IMAGE_TABLE_GPDSP1_INDEX 21
59 #define SMEM_IMAGE_VERSION_TABLE 469
60
61 /*
62 * SMEM Image table names
63 */
64 static const char *const socinfo_image_names[] = {
65 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
66 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
67 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
68 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
69 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
70 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
71 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
72 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
73 [SMEM_IMAGE_TABLE_DSPS_INDEX] = "dsps",
74 [SMEM_IMAGE_TABLE_CDSP_INDEX] = "cdsp",
75 [SMEM_IMAGE_TABLE_CDSP1_INDEX] = "cdsp1",
76 [SMEM_IMAGE_TABLE_GPDSP_INDEX] = "gpdsp",
77 [SMEM_IMAGE_TABLE_GPDSP1_INDEX] = "gpdsp1",
78 };
79
80 static const char *const pmic_models[] = {
81 [0] = "Unknown PMIC model",
82 [1] = "PM8941",
83 [2] = "PM8841",
84 [3] = "PM8019",
85 [4] = "PM8226",
86 [5] = "PM8110",
87 [6] = "PMA8084",
88 [7] = "PMI8962",
89 [8] = "PMD9635",
90 [9] = "PM8994",
91 [10] = "PMI8994",
92 [11] = "PM8916",
93 [12] = "PM8004",
94 [13] = "PM8909/PM8058",
95 [14] = "PM8028",
96 [15] = "PM8901",
97 [16] = "PM8950/PM8027",
98 [17] = "PMI8950/ISL9519",
99 [18] = "PMK8001/PM8921",
100 [19] = "PMI8996/PM8018",
101 [20] = "PM8998/PM8015",
102 [21] = "PMI8998/PM8014",
103 [22] = "PM8821",
104 [23] = "PM8038",
105 [24] = "PM8005/PM8922",
106 [25] = "PM8917/PM8937",
107 [26] = "PM660L",
108 [27] = "PM660",
109 [30] = "PM8150",
110 [31] = "PM8150L",
111 [32] = "PM8150B",
112 [33] = "PMK8002",
113 [36] = "PM8009",
114 [37] = "PMI632",
115 [38] = "PM8150C",
116 [40] = "PM6150",
117 [41] = "SMB2351",
118 [44] = "PM8008",
119 [45] = "PM6125",
120 [46] = "PM7250B",
121 [47] = "PMK8350",
122 [48] = "PM8350",
123 [49] = "PM8350C",
124 [50] = "PM8350B",
125 [51] = "PMR735A",
126 [52] = "PMR735B",
127 [55] = "PM4125",
128 [58] = "PM8450",
129 [65] = "PM8010",
130 [69] = "PM8550VS",
131 [70] = "PM8550VE",
132 [71] = "PM8550B",
133 [72] = "PMR735D",
134 [73] = "PM8550",
135 [74] = "PMK8550",
136 [82] = "SMB2360",
137 };
138
139 struct socinfo_params {
140 u32 raw_device_family;
141 u32 hw_plat_subtype;
142 u32 accessory_chip;
143 u32 raw_device_num;
144 u32 chip_family;
145 u32 foundry_id;
146 u32 plat_ver;
147 u32 raw_ver;
148 u32 hw_plat;
149 u32 fmt;
150 u32 nproduct_id;
151 u32 num_clusters;
152 u32 ncluster_array_offset;
153 u32 num_subset_parts;
154 u32 nsubset_parts_array_offset;
155 u32 nmodem_supported;
156 u32 feature_code;
157 u32 pcode;
158 u32 oem_variant;
159 u32 num_func_clusters;
160 u32 boot_cluster;
161 u32 boot_core;
162 };
163
164 struct smem_image_version {
165 char name[SMEM_IMAGE_VERSION_NAME_SIZE];
166 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
167 char pad;
168 char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
169 };
170 #endif /* CONFIG_DEBUG_FS */
171
172 struct qcom_socinfo {
173 struct soc_device *soc_dev;
174 struct soc_device_attribute attr;
175 #ifdef CONFIG_DEBUG_FS
176 struct dentry *dbg_root;
177 struct socinfo_params info;
178 #endif /* CONFIG_DEBUG_FS */
179 };
180
181 struct soc_id {
182 unsigned int id;
183 const char *name;
184 };
185
186 static const struct soc_id soc_id[] = {
187 { qcom_board_id(MSM8260) },
188 { qcom_board_id(MSM8660) },
189 { qcom_board_id(APQ8060) },
190 { qcom_board_id(MSM8960) },
191 { qcom_board_id(APQ8064) },
192 { qcom_board_id(MSM8930) },
193 { qcom_board_id(MSM8630) },
194 { qcom_board_id(MSM8230) },
195 { qcom_board_id(APQ8030) },
196 { qcom_board_id(MSM8627) },
197 { qcom_board_id(MSM8227) },
198 { qcom_board_id(MSM8660A) },
199 { qcom_board_id(MSM8260A) },
200 { qcom_board_id(APQ8060A) },
201 { qcom_board_id(MSM8974) },
202 { qcom_board_id(MSM8225) },
203 { qcom_board_id(MSM8625) },
204 { qcom_board_id(MPQ8064) },
205 { qcom_board_id(MSM8960AB) },
206 { qcom_board_id(APQ8060AB) },
207 { qcom_board_id(MSM8260AB) },
208 { qcom_board_id(MSM8660AB) },
209 { qcom_board_id(MSM8930AA) },
210 { qcom_board_id(MSM8630AA) },
211 { qcom_board_id(MSM8230AA) },
212 { qcom_board_id(MSM8626) },
213 { qcom_board_id(MSM8610) },
214 { qcom_board_id(APQ8064AB) },
215 { qcom_board_id(MSM8930AB) },
216 { qcom_board_id(MSM8630AB) },
217 { qcom_board_id(MSM8230AB) },
218 { qcom_board_id(APQ8030AB) },
219 { qcom_board_id(MSM8226) },
220 { qcom_board_id(MSM8526) },
221 { qcom_board_id(APQ8030AA) },
222 { qcom_board_id(MSM8110) },
223 { qcom_board_id(MSM8210) },
224 { qcom_board_id(MSM8810) },
225 { qcom_board_id(MSM8212) },
226 { qcom_board_id(MSM8612) },
227 { qcom_board_id(MSM8112) },
228 { qcom_board_id(MSM8125) },
229 { qcom_board_id(MSM8225Q) },
230 { qcom_board_id(MSM8625Q) },
231 { qcom_board_id(MSM8125Q) },
232 { qcom_board_id(APQ8064AA) },
233 { qcom_board_id(APQ8084) },
234 { qcom_board_id(MSM8130) },
235 { qcom_board_id(MSM8130AA) },
236 { qcom_board_id(MSM8130AB) },
237 { qcom_board_id(MSM8627AA) },
238 { qcom_board_id(MSM8227AA) },
239 { qcom_board_id(APQ8074) },
240 { qcom_board_id(MSM8274) },
241 { qcom_board_id(MSM8674) },
242 { qcom_board_id(MDM9635) },
243 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") },
244 { qcom_board_id(MSM8126) },
245 { qcom_board_id(APQ8026) },
246 { qcom_board_id(MSM8926) },
247 { qcom_board_id(IPQ8062) },
248 { qcom_board_id(IPQ8064) },
249 { qcom_board_id(IPQ8066) },
250 { qcom_board_id(IPQ8068) },
251 { qcom_board_id(MSM8326) },
252 { qcom_board_id(MSM8916) },
253 { qcom_board_id(MSM8994) },
254 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") },
255 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") },
256 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") },
257 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") },
258 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") },
259 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") },
260 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") },
261 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") },
262 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") },
263 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") },
264 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") },
265 { qcom_board_id(APQ8028) },
266 { qcom_board_id(MSM8128) },
267 { qcom_board_id(MSM8228) },
268 { qcom_board_id(MSM8528) },
269 { qcom_board_id(MSM8628) },
270 { qcom_board_id(MSM8928) },
271 { qcom_board_id(MSM8510) },
272 { qcom_board_id(MSM8512) },
273 { qcom_board_id(MSM8936) },
274 { qcom_board_id(MDM9640) },
275 { qcom_board_id(MSM8939) },
276 { qcom_board_id(APQ8036) },
277 { qcom_board_id(APQ8039) },
278 { qcom_board_id(MSM8236) },
279 { qcom_board_id(MSM8636) },
280 { qcom_board_id(MSM8909) },
281 { qcom_board_id(MSM8996) },
282 { qcom_board_id(APQ8016) },
283 { qcom_board_id(MSM8216) },
284 { qcom_board_id(MSM8116) },
285 { qcom_board_id(MSM8616) },
286 { qcom_board_id(MSM8992) },
287 { qcom_board_id(APQ8092) },
288 { qcom_board_id(APQ8094) },
289 { qcom_board_id(MSM8209) },
290 { qcom_board_id(MSM8208) },
291 { qcom_board_id(MDM9209) },
292 { qcom_board_id(MDM9309) },
293 { qcom_board_id(MDM9609) },
294 { qcom_board_id(MSM8239) },
295 { qcom_board_id(MSM8952) },
296 { qcom_board_id(APQ8009) },
297 { qcom_board_id(MSM8956) },
298 { qcom_board_id(MSM8929) },
299 { qcom_board_id(MSM8629) },
300 { qcom_board_id(MSM8229) },
301 { qcom_board_id(APQ8029) },
302 { qcom_board_id(APQ8056) },
303 { qcom_board_id(MSM8609) },
304 { qcom_board_id(APQ8076) },
305 { qcom_board_id(MSM8976) },
306 { qcom_board_id(IPQ8065) },
307 { qcom_board_id(IPQ8069) },
308 { qcom_board_id(MDM9650) },
309 { qcom_board_id(MDM9655) },
310 { qcom_board_id(MDM9250) },
311 { qcom_board_id(MDM9255) },
312 { qcom_board_id(MDM9350) },
313 { qcom_board_id(APQ8052) },
314 { qcom_board_id(MDM9607) },
315 { qcom_board_id(APQ8096) },
316 { qcom_board_id(MSM8998) },
317 { qcom_board_id(MSM8953) },
318 { qcom_board_id(MSM8937) },
319 { qcom_board_id(APQ8037) },
320 { qcom_board_id(MDM8207) },
321 { qcom_board_id(MDM9207) },
322 { qcom_board_id(MDM9307) },
323 { qcom_board_id(MDM9628) },
324 { qcom_board_id(MSM8909W) },
325 { qcom_board_id(APQ8009W) },
326 { qcom_board_id(MSM8996L) },
327 { qcom_board_id(MSM8917) },
328 { qcom_board_id(APQ8053) },
329 { qcom_board_id(MSM8996SG) },
330 { qcom_board_id(APQ8017) },
331 { qcom_board_id(MSM8217) },
332 { qcom_board_id(MSM8617) },
333 { qcom_board_id(MSM8996AU) },
334 { qcom_board_id(APQ8096AU) },
335 { qcom_board_id(APQ8096SG) },
336 { qcom_board_id(MSM8940) },
337 { qcom_board_id(SDX201) },
338 { qcom_board_id(SDM660) },
339 { qcom_board_id(SDM630) },
340 { qcom_board_id(APQ8098) },
341 { qcom_board_id(MSM8920) },
342 { qcom_board_id(SDM845) },
343 { qcom_board_id(MDM9206) },
344 { qcom_board_id(IPQ8074) },
345 { qcom_board_id(SDA660) },
346 { qcom_board_id(SDM658) },
347 { qcom_board_id(SDA658) },
348 { qcom_board_id(SDA630) },
349 { qcom_board_id(MSM8905) },
350 { qcom_board_id(SDX202) },
351 { qcom_board_id(SDM450) },
352 { qcom_board_id(SM8150) },
353 { qcom_board_id(SDA845) },
354 { qcom_board_id(IPQ8072) },
355 { qcom_board_id(IPQ8076) },
356 { qcom_board_id(IPQ8078) },
357 { qcom_board_id(SDM636) },
358 { qcom_board_id(SDA636) },
359 { qcom_board_id(SDM632) },
360 { qcom_board_id(SDA632) },
361 { qcom_board_id(SDA450) },
362 { qcom_board_id(SDM439) },
363 { qcom_board_id(SDM429) },
364 { qcom_board_id(SM8250) },
365 { qcom_board_id(SA8155) },
366 { qcom_board_id(SDA439) },
367 { qcom_board_id(SDA429) },
368 { qcom_board_id(SM7150) },
369 { qcom_board_id(SM7150P) },
370 { qcom_board_id(IPQ8070) },
371 { qcom_board_id(IPQ8071) },
372 { qcom_board_id(QM215) },
373 { qcom_board_id(IPQ8072A) },
374 { qcom_board_id(IPQ8074A) },
375 { qcom_board_id(IPQ8076A) },
376 { qcom_board_id(IPQ8078A) },
377 { qcom_board_id(SM6125) },
378 { qcom_board_id(IPQ8070A) },
379 { qcom_board_id(IPQ8071A) },
380 { qcom_board_id(IPQ8172) },
381 { qcom_board_id(IPQ8173) },
382 { qcom_board_id(IPQ8174) },
383 { qcom_board_id(IPQ6018) },
384 { qcom_board_id(IPQ6028) },
385 { qcom_board_id(SDM429W) },
386 { qcom_board_id(SM4250) },
387 { qcom_board_id(IPQ6000) },
388 { qcom_board_id(IPQ6010) },
389 { qcom_board_id(SC7180) },
390 { qcom_board_id(SM6350) },
391 { qcom_board_id(QCM2150) },
392 { qcom_board_id(SDA429W) },
393 { qcom_board_id(SM8350) },
394 { qcom_board_id(QCM2290) },
395 { qcom_board_id(SM7125) },
396 { qcom_board_id(SM6115) },
397 { qcom_board_id(IPQ5010) },
398 { qcom_board_id(IPQ5018) },
399 { qcom_board_id(IPQ5028) },
400 { qcom_board_id(SC8280XP) },
401 { qcom_board_id(IPQ6005) },
402 { qcom_board_id(QRB5165) },
403 { qcom_board_id(SM8450) },
404 { qcom_board_id(SM7225) },
405 { qcom_board_id(SA8295P) },
406 { qcom_board_id(SA8540P) },
407 { qcom_board_id(QCM4290) },
408 { qcom_board_id(QCS4290) },
409 { qcom_board_id_named(SM8450_2, "SM8450") },
410 { qcom_board_id_named(SM8450_3, "SM8450") },
411 { qcom_board_id(SC7280) },
412 { qcom_board_id(SC7180P) },
413 { qcom_board_id(QCM6490) },
414 { qcom_board_id(IPQ5000) },
415 { qcom_board_id(IPQ0509) },
416 { qcom_board_id(IPQ0518) },
417 { qcom_board_id(SM6375) },
418 { qcom_board_id(IPQ9514) },
419 { qcom_board_id(IPQ9550) },
420 { qcom_board_id(IPQ9554) },
421 { qcom_board_id(IPQ9570) },
422 { qcom_board_id(IPQ9574) },
423 { qcom_board_id(SM8550) },
424 { qcom_board_id(IPQ5016) },
425 { qcom_board_id(IPQ9510) },
426 { qcom_board_id(QRB4210) },
427 { qcom_board_id(QRB2210) },
428 { qcom_board_id(SM8475) },
429 { qcom_board_id(SM8475P) },
430 { qcom_board_id(SA8775P) },
431 { qcom_board_id(QRU1000) },
432 { qcom_board_id(SM8475_2) },
433 { qcom_board_id(QDU1000) },
434 { qcom_board_id(X1E80100) },
435 { qcom_board_id(SM8650) },
436 { qcom_board_id(SM4450) },
437 { qcom_board_id(QDU1010) },
438 { qcom_board_id(QRU1032) },
439 { qcom_board_id(QRU1052) },
440 { qcom_board_id(QRU1062) },
441 { qcom_board_id(IPQ5332) },
442 { qcom_board_id(IPQ5322) },
443 { qcom_board_id(IPQ5312) },
444 { qcom_board_id(IPQ5302) },
445 { qcom_board_id(QCS8550) },
446 { qcom_board_id(QCM8550) },
447 { qcom_board_id(IPQ5300) },
448 };
449
socinfo_machine(struct device * dev,unsigned int id)450 static const char *socinfo_machine(struct device *dev, unsigned int id)
451 {
452 int idx;
453
454 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
455 if (soc_id[idx].id == id)
456 return soc_id[idx].name;
457 }
458
459 return NULL;
460 }
461
462 #ifdef CONFIG_DEBUG_FS
463
464 #define QCOM_OPEN(name, _func) \
465 static int qcom_open_##name(struct inode *inode, struct file *file) \
466 { \
467 return single_open(file, _func, inode->i_private); \
468 } \
469 \
470 static const struct file_operations qcom_ ##name## _ops = { \
471 .open = qcom_open_##name, \
472 .read = seq_read, \
473 .llseek = seq_lseek, \
474 .release = single_release, \
475 }
476
477 #define DEBUGFS_ADD(info, name) \
478 debugfs_create_file(__stringify(name), 0444, \
479 qcom_socinfo->dbg_root, \
480 info, &qcom_ ##name## _ops)
481
482
qcom_show_build_id(struct seq_file * seq,void * p)483 static int qcom_show_build_id(struct seq_file *seq, void *p)
484 {
485 struct socinfo *socinfo = seq->private;
486
487 seq_printf(seq, "%s\n", socinfo->build_id);
488
489 return 0;
490 }
491
qcom_show_pmic_model(struct seq_file * seq,void * p)492 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
493 {
494 struct socinfo *socinfo = seq->private;
495 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
496
497 if (model < 0)
498 return -EINVAL;
499
500 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
501 seq_printf(seq, "%s\n", pmic_models[model]);
502 else
503 seq_printf(seq, "unknown (%d)\n", model);
504
505 return 0;
506 }
507
qcom_show_pmic_model_array(struct seq_file * seq,void * p)508 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p)
509 {
510 struct socinfo *socinfo = seq->private;
511 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics);
512 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset);
513 int i;
514 void *ptr = socinfo;
515
516 ptr += pmic_array_offset;
517
518 /* No need for bounds checking, it happened at socinfo_debugfs_init */
519 for (i = 0; i < num_pmics; i++) {
520 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32)));
521 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32));
522
523 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
524 seq_printf(seq, "%s %u.%u\n", pmic_models[model],
525 SOCINFO_MAJOR(die_rev),
526 SOCINFO_MINOR(die_rev));
527 else
528 seq_printf(seq, "unknown (%d)\n", model);
529 }
530
531 return 0;
532 }
533
qcom_show_pmic_die_revision(struct seq_file * seq,void * p)534 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
535 {
536 struct socinfo *socinfo = seq->private;
537
538 seq_printf(seq, "%u.%u\n",
539 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
540 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
541
542 return 0;
543 }
544
qcom_show_chip_id(struct seq_file * seq,void * p)545 static int qcom_show_chip_id(struct seq_file *seq, void *p)
546 {
547 struct socinfo *socinfo = seq->private;
548
549 seq_printf(seq, "%s\n", socinfo->chip_id);
550
551 return 0;
552 }
553
554 QCOM_OPEN(build_id, qcom_show_build_id);
555 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
556 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array);
557 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
558 QCOM_OPEN(chip_id, qcom_show_chip_id);
559
560 #define DEFINE_IMAGE_OPS(type) \
561 static int show_image_##type(struct seq_file *seq, void *p) \
562 { \
563 struct smem_image_version *image_version = seq->private; \
564 if (image_version->type[0] != '\0') \
565 seq_printf(seq, "%s\n", image_version->type); \
566 return 0; \
567 } \
568 static int open_image_##type(struct inode *inode, struct file *file) \
569 { \
570 return single_open(file, show_image_##type, inode->i_private); \
571 } \
572 \
573 static const struct file_operations qcom_image_##type##_ops = { \
574 .open = open_image_##type, \
575 .read = seq_read, \
576 .llseek = seq_lseek, \
577 .release = single_release, \
578 }
579
580 DEFINE_IMAGE_OPS(name);
581 DEFINE_IMAGE_OPS(variant);
582 DEFINE_IMAGE_OPS(oem);
583
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)584 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
585 struct socinfo *info, size_t info_size)
586 {
587 struct smem_image_version *versions;
588 struct dentry *dentry;
589 size_t size;
590 int i;
591 unsigned int num_pmics;
592 unsigned int pmic_array_offset;
593
594 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
595
596 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
597
598 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root,
599 &qcom_socinfo->info.fmt);
600
601 switch (qcom_socinfo->info.fmt) {
602 case SOCINFO_VERSION(0, 19):
603 qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters);
604 qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster);
605 qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core);
606
607 debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root,
608 &qcom_socinfo->info.num_func_clusters);
609 debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root,
610 &qcom_socinfo->info.boot_cluster);
611 debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root,
612 &qcom_socinfo->info.boot_core);
613 fallthrough;
614 case SOCINFO_VERSION(0, 18):
615 case SOCINFO_VERSION(0, 17):
616 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant);
617 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root,
618 &qcom_socinfo->info.oem_variant);
619 fallthrough;
620 case SOCINFO_VERSION(0, 16):
621 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code);
622 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode);
623
624 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root,
625 &qcom_socinfo->info.feature_code);
626 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root,
627 &qcom_socinfo->info.pcode);
628 fallthrough;
629 case SOCINFO_VERSION(0, 15):
630 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
631
632 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root,
633 &qcom_socinfo->info.nmodem_supported);
634 fallthrough;
635 case SOCINFO_VERSION(0, 14):
636 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
637 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
638 qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts);
639 qcom_socinfo->info.nsubset_parts_array_offset =
640 __le32_to_cpu(info->nsubset_parts_array_offset);
641
642 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root,
643 &qcom_socinfo->info.num_clusters);
644 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root,
645 &qcom_socinfo->info.ncluster_array_offset);
646 debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root,
647 &qcom_socinfo->info.num_subset_parts);
648 debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root,
649 &qcom_socinfo->info.nsubset_parts_array_offset);
650 fallthrough;
651 case SOCINFO_VERSION(0, 13):
652 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
653
654 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root,
655 &qcom_socinfo->info.nproduct_id);
656 DEBUGFS_ADD(info, chip_id);
657 fallthrough;
658 case SOCINFO_VERSION(0, 12):
659 qcom_socinfo->info.chip_family =
660 __le32_to_cpu(info->chip_family);
661 qcom_socinfo->info.raw_device_family =
662 __le32_to_cpu(info->raw_device_family);
663 qcom_socinfo->info.raw_device_num =
664 __le32_to_cpu(info->raw_device_num);
665
666 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root,
667 &qcom_socinfo->info.chip_family);
668 debugfs_create_x32("raw_device_family", 0444,
669 qcom_socinfo->dbg_root,
670 &qcom_socinfo->info.raw_device_family);
671 debugfs_create_x32("raw_device_number", 0444,
672 qcom_socinfo->dbg_root,
673 &qcom_socinfo->info.raw_device_num);
674 fallthrough;
675 case SOCINFO_VERSION(0, 11):
676 num_pmics = le32_to_cpu(info->num_pmics);
677 pmic_array_offset = le32_to_cpu(info->pmic_array_offset);
678 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size)
679 DEBUGFS_ADD(info, pmic_model_array);
680 fallthrough;
681 case SOCINFO_VERSION(0, 10):
682 case SOCINFO_VERSION(0, 9):
683 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
684
685 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root,
686 &qcom_socinfo->info.foundry_id);
687 fallthrough;
688 case SOCINFO_VERSION(0, 8):
689 case SOCINFO_VERSION(0, 7):
690 DEBUGFS_ADD(info, pmic_model);
691 DEBUGFS_ADD(info, pmic_die_rev);
692 fallthrough;
693 case SOCINFO_VERSION(0, 6):
694 qcom_socinfo->info.hw_plat_subtype =
695 __le32_to_cpu(info->hw_plat_subtype);
696
697 debugfs_create_u32("hardware_platform_subtype", 0444,
698 qcom_socinfo->dbg_root,
699 &qcom_socinfo->info.hw_plat_subtype);
700 fallthrough;
701 case SOCINFO_VERSION(0, 5):
702 qcom_socinfo->info.accessory_chip =
703 __le32_to_cpu(info->accessory_chip);
704
705 debugfs_create_u32("accessory_chip", 0444,
706 qcom_socinfo->dbg_root,
707 &qcom_socinfo->info.accessory_chip);
708 fallthrough;
709 case SOCINFO_VERSION(0, 4):
710 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
711
712 debugfs_create_u32("platform_version", 0444,
713 qcom_socinfo->dbg_root,
714 &qcom_socinfo->info.plat_ver);
715 fallthrough;
716 case SOCINFO_VERSION(0, 3):
717 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
718
719 debugfs_create_u32("hardware_platform", 0444,
720 qcom_socinfo->dbg_root,
721 &qcom_socinfo->info.hw_plat);
722 fallthrough;
723 case SOCINFO_VERSION(0, 2):
724 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver);
725
726 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root,
727 &qcom_socinfo->info.raw_ver);
728 fallthrough;
729 case SOCINFO_VERSION(0, 1):
730 DEBUGFS_ADD(info, build_id);
731 break;
732 }
733
734 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
735 &size);
736
737 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
738 if (!socinfo_image_names[i])
739 continue;
740
741 dentry = debugfs_create_dir(socinfo_image_names[i],
742 qcom_socinfo->dbg_root);
743 debugfs_create_file("name", 0444, dentry, &versions[i],
744 &qcom_image_name_ops);
745 debugfs_create_file("variant", 0444, dentry, &versions[i],
746 &qcom_image_variant_ops);
747 debugfs_create_file("oem", 0444, dentry, &versions[i],
748 &qcom_image_oem_ops);
749 }
750 }
751
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)752 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
753 {
754 debugfs_remove_recursive(qcom_socinfo->dbg_root);
755 }
756 #else
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)757 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
758 struct socinfo *info, size_t info_size)
759 {
760 }
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)761 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { }
762 #endif /* CONFIG_DEBUG_FS */
763
qcom_socinfo_probe(struct platform_device * pdev)764 static int qcom_socinfo_probe(struct platform_device *pdev)
765 {
766 struct qcom_socinfo *qs;
767 struct socinfo *info;
768 size_t item_size;
769
770 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
771 &item_size);
772 if (IS_ERR(info)) {
773 dev_err(&pdev->dev, "Couldn't find socinfo\n");
774 return PTR_ERR(info);
775 }
776
777 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
778 if (!qs)
779 return -ENOMEM;
780
781 qs->attr.family = "Snapdragon";
782 qs->attr.machine = socinfo_machine(&pdev->dev,
783 le32_to_cpu(info->id));
784 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
785 le32_to_cpu(info->id));
786 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
787 SOCINFO_MAJOR(le32_to_cpu(info->ver)),
788 SOCINFO_MINOR(le32_to_cpu(info->ver)));
789 if (offsetof(struct socinfo, serial_num) <= item_size)
790 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
791 "%u",
792 le32_to_cpu(info->serial_num));
793
794 qs->soc_dev = soc_device_register(&qs->attr);
795 if (IS_ERR(qs->soc_dev))
796 return PTR_ERR(qs->soc_dev);
797
798 socinfo_debugfs_init(qs, info, item_size);
799
800 /* Feed the soc specific unique data into entropy pool */
801 add_device_randomness(info, item_size);
802
803 platform_set_drvdata(pdev, qs);
804
805 return 0;
806 }
807
qcom_socinfo_remove(struct platform_device * pdev)808 static void qcom_socinfo_remove(struct platform_device *pdev)
809 {
810 struct qcom_socinfo *qs = platform_get_drvdata(pdev);
811
812 soc_device_unregister(qs->soc_dev);
813
814 socinfo_debugfs_exit(qs);
815 }
816
817 static struct platform_driver qcom_socinfo_driver = {
818 .probe = qcom_socinfo_probe,
819 .remove_new = qcom_socinfo_remove,
820 .driver = {
821 .name = "qcom-socinfo",
822 },
823 };
824
825 module_platform_driver(qcom_socinfo_driver);
826
827 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
828 MODULE_LICENSE("GPL v2");
829 MODULE_ALIAS("platform:qcom-socinfo");
830