xref: /openbsd/sys/dev/sbus/sbusvar.h (revision 5a73f015)
1 /*	$OpenBSD: sbusvar.h,v 1.14 2016/09/04 18:20:34 tedu Exp $	*/
2 /*	$NetBSD: sbusvar.h,v 1.11 2000/11/01 06:18:45 eeh Exp $ */
3 
4 /*-
5  * Copyright (c) 1998 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Paul Kranenburg.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _SBUS_VAR_H
34 #define _SBUS_VAR_H
35 
36 struct sbus_softc;
37 
38 /*
39  * S-bus variables.
40  */
41 
42 /* Device register space description */
43 struct sbus_reg {
44 	u_int32_t	sbr_slot;
45 	u_int32_t	sbr_offset;
46 	u_int32_t	sbr_size;
47 };
48 
49 /* Interrupt information */
50 struct sbus_intr {
51 	u_int32_t	sbi_pri;	/* priority (IPL) */
52 	u_int32_t	sbi_vec;	/* vector (always 0?) */
53 };
54 
55 /* Address translation across busses */
56 struct sbus_range {
57 	u_int32_t	cspace;		/* Client space */
58 	u_int32_t	coffset;	/* Client offset */
59 	u_int32_t	pspace;		/* Parent space */
60 	u_int32_t	poffset;	/* Parent offset */
61 	u_int32_t	size;		/* Size in bytes of this range */
62 };
63 
64 /*
65  * SBus driver attach arguments.
66  */
67 struct sbus_attach_args {
68 	int		sa_placeholder;	/* for obio attach args sharing */
69 	bus_space_tag_t	sa_bustag;
70 	bus_dma_tag_t	sa_dmatag;
71 	char		*sa_name;	/* PROM node name */
72 	int		sa_node;	/* PROM handle */
73 	struct sbus_reg	*sa_reg;	/* SBus register space for device */
74 	int		sa_nreg;	/* Number of SBus register spaces */
75 #define sa_slot		sa_reg[0].sbr_slot
76 #define sa_offset	sa_reg[0].sbr_offset
77 #define sa_size		sa_reg[0].sbr_size
78 
79 	struct sbus_intr *sa_intr;	/* SBus interrupts for device */
80 	int		sa_nintr;	/* Number of interrupts */
81 #define sa_pri		sa_intr[0].sbi_pri
82 
83 	u_int32_t	*sa_promvaddrs;/* PROM-supplied virtual addresses -- 32-bit */
84 	int		sa_npromvaddrs;	/* Number of PROM VAs */
85 #define sa_promvaddr	sa_promvaddrs[0]
86 	int		sa_frequency;	/* SBus clockrate */
87 };
88 
89 int	sbus_print(void *, const char *);
90 
91 int	sbus_setup_attach_args(
92 		struct sbus_softc *,
93 		bus_space_tag_t,
94 		bus_dma_tag_t,
95 		int,			/*node*/
96 		struct sbus_attach_args *);
97 
98 void	sbus_destroy_attach_args(struct sbus_attach_args *);
99 
100 #define sbus_bus_map(t, slot, offset, sz, flags, unused, hp) \
101 	bus_space_map(t, BUS_ADDR(slot, offset), sz, flags, hp)
102 
103 #if notyet
104 /* variables per SBus */
105 struct sbus_softc {
106 	struct	device sc_dev;		/* base device */
107 	bus_space_tag_t	sc_bustag;
108 	bus_dma_tag_t	sc_dmatag;
109 	int	sc_clockfreq;		/* clock frequency (in Hz) */
110 	struct	sbus_range *sc_range;
111 	int	sc_nrange;
112 	int	sc_burst;		/* burst transfer sizes supported */
113 	/* machdep stuff follows here */
114 	int	*sc_intr2ipl;		/* Interrupt level translation */
115 	int	*sc_intr_compat;	/* `intr' property to sbus compat */
116 };
117 #endif
118 
119 
120 /*
121  * PROM-reported DMA burst sizes for the SBus
122  */
123 #define SBUS_BURST_1	0x1
124 #define SBUS_BURST_2	0x2
125 #define SBUS_BURST_4	0x4
126 #define SBUS_BURST_8	0x8
127 #define SBUS_BURST_16	0x10
128 #define SBUS_BURST_32	0x20
129 #define SBUS_BURST_64	0x40
130 
131 #include <sparc64/dev/sbusvar.h>
132 #include <sparc64/dev/iommureg.h>
133 
134 #endif /* _SBUS_VAR_H */
135